1/* 2 * linux/drivers/mtd/onenand/onenand_base.c 3 * 4 * Copyright �� 2005-2009 Samsung Electronics 5 * Copyright �� 2007 Nokia Corporation 6 * 7 * Kyungmin Park <kyungmin.park@samsung.com> 8 * 9 * Credits: 10 * Adrian Hunter <ext-adrian.hunter@nokia.com>: 11 * auto-placement support, read-while load support, various fixes 12 * 13 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com> 14 * Flex-OneNAND support 15 * Amul Kumar Saha <amul.saha at samsung.com> 16 * OTP support 17 * 18 * This program is free software; you can redistribute it and/or modify 19 * it under the terms of the GNU General Public License version 2 as 20 * published by the Free Software Foundation. 21 */ 22 23#include <linux/kernel.h> 24#include <linux/module.h> 25#include <linux/moduleparam.h> 26#include <linux/slab.h> 27#include <linux/init.h> 28#include <linux/sched.h> 29#include <linux/delay.h> 30#include <linux/interrupt.h> 31#include <linux/jiffies.h> 32#include <linux/mtd/mtd.h> 33#include <linux/mtd/onenand.h> 34#include <linux/mtd/partitions.h> 35 36#include <asm/io.h> 37 38/* 39 * Multiblock erase if number of blocks to erase is 2 or more. 40 * Maximum number of blocks for simultaneous erase is 64. 41 */ 42#define MB_ERASE_MIN_BLK_COUNT 2 43#define MB_ERASE_MAX_BLK_COUNT 64 44 45/* Default Flex-OneNAND boundary and lock respectively */ 46static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 }; 47 48module_param_array(flex_bdry, int, NULL, 0400); 49MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND" 50 "Syntax:flex_bdry=DIE_BDRY,LOCK,..." 51 "DIE_BDRY: SLC boundary of the die" 52 "LOCK: Locking information for SLC boundary" 53 " : 0->Set boundary in unlocked status" 54 " : 1->Set boundary in locked status"); 55 56/* Default OneNAND/Flex-OneNAND OTP options*/ 57static int otp; 58 59module_param(otp, int, 0400); 60MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP" 61 "Syntax : otp=LOCK_TYPE" 62 "LOCK_TYPE : Keys issued, for specific OTP Lock type" 63 " : 0 -> Default (No Blocks Locked)" 64 " : 1 -> OTP Block lock" 65 " : 2 -> 1st Block lock" 66 " : 3 -> BOTH OTP Block and 1st Block lock"); 67 68/** 69 * onenand_oob_128 - oob info for Flex-Onenand with 4KB page 70 * For now, we expose only 64 out of 80 ecc bytes 71 */ 72static struct nand_ecclayout onenand_oob_128 = { 73 .eccbytes = 64, 74 .eccpos = { 75 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 76 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 77 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 78 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 79 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 81 102, 103, 104, 105 82 }, 83 .oobfree = { 84 {2, 4}, {18, 4}, {34, 4}, {50, 4}, 85 {66, 4}, {82, 4}, {98, 4}, {114, 4} 86 } 87}; 88 89/** 90 * onenand_oob_64 - oob info for large (2KB) page 91 */ 92static struct nand_ecclayout onenand_oob_64 = { 93 .eccbytes = 20, 94 .eccpos = { 95 8, 9, 10, 11, 12, 96 24, 25, 26, 27, 28, 97 40, 41, 42, 43, 44, 98 56, 57, 58, 59, 60, 99 }, 100 .oobfree = { 101 {2, 3}, {14, 2}, {18, 3}, {30, 2}, 102 {34, 3}, {46, 2}, {50, 3}, {62, 2} 103 } 104}; 105 106/** 107 * onenand_oob_32 - oob info for middle (1KB) page 108 */ 109static struct nand_ecclayout onenand_oob_32 = { 110 .eccbytes = 10, 111 .eccpos = { 112 8, 9, 10, 11, 12, 113 24, 25, 26, 27, 28, 114 }, 115 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} } 116}; 117 118static const unsigned char ffchars[] = { 119 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 120 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ 121 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 122 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ 123 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 124 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ 125 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 126 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ 127 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 128 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */ 129 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 130 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */ 131 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 132 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */ 133 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 134 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */ 135}; 136 137/** 138 * onenand_readw - [OneNAND Interface] Read OneNAND register 139 * @param addr address to read 140 * 141 * Read OneNAND register 142 */ 143static unsigned short onenand_readw(void __iomem *addr) 144{ 145 return readw(addr); 146} 147 148/** 149 * onenand_writew - [OneNAND Interface] Write OneNAND register with value 150 * @param value value to write 151 * @param addr address to write 152 * 153 * Write OneNAND register with value 154 */ 155static void onenand_writew(unsigned short value, void __iomem *addr) 156{ 157 writew(value, addr); 158} 159 160/** 161 * onenand_block_address - [DEFAULT] Get block address 162 * @param this onenand chip data structure 163 * @param block the block 164 * @return translated block address if DDP, otherwise same 165 * 166 * Setup Start Address 1 Register (F100h) 167 */ 168static int onenand_block_address(struct onenand_chip *this, int block) 169{ 170 /* Device Flash Core select, NAND Flash Block Address */ 171 if (block & this->density_mask) 172 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask); 173 174 return block; 175} 176 177/** 178 * onenand_bufferram_address - [DEFAULT] Get bufferram address 179 * @param this onenand chip data structure 180 * @param block the block 181 * @return set DBS value if DDP, otherwise 0 182 * 183 * Setup Start Address 2 Register (F101h) for DDP 184 */ 185static int onenand_bufferram_address(struct onenand_chip *this, int block) 186{ 187 /* Device BufferRAM Select */ 188 if (block & this->density_mask) 189 return ONENAND_DDP_CHIP1; 190 191 return ONENAND_DDP_CHIP0; 192} 193 194/** 195 * onenand_page_address - [DEFAULT] Get page address 196 * @param page the page address 197 * @param sector the sector address 198 * @return combined page and sector address 199 * 200 * Setup Start Address 8 Register (F107h) 201 */ 202static int onenand_page_address(int page, int sector) 203{ 204 /* Flash Page Address, Flash Sector Address */ 205 int fpa, fsa; 206 207 fpa = page & ONENAND_FPA_MASK; 208 fsa = sector & ONENAND_FSA_MASK; 209 210 return ((fpa << ONENAND_FPA_SHIFT) | fsa); 211} 212 213/** 214 * onenand_buffer_address - [DEFAULT] Get buffer address 215 * @param dataram1 DataRAM index 216 * @param sectors the sector address 217 * @param count the number of sectors 218 * @return the start buffer value 219 * 220 * Setup Start Buffer Register (F200h) 221 */ 222static int onenand_buffer_address(int dataram1, int sectors, int count) 223{ 224 int bsa, bsc; 225 226 /* BufferRAM Sector Address */ 227 bsa = sectors & ONENAND_BSA_MASK; 228 229 if (dataram1) 230 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ 231 else 232 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ 233 234 /* BufferRAM Sector Count */ 235 bsc = count & ONENAND_BSC_MASK; 236 237 return ((bsa << ONENAND_BSA_SHIFT) | bsc); 238} 239 240/** 241 * flexonenand_block- For given address return block number 242 * @param this - OneNAND device structure 243 * @param addr - Address for which block number is needed 244 */ 245static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr) 246{ 247 unsigned boundary, blk, die = 0; 248 249 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) { 250 die = 1; 251 addr -= this->diesize[0]; 252 } 253 254 boundary = this->boundary[die]; 255 256 blk = addr >> (this->erase_shift - 1); 257 if (blk > boundary) 258 blk = (blk + boundary + 1) >> 1; 259 260 blk += die ? this->density_mask : 0; 261 return blk; 262} 263 264inline unsigned onenand_block(struct onenand_chip *this, loff_t addr) 265{ 266 if (!FLEXONENAND(this)) 267 return addr >> this->erase_shift; 268 return flexonenand_block(this, addr); 269} 270 271/** 272 * flexonenand_addr - Return address of the block 273 * @this: OneNAND device structure 274 * @block: Block number on Flex-OneNAND 275 * 276 * Return address of the block 277 */ 278static loff_t flexonenand_addr(struct onenand_chip *this, int block) 279{ 280 loff_t ofs = 0; 281 int die = 0, boundary; 282 283 if (ONENAND_IS_DDP(this) && block >= this->density_mask) { 284 block -= this->density_mask; 285 die = 1; 286 ofs = this->diesize[0]; 287 } 288 289 boundary = this->boundary[die]; 290 ofs += (loff_t)block << (this->erase_shift - 1); 291 if (block > (boundary + 1)) 292 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1); 293 return ofs; 294} 295 296loff_t onenand_addr(struct onenand_chip *this, int block) 297{ 298 if (!FLEXONENAND(this)) 299 return (loff_t)block << this->erase_shift; 300 return flexonenand_addr(this, block); 301} 302EXPORT_SYMBOL(onenand_addr); 303 304/** 305 * onenand_get_density - [DEFAULT] Get OneNAND density 306 * @param dev_id OneNAND device ID 307 * 308 * Get OneNAND density from device ID 309 */ 310static inline int onenand_get_density(int dev_id) 311{ 312 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; 313 return (density & ONENAND_DEVICE_DENSITY_MASK); 314} 315 316/** 317 * flexonenand_region - [Flex-OneNAND] Return erase region of addr 318 * @param mtd MTD device structure 319 * @param addr address whose erase region needs to be identified 320 */ 321int flexonenand_region(struct mtd_info *mtd, loff_t addr) 322{ 323 int i; 324 325 for (i = 0; i < mtd->numeraseregions; i++) 326 if (addr < mtd->eraseregions[i].offset) 327 break; 328 return i - 1; 329} 330EXPORT_SYMBOL(flexonenand_region); 331 332/** 333 * onenand_command - [DEFAULT] Send command to OneNAND device 334 * @param mtd MTD device structure 335 * @param cmd the command to be sent 336 * @param addr offset to read from or write to 337 * @param len number of bytes to read or write 338 * 339 * Send command to OneNAND device. This function is used for middle/large page 340 * devices (1KB/2KB Bytes per page) 341 */ 342static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len) 343{ 344 struct onenand_chip *this = mtd->priv; 345 int value, block, page; 346 347 /* Address translation */ 348 switch (cmd) { 349 case ONENAND_CMD_UNLOCK: 350 case ONENAND_CMD_LOCK: 351 case ONENAND_CMD_LOCK_TIGHT: 352 case ONENAND_CMD_UNLOCK_ALL: 353 block = -1; 354 page = -1; 355 break; 356 357 case FLEXONENAND_CMD_PI_ACCESS: 358 /* addr contains die index */ 359 block = addr * this->density_mask; 360 page = -1; 361 break; 362 363 case ONENAND_CMD_ERASE: 364 case ONENAND_CMD_MULTIBLOCK_ERASE: 365 case ONENAND_CMD_ERASE_VERIFY: 366 case ONENAND_CMD_BUFFERRAM: 367 case ONENAND_CMD_OTP_ACCESS: 368 block = onenand_block(this, addr); 369 page = -1; 370 break; 371 372 case FLEXONENAND_CMD_READ_PI: 373 cmd = ONENAND_CMD_READ; 374 block = addr * this->density_mask; 375 page = 0; 376 break; 377 378 default: 379 block = onenand_block(this, addr); 380 if (FLEXONENAND(this)) 381 page = (int) (addr - onenand_addr(this, block))>>\ 382 this->page_shift; 383 else 384 page = (int) (addr >> this->page_shift); 385 if (ONENAND_IS_2PLANE(this)) { 386 /* Make the even block number */ 387 block &= ~1; 388 /* Is it the odd plane? */ 389 if (addr & this->writesize) 390 block++; 391 page >>= 1; 392 } 393 page &= this->page_mask; 394 break; 395 } 396 397 /* NOTE: The setting order of the registers is very important! */ 398 if (cmd == ONENAND_CMD_BUFFERRAM) { 399 /* Select DataRAM for DDP */ 400 value = onenand_bufferram_address(this, block); 401 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 402 403 if (ONENAND_IS_MLC(this) || ONENAND_IS_2PLANE(this) || 404 ONENAND_IS_4KB_PAGE(this)) 405 /* It is always BufferRAM0 */ 406 ONENAND_SET_BUFFERRAM0(this); 407 else 408 /* Switch to the next data buffer */ 409 ONENAND_SET_NEXT_BUFFERRAM(this); 410 411 return 0; 412 } 413 414 if (block != -1) { 415 /* Write 'DFS, FBA' of Flash */ 416 value = onenand_block_address(this, block); 417 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 418 419 /* Select DataRAM for DDP */ 420 value = onenand_bufferram_address(this, block); 421 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 422 } 423 424 if (page != -1) { 425 /* Now we use page size operation */ 426 int sectors = 0, count = 0; 427 int dataram; 428 429 switch (cmd) { 430 case FLEXONENAND_CMD_RECOVER_LSB: 431 case ONENAND_CMD_READ: 432 case ONENAND_CMD_READOOB: 433 if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) 434 /* It is always BufferRAM0 */ 435 dataram = ONENAND_SET_BUFFERRAM0(this); 436 else 437 dataram = ONENAND_SET_NEXT_BUFFERRAM(this); 438 break; 439 440 default: 441 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG) 442 cmd = ONENAND_CMD_2X_PROG; 443 dataram = ONENAND_CURRENT_BUFFERRAM(this); 444 break; 445 } 446 447 /* Write 'FPA, FSA' of Flash */ 448 value = onenand_page_address(page, sectors); 449 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8); 450 451 /* Write 'BSA, BSC' of DataRAM */ 452 value = onenand_buffer_address(dataram, sectors, count); 453 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 454 } 455 456 /* Interrupt clear */ 457 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 458 459 /* Write command */ 460 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 461 462 return 0; 463} 464 465/** 466 * onenand_read_ecc - return ecc status 467 * @param this onenand chip structure 468 */ 469static inline int onenand_read_ecc(struct onenand_chip *this) 470{ 471 int ecc, i, result = 0; 472 473 if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this)) 474 return this->read_word(this->base + ONENAND_REG_ECC_STATUS); 475 476 for (i = 0; i < 4; i++) { 477 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2); 478 if (likely(!ecc)) 479 continue; 480 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR) 481 return ONENAND_ECC_2BIT_ALL; 482 else 483 result = ONENAND_ECC_1BIT_ALL; 484 } 485 486 return result; 487} 488 489/** 490 * onenand_wait - [DEFAULT] wait until the command is done 491 * @param mtd MTD device structure 492 * @param state state to select the max. timeout value 493 * 494 * Wait for command done. This applies to all OneNAND command 495 * Read can take up to 30us, erase up to 2ms and program up to 350us 496 * according to general OneNAND specs 497 */ 498static int onenand_wait(struct mtd_info *mtd, int state) 499{ 500 struct onenand_chip * this = mtd->priv; 501 unsigned long timeout; 502 unsigned int flags = ONENAND_INT_MASTER; 503 unsigned int interrupt = 0; 504 unsigned int ctrl; 505 506 /* The 20 msec is enough */ 507 timeout = jiffies + msecs_to_jiffies(20); 508 while (time_before(jiffies, timeout)) { 509 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 510 511 if (interrupt & flags) 512 break; 513 514 if (state != FL_READING && state != FL_PREPARING_ERASE) 515 cond_resched(); 516 } 517 /* To get correct interrupt status in timeout case */ 518 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 519 520 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 521 522 /* 523 * In the Spec. it checks the controller status first 524 * However if you get the correct information in case of 525 * power off recovery (POR) test, it should read ECC status first 526 */ 527 if (interrupt & ONENAND_INT_READ) { 528 int ecc = onenand_read_ecc(this); 529 if (ecc) { 530 if (ecc & ONENAND_ECC_2BIT_ALL) { 531 printk(KERN_ERR "%s: ECC error = 0x%04x\n", 532 __func__, ecc); 533 mtd->ecc_stats.failed++; 534 return -EBADMSG; 535 } else if (ecc & ONENAND_ECC_1BIT_ALL) { 536 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n", 537 __func__, ecc); 538 mtd->ecc_stats.corrected++; 539 } 540 } 541 } else if (state == FL_READING) { 542 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n", 543 __func__, ctrl, interrupt); 544 return -EIO; 545 } 546 547 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) { 548 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n", 549 __func__, ctrl, interrupt); 550 return -EIO; 551 } 552 553 if (!(interrupt & ONENAND_INT_MASTER)) { 554 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n", 555 __func__, ctrl, interrupt); 556 return -EIO; 557 } 558 559 /* If there's controller error, it's a real error */ 560 if (ctrl & ONENAND_CTRL_ERROR) { 561 printk(KERN_ERR "%s: controller error = 0x%04x\n", 562 __func__, ctrl); 563 if (ctrl & ONENAND_CTRL_LOCK) 564 printk(KERN_ERR "%s: it's locked error.\n", __func__); 565 return -EIO; 566 } 567 568 return 0; 569} 570 571/* 572 * onenand_interrupt - [DEFAULT] onenand interrupt handler 573 * @param irq onenand interrupt number 574 * @param dev_id interrupt data 575 * 576 * complete the work 577 */ 578static irqreturn_t onenand_interrupt(int irq, void *data) 579{ 580 struct onenand_chip *this = data; 581 582 /* To handle shared interrupt */ 583 if (!this->complete.done) 584 complete(&this->complete); 585 586 return IRQ_HANDLED; 587} 588 589/* 590 * onenand_interrupt_wait - [DEFAULT] wait until the command is done 591 * @param mtd MTD device structure 592 * @param state state to select the max. timeout value 593 * 594 * Wait for command done. 595 */ 596static int onenand_interrupt_wait(struct mtd_info *mtd, int state) 597{ 598 struct onenand_chip *this = mtd->priv; 599 600 wait_for_completion(&this->complete); 601 602 return onenand_wait(mtd, state); 603} 604 605/* 606 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait 607 * @param mtd MTD device structure 608 * @param state state to select the max. timeout value 609 * 610 * Try interrupt based wait (It is used one-time) 611 */ 612static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state) 613{ 614 struct onenand_chip *this = mtd->priv; 615 unsigned long remain, timeout; 616 617 /* We use interrupt wait first */ 618 this->wait = onenand_interrupt_wait; 619 620 timeout = msecs_to_jiffies(100); 621 remain = wait_for_completion_timeout(&this->complete, timeout); 622 if (!remain) { 623 printk(KERN_INFO "OneNAND: There's no interrupt. " 624 "We use the normal wait\n"); 625 626 /* Release the irq */ 627 free_irq(this->irq, this); 628 629 this->wait = onenand_wait; 630 } 631 632 return onenand_wait(mtd, state); 633} 634 635/* 636 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method 637 * @param mtd MTD device structure 638 * 639 * There's two method to wait onenand work 640 * 1. polling - read interrupt status register 641 * 2. interrupt - use the kernel interrupt method 642 */ 643static void onenand_setup_wait(struct mtd_info *mtd) 644{ 645 struct onenand_chip *this = mtd->priv; 646 int syscfg; 647 648 init_completion(&this->complete); 649 650 if (this->irq <= 0) { 651 this->wait = onenand_wait; 652 return; 653 } 654 655 if (request_irq(this->irq, &onenand_interrupt, 656 IRQF_SHARED, "onenand", this)) { 657 /* If we can't get irq, use the normal wait */ 658 this->wait = onenand_wait; 659 return; 660 } 661 662 /* Enable interrupt */ 663 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 664 syscfg |= ONENAND_SYS_CFG1_IOBE; 665 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 666 667 this->wait = onenand_try_interrupt_wait; 668} 669 670/** 671 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset 672 * @param mtd MTD data structure 673 * @param area BufferRAM area 674 * @return offset given area 675 * 676 * Return BufferRAM offset given area 677 */ 678static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) 679{ 680 struct onenand_chip *this = mtd->priv; 681 682 if (ONENAND_CURRENT_BUFFERRAM(this)) { 683 /* Note: the 'this->writesize' is a real page size */ 684 if (area == ONENAND_DATARAM) 685 return this->writesize; 686 if (area == ONENAND_SPARERAM) 687 return mtd->oobsize; 688 } 689 690 return 0; 691} 692 693/** 694 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area 695 * @param mtd MTD data structure 696 * @param area BufferRAM area 697 * @param buffer the databuffer to put/get data 698 * @param offset offset to read from or write to 699 * @param count number of bytes to read/write 700 * 701 * Read the BufferRAM area 702 */ 703static int onenand_read_bufferram(struct mtd_info *mtd, int area, 704 unsigned char *buffer, int offset, size_t count) 705{ 706 struct onenand_chip *this = mtd->priv; 707 void __iomem *bufferram; 708 709 bufferram = this->base + area; 710 711 bufferram += onenand_bufferram_offset(mtd, area); 712 713 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 714 unsigned short word; 715 716 /* Align with word(16-bit) size */ 717 count--; 718 719 /* Read word and save byte */ 720 word = this->read_word(bufferram + offset + count); 721 buffer[count] = (word & 0xff); 722 } 723 724 memcpy(buffer, bufferram + offset, count); 725 726 return 0; 727} 728 729/** 730 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode 731 * @param mtd MTD data structure 732 * @param area BufferRAM area 733 * @param buffer the databuffer to put/get data 734 * @param offset offset to read from or write to 735 * @param count number of bytes to read/write 736 * 737 * Read the BufferRAM area with Sync. Burst Mode 738 */ 739static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, 740 unsigned char *buffer, int offset, size_t count) 741{ 742 struct onenand_chip *this = mtd->priv; 743 void __iomem *bufferram; 744 745 bufferram = this->base + area; 746 747 bufferram += onenand_bufferram_offset(mtd, area); 748 749 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); 750 751 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 752 unsigned short word; 753 754 /* Align with word(16-bit) size */ 755 count--; 756 757 /* Read word and save byte */ 758 word = this->read_word(bufferram + offset + count); 759 buffer[count] = (word & 0xff); 760 } 761 762 memcpy(buffer, bufferram + offset, count); 763 764 this->mmcontrol(mtd, 0); 765 766 return 0; 767} 768 769/** 770 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area 771 * @param mtd MTD data structure 772 * @param area BufferRAM area 773 * @param buffer the databuffer to put/get data 774 * @param offset offset to read from or write to 775 * @param count number of bytes to read/write 776 * 777 * Write the BufferRAM area 778 */ 779static int onenand_write_bufferram(struct mtd_info *mtd, int area, 780 const unsigned char *buffer, int offset, size_t count) 781{ 782 struct onenand_chip *this = mtd->priv; 783 void __iomem *bufferram; 784 785 bufferram = this->base + area; 786 787 bufferram += onenand_bufferram_offset(mtd, area); 788 789 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 790 unsigned short word; 791 int byte_offset; 792 793 /* Align with word(16-bit) size */ 794 count--; 795 796 /* Calculate byte access offset */ 797 byte_offset = offset + count; 798 799 /* Read word and save byte */ 800 word = this->read_word(bufferram + byte_offset); 801 word = (word & ~0xff) | buffer[count]; 802 this->write_word(word, bufferram + byte_offset); 803 } 804 805 memcpy(bufferram + offset, buffer, count); 806 807 return 0; 808} 809 810/** 811 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode 812 * @param mtd MTD data structure 813 * @param addr address to check 814 * @return blockpage address 815 * 816 * Get blockpage address at 2x program mode 817 */ 818static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr) 819{ 820 struct onenand_chip *this = mtd->priv; 821 int blockpage, block, page; 822 823 /* Calculate the even block number */ 824 block = (int) (addr >> this->erase_shift) & ~1; 825 /* Is it the odd plane? */ 826 if (addr & this->writesize) 827 block++; 828 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask; 829 blockpage = (block << 7) | page; 830 831 return blockpage; 832} 833 834/** 835 * onenand_check_bufferram - [GENERIC] Check BufferRAM information 836 * @param mtd MTD data structure 837 * @param addr address to check 838 * @return 1 if there are valid data, otherwise 0 839 * 840 * Check bufferram if there is data we required 841 */ 842static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) 843{ 844 struct onenand_chip *this = mtd->priv; 845 int blockpage, found = 0; 846 unsigned int i; 847 848 if (ONENAND_IS_2PLANE(this)) 849 blockpage = onenand_get_2x_blockpage(mtd, addr); 850 else 851 blockpage = (int) (addr >> this->page_shift); 852 853 /* Is there valid data? */ 854 i = ONENAND_CURRENT_BUFFERRAM(this); 855 if (this->bufferram[i].blockpage == blockpage) 856 found = 1; 857 else { 858 /* Check another BufferRAM */ 859 i = ONENAND_NEXT_BUFFERRAM(this); 860 if (this->bufferram[i].blockpage == blockpage) { 861 ONENAND_SET_NEXT_BUFFERRAM(this); 862 found = 1; 863 } 864 } 865 866 if (found && ONENAND_IS_DDP(this)) { 867 /* Select DataRAM for DDP */ 868 int block = onenand_block(this, addr); 869 int value = onenand_bufferram_address(this, block); 870 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 871 } 872 873 return found; 874} 875 876/** 877 * onenand_update_bufferram - [GENERIC] Update BufferRAM information 878 * @param mtd MTD data structure 879 * @param addr address to update 880 * @param valid valid flag 881 * 882 * Update BufferRAM information 883 */ 884static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, 885 int valid) 886{ 887 struct onenand_chip *this = mtd->priv; 888 int blockpage; 889 unsigned int i; 890 891 if (ONENAND_IS_2PLANE(this)) 892 blockpage = onenand_get_2x_blockpage(mtd, addr); 893 else 894 blockpage = (int) (addr >> this->page_shift); 895 896 /* Invalidate another BufferRAM */ 897 i = ONENAND_NEXT_BUFFERRAM(this); 898 if (this->bufferram[i].blockpage == blockpage) 899 this->bufferram[i].blockpage = -1; 900 901 /* Update BufferRAM */ 902 i = ONENAND_CURRENT_BUFFERRAM(this); 903 if (valid) 904 this->bufferram[i].blockpage = blockpage; 905 else 906 this->bufferram[i].blockpage = -1; 907} 908 909/** 910 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information 911 * @param mtd MTD data structure 912 * @param addr start address to invalidate 913 * @param len length to invalidate 914 * 915 * Invalidate BufferRAM information 916 */ 917static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr, 918 unsigned int len) 919{ 920 struct onenand_chip *this = mtd->priv; 921 int i; 922 loff_t end_addr = addr + len; 923 924 /* Invalidate BufferRAM */ 925 for (i = 0; i < MAX_BUFFERRAM; i++) { 926 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift; 927 if (buf_addr >= addr && buf_addr < end_addr) 928 this->bufferram[i].blockpage = -1; 929 } 930} 931 932/** 933 * onenand_get_device - [GENERIC] Get chip for selected access 934 * @param mtd MTD device structure 935 * @param new_state the state which is requested 936 * 937 * Get the device and lock it for exclusive access 938 */ 939static int onenand_get_device(struct mtd_info *mtd, int new_state) 940{ 941 struct onenand_chip *this = mtd->priv; 942 DECLARE_WAITQUEUE(wait, current); 943 944 /* 945 * Grab the lock and see if the device is available 946 */ 947 while (1) { 948 spin_lock(&this->chip_lock); 949 if (this->state == FL_READY) { 950 this->state = new_state; 951 spin_unlock(&this->chip_lock); 952 break; 953 } 954 if (new_state == FL_PM_SUSPENDED) { 955 spin_unlock(&this->chip_lock); 956 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; 957 } 958 set_current_state(TASK_UNINTERRUPTIBLE); 959 add_wait_queue(&this->wq, &wait); 960 spin_unlock(&this->chip_lock); 961 schedule(); 962 remove_wait_queue(&this->wq, &wait); 963 } 964 965 return 0; 966} 967 968/** 969 * onenand_release_device - [GENERIC] release chip 970 * @param mtd MTD device structure 971 * 972 * Deselect, release chip lock and wake up anyone waiting on the device 973 */ 974static void onenand_release_device(struct mtd_info *mtd) 975{ 976 struct onenand_chip *this = mtd->priv; 977 978 /* Release the chip */ 979 spin_lock(&this->chip_lock); 980 this->state = FL_READY; 981 wake_up(&this->wq); 982 spin_unlock(&this->chip_lock); 983} 984 985/** 986 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer 987 * @param mtd MTD device structure 988 * @param buf destination address 989 * @param column oob offset to read from 990 * @param thislen oob length to read 991 */ 992static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column, 993 int thislen) 994{ 995 struct onenand_chip *this = mtd->priv; 996 struct nand_oobfree *free; 997 int readcol = column; 998 int readend = column + thislen; 999 int lastgap = 0; 1000 unsigned int i; 1001 uint8_t *oob_buf = this->oob_buf; 1002 1003 free = this->ecclayout->oobfree; 1004 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1005 if (readcol >= lastgap) 1006 readcol += free->offset - lastgap; 1007 if (readend >= lastgap) 1008 readend += free->offset - lastgap; 1009 lastgap = free->offset + free->length; 1010 } 1011 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 1012 free = this->ecclayout->oobfree; 1013 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1014 int free_end = free->offset + free->length; 1015 if (free->offset < readend && free_end > readcol) { 1016 int st = max_t(int,free->offset,readcol); 1017 int ed = min_t(int,free_end,readend); 1018 int n = ed - st; 1019 memcpy(buf, oob_buf + st, n); 1020 buf += n; 1021 } else if (column == 0) 1022 break; 1023 } 1024 return 0; 1025} 1026 1027/** 1028 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data 1029 * @param mtd MTD device structure 1030 * @param addr address to recover 1031 * @param status return value from onenand_wait / onenand_bbt_wait 1032 * 1033 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has 1034 * lower page address and MSB page has higher page address in paired pages. 1035 * If power off occurs during MSB page program, the paired LSB page data can 1036 * become corrupt. LSB page recovery read is a way to read LSB page though page 1037 * data are corrupted. When uncorrectable error occurs as a result of LSB page 1038 * read after power up, issue LSB page recovery read. 1039 */ 1040static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status) 1041{ 1042 struct onenand_chip *this = mtd->priv; 1043 int i; 1044 1045 /* Recovery is only for Flex-OneNAND */ 1046 if (!FLEXONENAND(this)) 1047 return status; 1048 1049 /* check if we failed due to uncorrectable error */ 1050 if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR) 1051 return status; 1052 1053 /* check if address lies in MLC region */ 1054 i = flexonenand_region(mtd, addr); 1055 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift)) 1056 return status; 1057 1058 /* We are attempting to reread, so decrement stats.failed 1059 * which was incremented by onenand_wait due to read failure 1060 */ 1061 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n", 1062 __func__); 1063 mtd->ecc_stats.failed--; 1064 1065 /* Issue the LSB page recovery command */ 1066 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize); 1067 return this->wait(mtd, FL_READING); 1068} 1069 1070/** 1071 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band 1072 * @param mtd MTD device structure 1073 * @param from offset to read from 1074 * @param ops: oob operation description structure 1075 * 1076 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram. 1077 * So, read-while-load is not present. 1078 */ 1079static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from, 1080 struct mtd_oob_ops *ops) 1081{ 1082 struct onenand_chip *this = mtd->priv; 1083 struct mtd_ecc_stats stats; 1084 size_t len = ops->len; 1085 size_t ooblen = ops->ooblen; 1086 u_char *buf = ops->datbuf; 1087 u_char *oobbuf = ops->oobbuf; 1088 int read = 0, column, thislen; 1089 int oobread = 0, oobcolumn, thisooblen, oobsize; 1090 int ret = 0; 1091 int writesize = this->writesize; 1092 1093 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n", 1094 __func__, (unsigned int) from, (int) len); 1095 1096 if (ops->mode == MTD_OOB_AUTO) 1097 oobsize = this->ecclayout->oobavail; 1098 else 1099 oobsize = mtd->oobsize; 1100 1101 oobcolumn = from & (mtd->oobsize - 1); 1102 1103 /* Do not allow reads past end of device */ 1104 if (from + len > mtd->size) { 1105 printk(KERN_ERR "%s: Attempt read beyond end of device\n", 1106 __func__); 1107 ops->retlen = 0; 1108 ops->oobretlen = 0; 1109 return -EINVAL; 1110 } 1111 1112 stats = mtd->ecc_stats; 1113 1114 while (read < len) { 1115 cond_resched(); 1116 1117 thislen = min_t(int, writesize, len - read); 1118 1119 column = from & (writesize - 1); 1120 if (column + thislen > writesize) 1121 thislen = writesize - column; 1122 1123 if (!onenand_check_bufferram(mtd, from)) { 1124 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1125 1126 ret = this->wait(mtd, FL_READING); 1127 if (unlikely(ret)) 1128 ret = onenand_recover_lsb(mtd, from, ret); 1129 onenand_update_bufferram(mtd, from, !ret); 1130 if (ret == -EBADMSG) 1131 ret = 0; 1132 } 1133 1134 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); 1135 if (oobbuf) { 1136 thisooblen = oobsize - oobcolumn; 1137 thisooblen = min_t(int, thisooblen, ooblen - oobread); 1138 1139 if (ops->mode == MTD_OOB_AUTO) 1140 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); 1141 else 1142 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); 1143 oobread += thisooblen; 1144 oobbuf += thisooblen; 1145 oobcolumn = 0; 1146 } 1147 1148 read += thislen; 1149 if (read == len) 1150 break; 1151 1152 from += thislen; 1153 buf += thislen; 1154 } 1155 1156 /* 1157 * Return success, if no ECC failures, else -EBADMSG 1158 * fs driver will take care of that, because 1159 * retlen == desired len and result == -EBADMSG 1160 */ 1161 ops->retlen = read; 1162 ops->oobretlen = oobread; 1163 1164 if (ret) 1165 return ret; 1166 1167 if (mtd->ecc_stats.failed - stats.failed) 1168 return -EBADMSG; 1169 1170 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; 1171} 1172 1173/** 1174 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band 1175 * @param mtd MTD device structure 1176 * @param from offset to read from 1177 * @param ops: oob operation description structure 1178 * 1179 * OneNAND read main and/or out-of-band data 1180 */ 1181static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, 1182 struct mtd_oob_ops *ops) 1183{ 1184 struct onenand_chip *this = mtd->priv; 1185 struct mtd_ecc_stats stats; 1186 size_t len = ops->len; 1187 size_t ooblen = ops->ooblen; 1188 u_char *buf = ops->datbuf; 1189 u_char *oobbuf = ops->oobbuf; 1190 int read = 0, column, thislen; 1191 int oobread = 0, oobcolumn, thisooblen, oobsize; 1192 int ret = 0, boundary = 0; 1193 int writesize = this->writesize; 1194 1195 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n", 1196 __func__, (unsigned int) from, (int) len); 1197 1198 if (ops->mode == MTD_OOB_AUTO) 1199 oobsize = this->ecclayout->oobavail; 1200 else 1201 oobsize = mtd->oobsize; 1202 1203 oobcolumn = from & (mtd->oobsize - 1); 1204 1205 /* Do not allow reads past end of device */ 1206 if ((from + len) > mtd->size) { 1207 printk(KERN_ERR "%s: Attempt read beyond end of device\n", 1208 __func__); 1209 ops->retlen = 0; 1210 ops->oobretlen = 0; 1211 return -EINVAL; 1212 } 1213 1214 stats = mtd->ecc_stats; 1215 1216 /* Read-while-load method */ 1217 1218 /* Do first load to bufferRAM */ 1219 if (read < len) { 1220 if (!onenand_check_bufferram(mtd, from)) { 1221 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1222 ret = this->wait(mtd, FL_READING); 1223 onenand_update_bufferram(mtd, from, !ret); 1224 if (ret == -EBADMSG) 1225 ret = 0; 1226 } 1227 } 1228 1229 thislen = min_t(int, writesize, len - read); 1230 column = from & (writesize - 1); 1231 if (column + thislen > writesize) 1232 thislen = writesize - column; 1233 1234 while (!ret) { 1235 /* If there is more to load then start next load */ 1236 from += thislen; 1237 if (read + thislen < len) { 1238 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1239 /* 1240 * Chip boundary handling in DDP 1241 * Now we issued chip 1 read and pointed chip 1 1242 * bufferram so we have to point chip 0 bufferram. 1243 */ 1244 if (ONENAND_IS_DDP(this) && 1245 unlikely(from == (this->chipsize >> 1))) { 1246 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2); 1247 boundary = 1; 1248 } else 1249 boundary = 0; 1250 ONENAND_SET_PREV_BUFFERRAM(this); 1251 } 1252 /* While load is going, read from last bufferRAM */ 1253 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); 1254 1255 /* Read oob area if needed */ 1256 if (oobbuf) { 1257 thisooblen = oobsize - oobcolumn; 1258 thisooblen = min_t(int, thisooblen, ooblen - oobread); 1259 1260 if (ops->mode == MTD_OOB_AUTO) 1261 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); 1262 else 1263 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); 1264 oobread += thisooblen; 1265 oobbuf += thisooblen; 1266 oobcolumn = 0; 1267 } 1268 1269 /* See if we are done */ 1270 read += thislen; 1271 if (read == len) 1272 break; 1273 /* Set up for next read from bufferRAM */ 1274 if (unlikely(boundary)) 1275 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2); 1276 ONENAND_SET_NEXT_BUFFERRAM(this); 1277 buf += thislen; 1278 thislen = min_t(int, writesize, len - read); 1279 column = 0; 1280 cond_resched(); 1281 /* Now wait for load */ 1282 ret = this->wait(mtd, FL_READING); 1283 onenand_update_bufferram(mtd, from, !ret); 1284 if (ret == -EBADMSG) 1285 ret = 0; 1286 } 1287 1288 /* 1289 * Return success, if no ECC failures, else -EBADMSG 1290 * fs driver will take care of that, because 1291 * retlen == desired len and result == -EBADMSG 1292 */ 1293 ops->retlen = read; 1294 ops->oobretlen = oobread; 1295 1296 if (ret) 1297 return ret; 1298 1299 if (mtd->ecc_stats.failed - stats.failed) 1300 return -EBADMSG; 1301 1302 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; 1303} 1304 1305/** 1306 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band 1307 * @param mtd MTD device structure 1308 * @param from offset to read from 1309 * @param ops: oob operation description structure 1310 * 1311 * OneNAND read out-of-band data from the spare area 1312 */ 1313static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from, 1314 struct mtd_oob_ops *ops) 1315{ 1316 struct onenand_chip *this = mtd->priv; 1317 struct mtd_ecc_stats stats; 1318 int read = 0, thislen, column, oobsize; 1319 size_t len = ops->ooblen; 1320 mtd_oob_mode_t mode = ops->mode; 1321 u_char *buf = ops->oobbuf; 1322 int ret = 0, readcmd; 1323 1324 from += ops->ooboffs; 1325 1326 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n", 1327 __func__, (unsigned int) from, (int) len); 1328 1329 /* Initialize return length value */ 1330 ops->oobretlen = 0; 1331 1332 if (mode == MTD_OOB_AUTO) 1333 oobsize = this->ecclayout->oobavail; 1334 else 1335 oobsize = mtd->oobsize; 1336 1337 column = from & (mtd->oobsize - 1); 1338 1339 if (unlikely(column >= oobsize)) { 1340 printk(KERN_ERR "%s: Attempted to start read outside oob\n", 1341 __func__); 1342 return -EINVAL; 1343 } 1344 1345 /* Do not allow reads past end of device */ 1346 if (unlikely(from >= mtd->size || 1347 column + len > ((mtd->size >> this->page_shift) - 1348 (from >> this->page_shift)) * oobsize)) { 1349 printk(KERN_ERR "%s: Attempted to read beyond end of device\n", 1350 __func__); 1351 return -EINVAL; 1352 } 1353 1354 stats = mtd->ecc_stats; 1355 1356 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1357 1358 while (read < len) { 1359 cond_resched(); 1360 1361 thislen = oobsize - column; 1362 thislen = min_t(int, thislen, len); 1363 1364 this->command(mtd, readcmd, from, mtd->oobsize); 1365 1366 onenand_update_bufferram(mtd, from, 0); 1367 1368 ret = this->wait(mtd, FL_READING); 1369 if (unlikely(ret)) 1370 ret = onenand_recover_lsb(mtd, from, ret); 1371 1372 if (ret && ret != -EBADMSG) { 1373 printk(KERN_ERR "%s: read failed = 0x%x\n", 1374 __func__, ret); 1375 break; 1376 } 1377 1378 if (mode == MTD_OOB_AUTO) 1379 onenand_transfer_auto_oob(mtd, buf, column, thislen); 1380 else 1381 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); 1382 1383 read += thislen; 1384 1385 if (read == len) 1386 break; 1387 1388 buf += thislen; 1389 1390 /* Read more? */ 1391 if (read < len) { 1392 /* Page size */ 1393 from += mtd->writesize; 1394 column = 0; 1395 } 1396 } 1397 1398 ops->oobretlen = read; 1399 1400 if (ret) 1401 return ret; 1402 1403 if (mtd->ecc_stats.failed - stats.failed) 1404 return -EBADMSG; 1405 1406 return 0; 1407} 1408 1409/** 1410 * onenand_read - [MTD Interface] Read data from flash 1411 * @param mtd MTD device structure 1412 * @param from offset to read from 1413 * @param len number of bytes to read 1414 * @param retlen pointer to variable to store the number of read bytes 1415 * @param buf the databuffer to put data 1416 * 1417 * Read with ecc 1418*/ 1419static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, 1420 size_t *retlen, u_char *buf) 1421{ 1422 struct onenand_chip *this = mtd->priv; 1423 struct mtd_oob_ops ops = { 1424 .len = len, 1425 .ooblen = 0, 1426 .datbuf = buf, 1427 .oobbuf = NULL, 1428 }; 1429 int ret; 1430 1431 onenand_get_device(mtd, FL_READING); 1432 ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ? 1433 onenand_mlc_read_ops_nolock(mtd, from, &ops) : 1434 onenand_read_ops_nolock(mtd, from, &ops); 1435 onenand_release_device(mtd); 1436 1437 *retlen = ops.retlen; 1438 return ret; 1439} 1440 1441/** 1442 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band 1443 * @param mtd: MTD device structure 1444 * @param from: offset to read from 1445 * @param ops: oob operation description structure 1446 1447 * Read main and/or out-of-band 1448 */ 1449static int onenand_read_oob(struct mtd_info *mtd, loff_t from, 1450 struct mtd_oob_ops *ops) 1451{ 1452 struct onenand_chip *this = mtd->priv; 1453 int ret; 1454 1455 switch (ops->mode) { 1456 case MTD_OOB_PLACE: 1457 case MTD_OOB_AUTO: 1458 break; 1459 case MTD_OOB_RAW: 1460 /* Not implemented yet */ 1461 default: 1462 return -EINVAL; 1463 } 1464 1465 onenand_get_device(mtd, FL_READING); 1466 if (ops->datbuf) 1467 ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ? 1468 onenand_mlc_read_ops_nolock(mtd, from, ops) : 1469 onenand_read_ops_nolock(mtd, from, ops); 1470 else 1471 ret = onenand_read_oob_nolock(mtd, from, ops); 1472 onenand_release_device(mtd); 1473 1474 return ret; 1475} 1476 1477/** 1478 * onenand_bbt_wait - [DEFAULT] wait until the command is done 1479 * @param mtd MTD device structure 1480 * @param state state to select the max. timeout value 1481 * 1482 * Wait for command done. 1483 */ 1484static int onenand_bbt_wait(struct mtd_info *mtd, int state) 1485{ 1486 struct onenand_chip *this = mtd->priv; 1487 unsigned long timeout; 1488 unsigned int interrupt; 1489 unsigned int ctrl; 1490 1491 /* The 20 msec is enough */ 1492 timeout = jiffies + msecs_to_jiffies(20); 1493 while (time_before(jiffies, timeout)) { 1494 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1495 if (interrupt & ONENAND_INT_MASTER) 1496 break; 1497 } 1498 /* To get correct interrupt status in timeout case */ 1499 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1500 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 1501 1502 if (interrupt & ONENAND_INT_READ) { 1503 int ecc = onenand_read_ecc(this); 1504 if (ecc & ONENAND_ECC_2BIT_ALL) { 1505 printk(KERN_WARNING "%s: ecc error = 0x%04x, " 1506 "controller error 0x%04x\n", 1507 __func__, ecc, ctrl); 1508 return ONENAND_BBT_READ_ECC_ERROR; 1509 } 1510 } else { 1511 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n", 1512 __func__, ctrl, interrupt); 1513 return ONENAND_BBT_READ_FATAL_ERROR; 1514 } 1515 1516 /* Initial bad block case: 0x2400 or 0x0400 */ 1517 if (ctrl & ONENAND_CTRL_ERROR) { 1518 printk(KERN_DEBUG "%s: controller error = 0x%04x\n", 1519 __func__, ctrl); 1520 return ONENAND_BBT_READ_ERROR; 1521 } 1522 1523 return 0; 1524} 1525 1526/** 1527 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan 1528 * @param mtd MTD device structure 1529 * @param from offset to read from 1530 * @param ops oob operation description structure 1531 * 1532 * OneNAND read out-of-band data from the spare area for bbt scan 1533 */ 1534int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 1535 struct mtd_oob_ops *ops) 1536{ 1537 struct onenand_chip *this = mtd->priv; 1538 int read = 0, thislen, column; 1539 int ret = 0, readcmd; 1540 size_t len = ops->ooblen; 1541 u_char *buf = ops->oobbuf; 1542 1543 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %zi\n", 1544 __func__, (unsigned int) from, len); 1545 1546 /* Initialize return value */ 1547 ops->oobretlen = 0; 1548 1549 /* Do not allow reads past end of device */ 1550 if (unlikely((from + len) > mtd->size)) { 1551 printk(KERN_ERR "%s: Attempt read beyond end of device\n", 1552 __func__); 1553 return ONENAND_BBT_READ_FATAL_ERROR; 1554 } 1555 1556 /* Grab the lock and see if the device is available */ 1557 onenand_get_device(mtd, FL_READING); 1558 1559 column = from & (mtd->oobsize - 1); 1560 1561 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1562 1563 while (read < len) { 1564 cond_resched(); 1565 1566 thislen = mtd->oobsize - column; 1567 thislen = min_t(int, thislen, len); 1568 1569 this->command(mtd, readcmd, from, mtd->oobsize); 1570 1571 onenand_update_bufferram(mtd, from, 0); 1572 1573 ret = this->bbt_wait(mtd, FL_READING); 1574 if (unlikely(ret)) 1575 ret = onenand_recover_lsb(mtd, from, ret); 1576 1577 if (ret) 1578 break; 1579 1580 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); 1581 read += thislen; 1582 if (read == len) 1583 break; 1584 1585 buf += thislen; 1586 1587 /* Read more? */ 1588 if (read < len) { 1589 /* Update Page size */ 1590 from += this->writesize; 1591 column = 0; 1592 } 1593 } 1594 1595 /* Deselect and wake up anyone waiting on the device */ 1596 onenand_release_device(mtd); 1597 1598 ops->oobretlen = read; 1599 return ret; 1600} 1601 1602#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 1603/** 1604 * onenand_verify_oob - [GENERIC] verify the oob contents after a write 1605 * @param mtd MTD device structure 1606 * @param buf the databuffer to verify 1607 * @param to offset to read from 1608 */ 1609static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to) 1610{ 1611 struct onenand_chip *this = mtd->priv; 1612 u_char *oob_buf = this->oob_buf; 1613 int status, i, readcmd; 1614 1615 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1616 1617 this->command(mtd, readcmd, to, mtd->oobsize); 1618 onenand_update_bufferram(mtd, to, 0); 1619 status = this->wait(mtd, FL_READING); 1620 if (status) 1621 return status; 1622 1623 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 1624 for (i = 0; i < mtd->oobsize; i++) 1625 if (buf[i] != 0xFF && buf[i] != oob_buf[i]) 1626 return -EBADMSG; 1627 1628 return 0; 1629} 1630 1631/** 1632 * onenand_verify - [GENERIC] verify the chip contents after a write 1633 * @param mtd MTD device structure 1634 * @param buf the databuffer to verify 1635 * @param addr offset to read from 1636 * @param len number of bytes to read and compare 1637 */ 1638static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len) 1639{ 1640 struct onenand_chip *this = mtd->priv; 1641 int ret = 0; 1642 int thislen, column; 1643 1644 while (len != 0) { 1645 thislen = min_t(int, this->writesize, len); 1646 column = addr & (this->writesize - 1); 1647 if (column + thislen > this->writesize) 1648 thislen = this->writesize - column; 1649 1650 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize); 1651 1652 onenand_update_bufferram(mtd, addr, 0); 1653 1654 ret = this->wait(mtd, FL_READING); 1655 if (ret) 1656 return ret; 1657 1658 onenand_update_bufferram(mtd, addr, 1); 1659 1660 this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize); 1661 1662 if (memcmp(buf, this->verify_buf, thislen)) 1663 return -EBADMSG; 1664 1665 len -= thislen; 1666 buf += thislen; 1667 addr += thislen; 1668 } 1669 1670 return 0; 1671} 1672#else 1673#define onenand_verify(...) (0) 1674#define onenand_verify_oob(...) (0) 1675#endif 1676 1677#define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0) 1678 1679static void onenand_panic_wait(struct mtd_info *mtd) 1680{ 1681 struct onenand_chip *this = mtd->priv; 1682 unsigned int interrupt; 1683 int i; 1684 1685 for (i = 0; i < 2000; i++) { 1686 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1687 if (interrupt & ONENAND_INT_MASTER) 1688 break; 1689 udelay(10); 1690 } 1691} 1692 1693/** 1694 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context 1695 * @param mtd MTD device structure 1696 * @param to offset to write to 1697 * @param len number of bytes to write 1698 * @param retlen pointer to variable to store the number of written bytes 1699 * @param buf the data to write 1700 * 1701 * Write with ECC 1702 */ 1703static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len, 1704 size_t *retlen, const u_char *buf) 1705{ 1706 struct onenand_chip *this = mtd->priv; 1707 int column, subpage; 1708 int written = 0; 1709 int ret = 0; 1710 1711 if (this->state == FL_PM_SUSPENDED) 1712 return -EBUSY; 1713 1714 /* Wait for any existing operation to clear */ 1715 onenand_panic_wait(mtd); 1716 1717 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", 1718 __func__, (unsigned int) to, (int) len); 1719 1720 /* Initialize retlen, in case of early exit */ 1721 *retlen = 0; 1722 1723 /* Do not allow writes past end of device */ 1724 if (unlikely((to + len) > mtd->size)) { 1725 printk(KERN_ERR "%s: Attempt write to past end of device\n", 1726 __func__); 1727 return -EINVAL; 1728 } 1729 1730 /* Reject writes, which are not page aligned */ 1731 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { 1732 printk(KERN_ERR "%s: Attempt to write not page aligned data\n", 1733 __func__); 1734 return -EINVAL; 1735 } 1736 1737 column = to & (mtd->writesize - 1); 1738 1739 /* Loop until all data write */ 1740 while (written < len) { 1741 int thislen = min_t(int, mtd->writesize - column, len - written); 1742 u_char *wbuf = (u_char *) buf; 1743 1744 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1745 1746 /* Partial page write */ 1747 subpage = thislen < mtd->writesize; 1748 if (subpage) { 1749 memset(this->page_buf, 0xff, mtd->writesize); 1750 memcpy(this->page_buf + column, buf, thislen); 1751 wbuf = this->page_buf; 1752 } 1753 1754 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1755 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize); 1756 1757 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); 1758 1759 onenand_panic_wait(mtd); 1760 1761 /* In partial page write we don't update bufferram */ 1762 onenand_update_bufferram(mtd, to, !ret && !subpage); 1763 if (ONENAND_IS_2PLANE(this)) { 1764 ONENAND_SET_BUFFERRAM1(this); 1765 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage); 1766 } 1767 1768 if (ret) { 1769 printk(KERN_ERR "%s: write failed %d\n", __func__, ret); 1770 break; 1771 } 1772 1773 written += thislen; 1774 1775 if (written == len) 1776 break; 1777 1778 column = 0; 1779 to += thislen; 1780 buf += thislen; 1781 } 1782 1783 *retlen = written; 1784 return ret; 1785} 1786 1787/** 1788 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer 1789 * @param mtd MTD device structure 1790 * @param oob_buf oob buffer 1791 * @param buf source address 1792 * @param column oob offset to write to 1793 * @param thislen oob length to write 1794 */ 1795static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf, 1796 const u_char *buf, int column, int thislen) 1797{ 1798 struct onenand_chip *this = mtd->priv; 1799 struct nand_oobfree *free; 1800 int writecol = column; 1801 int writeend = column + thislen; 1802 int lastgap = 0; 1803 unsigned int i; 1804 1805 free = this->ecclayout->oobfree; 1806 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1807 if (writecol >= lastgap) 1808 writecol += free->offset - lastgap; 1809 if (writeend >= lastgap) 1810 writeend += free->offset - lastgap; 1811 lastgap = free->offset + free->length; 1812 } 1813 free = this->ecclayout->oobfree; 1814 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1815 int free_end = free->offset + free->length; 1816 if (free->offset < writeend && free_end > writecol) { 1817 int st = max_t(int,free->offset,writecol); 1818 int ed = min_t(int,free_end,writeend); 1819 int n = ed - st; 1820 memcpy(oob_buf + st, buf, n); 1821 buf += n; 1822 } else if (column == 0) 1823 break; 1824 } 1825 return 0; 1826} 1827 1828/** 1829 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band 1830 * @param mtd MTD device structure 1831 * @param to offset to write to 1832 * @param ops oob operation description structure 1833 * 1834 * Write main and/or oob with ECC 1835 */ 1836static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, 1837 struct mtd_oob_ops *ops) 1838{ 1839 struct onenand_chip *this = mtd->priv; 1840 int written = 0, column, thislen = 0, subpage = 0; 1841 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1; 1842 int oobwritten = 0, oobcolumn, thisooblen, oobsize; 1843 size_t len = ops->len; 1844 size_t ooblen = ops->ooblen; 1845 const u_char *buf = ops->datbuf; 1846 const u_char *oob = ops->oobbuf; 1847 u_char *oobbuf; 1848 int ret = 0; 1849 1850 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", 1851 __func__, (unsigned int) to, (int) len); 1852 1853 /* Initialize retlen, in case of early exit */ 1854 ops->retlen = 0; 1855 ops->oobretlen = 0; 1856 1857 /* Do not allow writes past end of device */ 1858 if (unlikely((to + len) > mtd->size)) { 1859 printk(KERN_ERR "%s: Attempt write to past end of device\n", 1860 __func__); 1861 return -EINVAL; 1862 } 1863 1864 /* Reject writes, which are not page aligned */ 1865 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { 1866 printk(KERN_ERR "%s: Attempt to write not page aligned data\n", 1867 __func__); 1868 return -EINVAL; 1869 } 1870 1871 /* Check zero length */ 1872 if (!len) 1873 return 0; 1874 1875 if (ops->mode == MTD_OOB_AUTO) 1876 oobsize = this->ecclayout->oobavail; 1877 else 1878 oobsize = mtd->oobsize; 1879 1880 oobcolumn = to & (mtd->oobsize - 1); 1881 1882 column = to & (mtd->writesize - 1); 1883 1884 /* Loop until all data write */ 1885 while (1) { 1886 if (written < len) { 1887 u_char *wbuf = (u_char *) buf; 1888 1889 thislen = min_t(int, mtd->writesize - column, len - written); 1890 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten); 1891 1892 cond_resched(); 1893 1894 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1895 1896 /* Partial page write */ 1897 subpage = thislen < mtd->writesize; 1898 if (subpage) { 1899 memset(this->page_buf, 0xff, mtd->writesize); 1900 memcpy(this->page_buf + column, buf, thislen); 1901 wbuf = this->page_buf; 1902 } 1903 1904 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1905 1906 if (oob) { 1907 oobbuf = this->oob_buf; 1908 1909 /* We send data to spare ram with oobsize 1910 * to prevent byte access */ 1911 memset(oobbuf, 0xff, mtd->oobsize); 1912 if (ops->mode == MTD_OOB_AUTO) 1913 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen); 1914 else 1915 memcpy(oobbuf + oobcolumn, oob, thisooblen); 1916 1917 oobwritten += thisooblen; 1918 oob += thisooblen; 1919 oobcolumn = 0; 1920 } else 1921 oobbuf = (u_char *) ffchars; 1922 1923 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 1924 } else 1925 ONENAND_SET_NEXT_BUFFERRAM(this); 1926 1927 /* 1928 * 2 PLANE, MLC, and Flex-OneNAND do not support 1929 * write-while-program feature. 1930 */ 1931 if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) { 1932 ONENAND_SET_PREV_BUFFERRAM(this); 1933 1934 ret = this->wait(mtd, FL_WRITING); 1935 1936 /* In partial page write we don't update bufferram */ 1937 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage); 1938 if (ret) { 1939 written -= prevlen; 1940 printk(KERN_ERR "%s: write failed %d\n", 1941 __func__, ret); 1942 break; 1943 } 1944 1945 if (written == len) { 1946 /* Only check verify write turn on */ 1947 ret = onenand_verify(mtd, buf - len, to - len, len); 1948 if (ret) 1949 printk(KERN_ERR "%s: verify failed %d\n", 1950 __func__, ret); 1951 break; 1952 } 1953 1954 ONENAND_SET_NEXT_BUFFERRAM(this); 1955 } 1956 1957 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); 1958 1959 /* 1960 * 2 PLANE, MLC, and Flex-OneNAND wait here 1961 */ 1962 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) { 1963 ret = this->wait(mtd, FL_WRITING); 1964 1965 /* In partial page write we don't update bufferram */ 1966 onenand_update_bufferram(mtd, to, !ret && !subpage); 1967 if (ret) { 1968 printk(KERN_ERR "%s: write failed %d\n", 1969 __func__, ret); 1970 break; 1971 } 1972 1973 /* Only check verify write turn on */ 1974 ret = onenand_verify(mtd, buf, to, thislen); 1975 if (ret) { 1976 printk(KERN_ERR "%s: verify failed %d\n", 1977 __func__, ret); 1978 break; 1979 } 1980 1981 written += thislen; 1982 1983 if (written == len) 1984 break; 1985 1986 } else 1987 written += thislen; 1988 1989 column = 0; 1990 prev_subpage = subpage; 1991 prev = to; 1992 prevlen = thislen; 1993 to += thislen; 1994 buf += thislen; 1995 first = 0; 1996 } 1997 1998 /* In error case, clear all bufferrams */ 1999 if (written != len) 2000 onenand_invalidate_bufferram(mtd, 0, -1); 2001 2002 ops->retlen = written; 2003 ops->oobretlen = oobwritten; 2004 2005 return ret; 2006} 2007 2008 2009/** 2010 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band 2011 * @param mtd MTD device structure 2012 * @param to offset to write to 2013 * @param len number of bytes to write 2014 * @param retlen pointer to variable to store the number of written bytes 2015 * @param buf the data to write 2016 * @param mode operation mode 2017 * 2018 * OneNAND write out-of-band 2019 */ 2020static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to, 2021 struct mtd_oob_ops *ops) 2022{ 2023 struct onenand_chip *this = mtd->priv; 2024 int column, ret = 0, oobsize; 2025 int written = 0, oobcmd; 2026 u_char *oobbuf; 2027 size_t len = ops->ooblen; 2028 const u_char *buf = ops->oobbuf; 2029 mtd_oob_mode_t mode = ops->mode; 2030 2031 to += ops->ooboffs; 2032 2033 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", 2034 __func__, (unsigned int) to, (int) len); 2035 2036 /* Initialize retlen, in case of early exit */ 2037 ops->oobretlen = 0; 2038 2039 if (mode == MTD_OOB_AUTO) 2040 oobsize = this->ecclayout->oobavail; 2041 else 2042 oobsize = mtd->oobsize; 2043 2044 column = to & (mtd->oobsize - 1); 2045 2046 if (unlikely(column >= oobsize)) { 2047 printk(KERN_ERR "%s: Attempted to start write outside oob\n", 2048 __func__); 2049 return -EINVAL; 2050 } 2051 2052 /* For compatibility with NAND: Do not allow write past end of page */ 2053 if (unlikely(column + len > oobsize)) { 2054 printk(KERN_ERR "%s: Attempt to write past end of page\n", 2055 __func__); 2056 return -EINVAL; 2057 } 2058 2059 /* Do not allow reads past end of device */ 2060 if (unlikely(to >= mtd->size || 2061 column + len > ((mtd->size >> this->page_shift) - 2062 (to >> this->page_shift)) * oobsize)) { 2063 printk(KERN_ERR "%s: Attempted to write past end of device\n", 2064 __func__); 2065 return -EINVAL; 2066 } 2067 2068 oobbuf = this->oob_buf; 2069 2070 oobcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB; 2071 2072 /* Loop until all data write */ 2073 while (written < len) { 2074 int thislen = min_t(int, oobsize, len - written); 2075 2076 cond_resched(); 2077 2078 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); 2079 2080 /* We send data to spare ram with oobsize 2081 * to prevent byte access */ 2082 memset(oobbuf, 0xff, mtd->oobsize); 2083 if (mode == MTD_OOB_AUTO) 2084 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen); 2085 else 2086 memcpy(oobbuf + column, buf, thislen); 2087 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 2088 2089 if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) { 2090 /* Set main area of DataRAM to 0xff*/ 2091 memset(this->page_buf, 0xff, mtd->writesize); 2092 this->write_bufferram(mtd, ONENAND_DATARAM, 2093 this->page_buf, 0, mtd->writesize); 2094 } 2095 2096 this->command(mtd, oobcmd, to, mtd->oobsize); 2097 2098 onenand_update_bufferram(mtd, to, 0); 2099 if (ONENAND_IS_2PLANE(this)) { 2100 ONENAND_SET_BUFFERRAM1(this); 2101 onenand_update_bufferram(mtd, to + this->writesize, 0); 2102 } 2103 2104 ret = this->wait(mtd, FL_WRITING); 2105 if (ret) { 2106 printk(KERN_ERR "%s: write failed %d\n", __func__, ret); 2107 break; 2108 } 2109 2110 ret = onenand_verify_oob(mtd, oobbuf, to); 2111 if (ret) { 2112 printk(KERN_ERR "%s: verify failed %d\n", 2113 __func__, ret); 2114 break; 2115 } 2116 2117 written += thislen; 2118 if (written == len) 2119 break; 2120 2121 to += mtd->writesize; 2122 buf += thislen; 2123 column = 0; 2124 } 2125 2126 ops->oobretlen = written; 2127 2128 return ret; 2129} 2130 2131/** 2132 * onenand_write - [MTD Interface] write buffer to FLASH 2133 * @param mtd MTD device structure 2134 * @param to offset to write to 2135 * @param len number of bytes to write 2136 * @param retlen pointer to variable to store the number of written bytes 2137 * @param buf the data to write 2138 * 2139 * Write with ECC 2140 */ 2141static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, 2142 size_t *retlen, const u_char *buf) 2143{ 2144 struct mtd_oob_ops ops = { 2145 .len = len, 2146 .ooblen = 0, 2147 .datbuf = (u_char *) buf, 2148 .oobbuf = NULL, 2149 }; 2150 int ret; 2151 2152 onenand_get_device(mtd, FL_WRITING); 2153 ret = onenand_write_ops_nolock(mtd, to, &ops); 2154 onenand_release_device(mtd); 2155 2156 *retlen = ops.retlen; 2157 return ret; 2158} 2159 2160/** 2161 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band 2162 * @param mtd: MTD device structure 2163 * @param to: offset to write 2164 * @param ops: oob operation description structure 2165 */ 2166static int onenand_write_oob(struct mtd_info *mtd, loff_t to, 2167 struct mtd_oob_ops *ops) 2168{ 2169 int ret; 2170 2171 switch (ops->mode) { 2172 case MTD_OOB_PLACE: 2173 case MTD_OOB_AUTO: 2174 break; 2175 case MTD_OOB_RAW: 2176 /* Not implemented yet */ 2177 default: 2178 return -EINVAL; 2179 } 2180 2181 onenand_get_device(mtd, FL_WRITING); 2182 if (ops->datbuf) 2183 ret = onenand_write_ops_nolock(mtd, to, ops); 2184 else 2185 ret = onenand_write_oob_nolock(mtd, to, ops); 2186 onenand_release_device(mtd); 2187 2188 return ret; 2189} 2190 2191/** 2192 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad 2193 * @param mtd MTD device structure 2194 * @param ofs offset from device start 2195 * @param allowbbt 1, if its allowed to access the bbt area 2196 * 2197 * Check, if the block is bad. Either by reading the bad block table or 2198 * calling of the scan function. 2199 */ 2200static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt) 2201{ 2202 struct onenand_chip *this = mtd->priv; 2203 struct bbm_info *bbm = this->bbm; 2204 2205 /* Return info from the table */ 2206 return bbm->isbad_bbt(mtd, ofs, allowbbt); 2207} 2208 2209 2210static int onenand_multiblock_erase_verify(struct mtd_info *mtd, 2211 struct erase_info *instr) 2212{ 2213 struct onenand_chip *this = mtd->priv; 2214 loff_t addr = instr->addr; 2215 int len = instr->len; 2216 unsigned int block_size = (1 << this->erase_shift); 2217 int ret = 0; 2218 2219 while (len) { 2220 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size); 2221 ret = this->wait(mtd, FL_VERIFYING_ERASE); 2222 if (ret) { 2223 printk(KERN_ERR "%s: Failed verify, block %d\n", 2224 __func__, onenand_block(this, addr)); 2225 instr->state = MTD_ERASE_FAILED; 2226 instr->fail_addr = addr; 2227 return -1; 2228 } 2229 len -= block_size; 2230 addr += block_size; 2231 } 2232 return 0; 2233} 2234 2235/** 2236 * onenand_multiblock_erase - [Internal] erase block(s) using multiblock erase 2237 * @param mtd MTD device structure 2238 * @param instr erase instruction 2239 * @param region erase region 2240 * 2241 * Erase one or more blocks up to 64 block at a time 2242 */ 2243static int onenand_multiblock_erase(struct mtd_info *mtd, 2244 struct erase_info *instr, 2245 unsigned int block_size) 2246{ 2247 struct onenand_chip *this = mtd->priv; 2248 loff_t addr = instr->addr; 2249 int len = instr->len; 2250 int eb_count = 0; 2251 int ret = 0; 2252 int bdry_block = 0; 2253 2254 instr->state = MTD_ERASING; 2255 2256 if (ONENAND_IS_DDP(this)) { 2257 loff_t bdry_addr = this->chipsize >> 1; 2258 if (addr < bdry_addr && (addr + len) > bdry_addr) 2259 bdry_block = bdry_addr >> this->erase_shift; 2260 } 2261 2262 /* Pre-check bbs */ 2263 while (len) { 2264 /* Check if we have a bad block, we do not erase bad blocks */ 2265 if (onenand_block_isbad_nolock(mtd, addr, 0)) { 2266 printk(KERN_WARNING "%s: attempt to erase a bad block " 2267 "at addr 0x%012llx\n", 2268 __func__, (unsigned long long) addr); 2269 instr->state = MTD_ERASE_FAILED; 2270 return -EIO; 2271 } 2272 len -= block_size; 2273 addr += block_size; 2274 } 2275 2276 len = instr->len; 2277 addr = instr->addr; 2278 2279 /* loop over 64 eb batches */ 2280 while (len) { 2281 struct erase_info verify_instr = *instr; 2282 int max_eb_count = MB_ERASE_MAX_BLK_COUNT; 2283 2284 verify_instr.addr = addr; 2285 verify_instr.len = 0; 2286 2287 /* do not cross chip boundary */ 2288 if (bdry_block) { 2289 int this_block = (addr >> this->erase_shift); 2290 2291 if (this_block < bdry_block) { 2292 max_eb_count = min(max_eb_count, 2293 (bdry_block - this_block)); 2294 } 2295 } 2296 2297 eb_count = 0; 2298 2299 while (len > block_size && eb_count < (max_eb_count - 1)) { 2300 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE, 2301 addr, block_size); 2302 onenand_invalidate_bufferram(mtd, addr, block_size); 2303 2304 ret = this->wait(mtd, FL_PREPARING_ERASE); 2305 if (ret) { 2306 printk(KERN_ERR "%s: Failed multiblock erase, " 2307 "block %d\n", __func__, 2308 onenand_block(this, addr)); 2309 instr->state = MTD_ERASE_FAILED; 2310 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; 2311 return -EIO; 2312 } 2313 2314 len -= block_size; 2315 addr += block_size; 2316 eb_count++; 2317 } 2318 2319 /* last block of 64-eb series */ 2320 cond_resched(); 2321 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 2322 onenand_invalidate_bufferram(mtd, addr, block_size); 2323 2324 ret = this->wait(mtd, FL_ERASING); 2325 /* Check if it is write protected */ 2326 if (ret) { 2327 printk(KERN_ERR "%s: Failed erase, block %d\n", 2328 __func__, onenand_block(this, addr)); 2329 instr->state = MTD_ERASE_FAILED; 2330 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; 2331 return -EIO; 2332 } 2333 2334 len -= block_size; 2335 addr += block_size; 2336 eb_count++; 2337 2338 /* verify */ 2339 verify_instr.len = eb_count * block_size; 2340 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) { 2341 instr->state = verify_instr.state; 2342 instr->fail_addr = verify_instr.fail_addr; 2343 return -EIO; 2344 } 2345 2346 } 2347 return 0; 2348} 2349 2350 2351/** 2352 * onenand_block_by_block_erase - [Internal] erase block(s) using regular erase 2353 * @param mtd MTD device structure 2354 * @param instr erase instruction 2355 * @param region erase region 2356 * @param block_size erase block size 2357 * 2358 * Erase one or more blocks one block at a time 2359 */ 2360static int onenand_block_by_block_erase(struct mtd_info *mtd, 2361 struct erase_info *instr, 2362 struct mtd_erase_region_info *region, 2363 unsigned int block_size) 2364{ 2365 struct onenand_chip *this = mtd->priv; 2366 loff_t addr = instr->addr; 2367 int len = instr->len; 2368 loff_t region_end = 0; 2369 int ret = 0; 2370 2371 if (region) { 2372 /* region is set for Flex-OneNAND */ 2373 region_end = region->offset + region->erasesize * region->numblocks; 2374 } 2375 2376 instr->state = MTD_ERASING; 2377 2378 /* Loop through the blocks */ 2379 while (len) { 2380 cond_resched(); 2381 2382 /* Check if we have a bad block, we do not erase bad blocks */ 2383 if (onenand_block_isbad_nolock(mtd, addr, 0)) { 2384 printk(KERN_WARNING "%s: attempt to erase a bad block " 2385 "at addr 0x%012llx\n", 2386 __func__, (unsigned long long) addr); 2387 instr->state = MTD_ERASE_FAILED; 2388 return -EIO; 2389 } 2390 2391 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 2392 2393 onenand_invalidate_bufferram(mtd, addr, block_size); 2394 2395 ret = this->wait(mtd, FL_ERASING); 2396 /* Check, if it is write protected */ 2397 if (ret) { 2398 printk(KERN_ERR "%s: Failed erase, block %d\n", 2399 __func__, onenand_block(this, addr)); 2400 instr->state = MTD_ERASE_FAILED; 2401 instr->fail_addr = addr; 2402 return -EIO; 2403 } 2404 2405 len -= block_size; 2406 addr += block_size; 2407 2408 if (addr == region_end) { 2409 if (!len) 2410 break; 2411 region++; 2412 2413 block_size = region->erasesize; 2414 region_end = region->offset + region->erasesize * region->numblocks; 2415 2416 if (len & (block_size - 1)) { 2417 printk(KERN_ERR "%s: Unaligned address\n", 2418 __func__); 2419 return -EIO; 2420 } 2421 } 2422 } 2423 return 0; 2424} 2425 2426/** 2427 * onenand_erase - [MTD Interface] erase block(s) 2428 * @param mtd MTD device structure 2429 * @param instr erase instruction 2430 * 2431 * Erase one or more blocks 2432 */ 2433static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) 2434{ 2435 struct onenand_chip *this = mtd->priv; 2436 unsigned int block_size; 2437 loff_t addr = instr->addr; 2438 loff_t len = instr->len; 2439 int ret = 0; 2440 struct mtd_erase_region_info *region = NULL; 2441 loff_t region_offset = 0; 2442 2443 DEBUG(MTD_DEBUG_LEVEL3, "%s: start=0x%012llx, len=%llu\n", __func__, 2444 (unsigned long long) instr->addr, (unsigned long long) instr->len); 2445 2446 /* Do not allow erase past end of device */ 2447 if (unlikely((len + addr) > mtd->size)) { 2448 printk(KERN_ERR "%s: Erase past end of device\n", __func__); 2449 return -EINVAL; 2450 } 2451 2452 if (FLEXONENAND(this)) { 2453 /* Find the eraseregion of this address */ 2454 int i = flexonenand_region(mtd, addr); 2455 2456 region = &mtd->eraseregions[i]; 2457 block_size = region->erasesize; 2458 2459 /* Start address within region must align on block boundary. 2460 * Erase region's start offset is always block start address. 2461 */ 2462 region_offset = region->offset; 2463 } else 2464 block_size = 1 << this->erase_shift; 2465 2466 /* Start address must align on block boundary */ 2467 if (unlikely((addr - region_offset) & (block_size - 1))) { 2468 printk(KERN_ERR "%s: Unaligned address\n", __func__); 2469 return -EINVAL; 2470 } 2471 2472 /* Length must align on block boundary */ 2473 if (unlikely(len & (block_size - 1))) { 2474 printk(KERN_ERR "%s: Length not block aligned\n", __func__); 2475 return -EINVAL; 2476 } 2477 2478 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; 2479 2480 /* Grab the lock and see if the device is available */ 2481 onenand_get_device(mtd, FL_ERASING); 2482 2483 if (region || instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) { 2484 /* region is set for Flex-OneNAND (no mb erase) */ 2485 ret = onenand_block_by_block_erase(mtd, instr, 2486 region, block_size); 2487 } else { 2488 ret = onenand_multiblock_erase(mtd, instr, block_size); 2489 } 2490 2491 /* Deselect and wake up anyone waiting on the device */ 2492 onenand_release_device(mtd); 2493 2494 /* Do call back function */ 2495 if (!ret) { 2496 instr->state = MTD_ERASE_DONE; 2497 mtd_erase_callback(instr); 2498 } 2499 2500 return ret; 2501} 2502 2503/** 2504 * onenand_sync - [MTD Interface] sync 2505 * @param mtd MTD device structure 2506 * 2507 * Sync is actually a wait for chip ready function 2508 */ 2509static void onenand_sync(struct mtd_info *mtd) 2510{ 2511 DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__); 2512 2513 /* Grab the lock and see if the device is available */ 2514 onenand_get_device(mtd, FL_SYNCING); 2515 2516 /* Release it and go back */ 2517 onenand_release_device(mtd); 2518} 2519 2520/** 2521 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad 2522 * @param mtd MTD device structure 2523 * @param ofs offset relative to mtd start 2524 * 2525 * Check whether the block is bad 2526 */ 2527static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) 2528{ 2529 int ret; 2530 2531 /* Check for invalid offset */ 2532 if (ofs > mtd->size) 2533 return -EINVAL; 2534 2535 onenand_get_device(mtd, FL_READING); 2536 ret = onenand_block_isbad_nolock(mtd, ofs, 0); 2537 onenand_release_device(mtd); 2538 return ret; 2539} 2540 2541/** 2542 * onenand_default_block_markbad - [DEFAULT] mark a block bad 2543 * @param mtd MTD device structure 2544 * @param ofs offset from device start 2545 * 2546 * This is the default implementation, which can be overridden by 2547 * a hardware specific driver. 2548 */ 2549static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) 2550{ 2551 struct onenand_chip *this = mtd->priv; 2552 struct bbm_info *bbm = this->bbm; 2553 u_char buf[2] = {0, 0}; 2554 struct mtd_oob_ops ops = { 2555 .mode = MTD_OOB_PLACE, 2556 .ooblen = 2, 2557 .oobbuf = buf, 2558 .ooboffs = 0, 2559 }; 2560 int block; 2561 2562 /* Get block number */ 2563 block = onenand_block(this, ofs); 2564 if (bbm->bbt) 2565 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); 2566 2567 /* We write two bytes, so we don't have to mess with 16-bit access */ 2568 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01); 2569 return onenand_write_oob_nolock(mtd, ofs, &ops); 2570} 2571 2572/** 2573 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad 2574 * @param mtd MTD device structure 2575 * @param ofs offset relative to mtd start 2576 * 2577 * Mark the block as bad 2578 */ 2579static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) 2580{ 2581 struct onenand_chip *this = mtd->priv; 2582 int ret; 2583 2584 ret = onenand_block_isbad(mtd, ofs); 2585 if (ret) { 2586 /* If it was bad already, return success and do nothing */ 2587 if (ret > 0) 2588 return 0; 2589 return ret; 2590 } 2591 2592 onenand_get_device(mtd, FL_WRITING); 2593 ret = this->block_markbad(mtd, ofs); 2594 onenand_release_device(mtd); 2595 return ret; 2596} 2597 2598/** 2599 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s) 2600 * @param mtd MTD device structure 2601 * @param ofs offset relative to mtd start 2602 * @param len number of bytes to lock or unlock 2603 * @param cmd lock or unlock command 2604 * 2605 * Lock or unlock one or more blocks 2606 */ 2607static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd) 2608{ 2609 struct onenand_chip *this = mtd->priv; 2610 int start, end, block, value, status; 2611 int wp_status_mask; 2612 2613 start = onenand_block(this, ofs); 2614 end = onenand_block(this, ofs + len) - 1; 2615 2616 if (cmd == ONENAND_CMD_LOCK) 2617 wp_status_mask = ONENAND_WP_LS; 2618 else 2619 wp_status_mask = ONENAND_WP_US; 2620 2621 /* Continuous lock scheme */ 2622 if (this->options & ONENAND_HAS_CONT_LOCK) { 2623 /* Set start block address */ 2624 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2625 /* Set end block address */ 2626 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS); 2627 /* Write lock command */ 2628 this->command(mtd, cmd, 0, 0); 2629 2630 /* There's no return value */ 2631 this->wait(mtd, FL_LOCKING); 2632 2633 /* Sanity check */ 2634 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2635 & ONENAND_CTRL_ONGO) 2636 continue; 2637 2638 /* Check lock status */ 2639 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2640 if (!(status & wp_status_mask)) 2641 printk(KERN_ERR "%s: wp status = 0x%x\n", 2642 __func__, status); 2643 2644 return 0; 2645 } 2646 2647 /* Block lock scheme */ 2648 for (block = start; block < end + 1; block++) { 2649 /* Set block address */ 2650 value = onenand_block_address(this, block); 2651 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 2652 /* Select DataRAM for DDP */ 2653 value = onenand_bufferram_address(this, block); 2654 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 2655 /* Set start block address */ 2656 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2657 /* Write lock command */ 2658 this->command(mtd, cmd, 0, 0); 2659 2660 /* There's no return value */ 2661 this->wait(mtd, FL_LOCKING); 2662 2663 /* Sanity check */ 2664 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2665 & ONENAND_CTRL_ONGO) 2666 continue; 2667 2668 /* Check lock status */ 2669 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2670 if (!(status & wp_status_mask)) 2671 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n", 2672 __func__, block, status); 2673 } 2674 2675 return 0; 2676} 2677 2678/** 2679 * onenand_lock - [MTD Interface] Lock block(s) 2680 * @param mtd MTD device structure 2681 * @param ofs offset relative to mtd start 2682 * @param len number of bytes to unlock 2683 * 2684 * Lock one or more blocks 2685 */ 2686static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 2687{ 2688 int ret; 2689 2690 onenand_get_device(mtd, FL_LOCKING); 2691 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK); 2692 onenand_release_device(mtd); 2693 return ret; 2694} 2695 2696/** 2697 * onenand_unlock - [MTD Interface] Unlock block(s) 2698 * @param mtd MTD device structure 2699 * @param ofs offset relative to mtd start 2700 * @param len number of bytes to unlock 2701 * 2702 * Unlock one or more blocks 2703 */ 2704static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 2705{ 2706 int ret; 2707 2708 onenand_get_device(mtd, FL_LOCKING); 2709 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2710 onenand_release_device(mtd); 2711 return ret; 2712} 2713 2714/** 2715 * onenand_check_lock_status - [OneNAND Interface] Check lock status 2716 * @param this onenand chip data structure 2717 * 2718 * Check lock status 2719 */ 2720static int onenand_check_lock_status(struct onenand_chip *this) 2721{ 2722 unsigned int value, block, status; 2723 unsigned int end; 2724 2725 end = this->chipsize >> this->erase_shift; 2726 for (block = 0; block < end; block++) { 2727 /* Set block address */ 2728 value = onenand_block_address(this, block); 2729 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 2730 /* Select DataRAM for DDP */ 2731 value = onenand_bufferram_address(this, block); 2732 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 2733 /* Set start block address */ 2734 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2735 2736 /* Check lock status */ 2737 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2738 if (!(status & ONENAND_WP_US)) { 2739 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n", 2740 __func__, block, status); 2741 return 0; 2742 } 2743 } 2744 2745 return 1; 2746} 2747 2748/** 2749 * onenand_unlock_all - [OneNAND Interface] unlock all blocks 2750 * @param mtd MTD device structure 2751 * 2752 * Unlock all blocks 2753 */ 2754static void onenand_unlock_all(struct mtd_info *mtd) 2755{ 2756 struct onenand_chip *this = mtd->priv; 2757 loff_t ofs = 0; 2758 loff_t len = mtd->size; 2759 2760 if (this->options & ONENAND_HAS_UNLOCK_ALL) { 2761 /* Set start block address */ 2762 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2763 /* Write unlock command */ 2764 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0); 2765 2766 /* There's no return value */ 2767 this->wait(mtd, FL_LOCKING); 2768 2769 /* Sanity check */ 2770 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2771 & ONENAND_CTRL_ONGO) 2772 continue; 2773 2774 /* Don't check lock status */ 2775 if (this->options & ONENAND_SKIP_UNLOCK_CHECK) 2776 return; 2777 2778 /* Check lock status */ 2779 if (onenand_check_lock_status(this)) 2780 return; 2781 2782 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) { 2783 /* All blocks on another chip */ 2784 ofs = this->chipsize >> 1; 2785 len = this->chipsize >> 1; 2786 } 2787 } 2788 2789 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2790} 2791 2792#ifdef CONFIG_MTD_ONENAND_OTP 2793 2794/** 2795 * onenand_otp_command - Send OTP specific command to OneNAND device 2796 * @param mtd MTD device structure 2797 * @param cmd the command to be sent 2798 * @param addr offset to read from or write to 2799 * @param len number of bytes to read or write 2800 */ 2801static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr, 2802 size_t len) 2803{ 2804 struct onenand_chip *this = mtd->priv; 2805 int value, block, page; 2806 2807 /* Address translation */ 2808 switch (cmd) { 2809 case ONENAND_CMD_OTP_ACCESS: 2810 block = (int) (addr >> this->erase_shift); 2811 page = -1; 2812 break; 2813 2814 default: 2815 block = (int) (addr >> this->erase_shift); 2816 page = (int) (addr >> this->page_shift); 2817 2818 if (ONENAND_IS_2PLANE(this)) { 2819 /* Make the even block number */ 2820 block &= ~1; 2821 /* Is it the odd plane? */ 2822 if (addr & this->writesize) 2823 block++; 2824 page >>= 1; 2825 } 2826 page &= this->page_mask; 2827 break; 2828 } 2829 2830 if (block != -1) { 2831 /* Write 'DFS, FBA' of Flash */ 2832 value = onenand_block_address(this, block); 2833 this->write_word(value, this->base + 2834 ONENAND_REG_START_ADDRESS1); 2835 } 2836 2837 if (page != -1) { 2838 /* Now we use page size operation */ 2839 int sectors = 4, count = 4; 2840 int dataram; 2841 2842 switch (cmd) { 2843 default: 2844 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG) 2845 cmd = ONENAND_CMD_2X_PROG; 2846 dataram = ONENAND_CURRENT_BUFFERRAM(this); 2847 break; 2848 } 2849 2850 /* Write 'FPA, FSA' of Flash */ 2851 value = onenand_page_address(page, sectors); 2852 this->write_word(value, this->base + 2853 ONENAND_REG_START_ADDRESS8); 2854 2855 /* Write 'BSA, BSC' of DataRAM */ 2856 value = onenand_buffer_address(dataram, sectors, count); 2857 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 2858 } 2859 2860 /* Interrupt clear */ 2861 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 2862 2863 /* Write command */ 2864 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 2865 2866 return 0; 2867} 2868 2869/** 2870 * onenand_otp_write_oob_nolock - [Internal] OneNAND write out-of-band, specific to OTP 2871 * @param mtd MTD device structure 2872 * @param to offset to write to 2873 * @param len number of bytes to write 2874 * @param retlen pointer to variable to store the number of written bytes 2875 * @param buf the data to write 2876 * 2877 * OneNAND write out-of-band only for OTP 2878 */ 2879static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to, 2880 struct mtd_oob_ops *ops) 2881{ 2882 struct onenand_chip *this = mtd->priv; 2883 int column, ret = 0, oobsize; 2884 int written = 0; 2885 u_char *oobbuf; 2886 size_t len = ops->ooblen; 2887 const u_char *buf = ops->oobbuf; 2888 int block, value, status; 2889 2890 to += ops->ooboffs; 2891 2892 /* Initialize retlen, in case of early exit */ 2893 ops->oobretlen = 0; 2894 2895 oobsize = mtd->oobsize; 2896 2897 column = to & (mtd->oobsize - 1); 2898 2899 oobbuf = this->oob_buf; 2900 2901 /* Loop until all data write */ 2902 while (written < len) { 2903 int thislen = min_t(int, oobsize, len - written); 2904 2905 cond_resched(); 2906 2907 block = (int) (to >> this->erase_shift); 2908 /* 2909 * Write 'DFS, FBA' of Flash 2910 * Add: F100h DQ=DFS, FBA 2911 */ 2912 2913 value = onenand_block_address(this, block); 2914 this->write_word(value, this->base + 2915 ONENAND_REG_START_ADDRESS1); 2916 2917 /* 2918 * Select DataRAM for DDP 2919 * Add: F101h DQ=DBS 2920 */ 2921 2922 value = onenand_bufferram_address(this, block); 2923 this->write_word(value, this->base + 2924 ONENAND_REG_START_ADDRESS2); 2925 ONENAND_SET_NEXT_BUFFERRAM(this); 2926 2927 /* 2928 * Enter OTP access mode 2929 */ 2930 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2931 this->wait(mtd, FL_OTPING); 2932 2933 /* We send data to spare ram with oobsize 2934 * to prevent byte access */ 2935 memcpy(oobbuf + column, buf, thislen); 2936 2937 /* 2938 * Write Data into DataRAM 2939 * Add: 8th Word 2940 * in sector0/spare/page0 2941 * DQ=XXFCh 2942 */ 2943 this->write_bufferram(mtd, ONENAND_SPARERAM, 2944 oobbuf, 0, mtd->oobsize); 2945 2946 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); 2947 onenand_update_bufferram(mtd, to, 0); 2948 if (ONENAND_IS_2PLANE(this)) { 2949 ONENAND_SET_BUFFERRAM1(this); 2950 onenand_update_bufferram(mtd, to + this->writesize, 0); 2951 } 2952 2953 ret = this->wait(mtd, FL_WRITING); 2954 if (ret) { 2955 printk(KERN_ERR "%s: write failed %d\n", __func__, ret); 2956 break; 2957 } 2958 2959 /* Exit OTP access mode */ 2960 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2961 this->wait(mtd, FL_RESETING); 2962 2963 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 2964 status &= 0x60; 2965 2966 if (status == 0x60) { 2967 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); 2968 printk(KERN_DEBUG "1st Block\tLOCKED\n"); 2969 printk(KERN_DEBUG "OTP Block\tLOCKED\n"); 2970 } else if (status == 0x20) { 2971 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); 2972 printk(KERN_DEBUG "1st Block\tLOCKED\n"); 2973 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n"); 2974 } else if (status == 0x40) { 2975 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); 2976 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n"); 2977 printk(KERN_DEBUG "OTP Block\tLOCKED\n"); 2978 } else { 2979 printk(KERN_DEBUG "Reboot to check\n"); 2980 } 2981 2982 written += thislen; 2983 if (written == len) 2984 break; 2985 2986 to += mtd->writesize; 2987 buf += thislen; 2988 column = 0; 2989 } 2990 2991 ops->oobretlen = written; 2992 2993 return ret; 2994} 2995 2996/* Internal OTP operation */ 2997typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len, 2998 size_t *retlen, u_char *buf); 2999 3000/** 3001 * do_otp_read - [DEFAULT] Read OTP block area 3002 * @param mtd MTD device structure 3003 * @param from The offset to read 3004 * @param len number of bytes to read 3005 * @param retlen pointer to variable to store the number of readbytes 3006 * @param buf the databuffer to put/get data 3007 * 3008 * Read OTP block area. 3009 */ 3010static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len, 3011 size_t *retlen, u_char *buf) 3012{ 3013 struct onenand_chip *this = mtd->priv; 3014 struct mtd_oob_ops ops = { 3015 .len = len, 3016 .ooblen = 0, 3017 .datbuf = buf, 3018 .oobbuf = NULL, 3019 }; 3020 int ret; 3021 3022 /* Enter OTP access mode */ 3023 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 3024 this->wait(mtd, FL_OTPING); 3025 3026 ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ? 3027 onenand_mlc_read_ops_nolock(mtd, from, &ops) : 3028 onenand_read_ops_nolock(mtd, from, &ops); 3029 3030 /* Exit OTP access mode */ 3031 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3032 this->wait(mtd, FL_RESETING); 3033 3034 return ret; 3035} 3036 3037/** 3038 * do_otp_write - [DEFAULT] Write OTP block area 3039 * @param mtd MTD device structure 3040 * @param to The offset to write 3041 * @param len number of bytes to write 3042 * @param retlen pointer to variable to store the number of write bytes 3043 * @param buf the databuffer to put/get data 3044 * 3045 * Write OTP block area. 3046 */ 3047static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len, 3048 size_t *retlen, u_char *buf) 3049{ 3050 struct onenand_chip *this = mtd->priv; 3051 unsigned char *pbuf = buf; 3052 int ret; 3053 struct mtd_oob_ops ops; 3054 3055 /* Force buffer page aligned */ 3056 if (len < mtd->writesize) { 3057 memcpy(this->page_buf, buf, len); 3058 memset(this->page_buf + len, 0xff, mtd->writesize - len); 3059 pbuf = this->page_buf; 3060 len = mtd->writesize; 3061 } 3062 3063 /* Enter OTP access mode */ 3064 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 3065 this->wait(mtd, FL_OTPING); 3066 3067 ops.len = len; 3068 ops.ooblen = 0; 3069 ops.datbuf = pbuf; 3070 ops.oobbuf = NULL; 3071 ret = onenand_write_ops_nolock(mtd, to, &ops); 3072 *retlen = ops.retlen; 3073 3074 /* Exit OTP access mode */ 3075 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3076 this->wait(mtd, FL_RESETING); 3077 3078 return ret; 3079} 3080 3081/** 3082 * do_otp_lock - [DEFAULT] Lock OTP block area 3083 * @param mtd MTD device structure 3084 * @param from The offset to lock 3085 * @param len number of bytes to lock 3086 * @param retlen pointer to variable to store the number of lock bytes 3087 * @param buf the databuffer to put/get data 3088 * 3089 * Lock OTP block area. 3090 */ 3091static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len, 3092 size_t *retlen, u_char *buf) 3093{ 3094 struct onenand_chip *this = mtd->priv; 3095 struct mtd_oob_ops ops; 3096 int ret; 3097 3098 if (FLEXONENAND(this)) { 3099 3100 /* Enter OTP access mode */ 3101 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 3102 this->wait(mtd, FL_OTPING); 3103 /* 3104 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of 3105 * main area of page 49. 3106 */ 3107 ops.len = mtd->writesize; 3108 ops.ooblen = 0; 3109 ops.datbuf = buf; 3110 ops.oobbuf = NULL; 3111 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops); 3112 *retlen = ops.retlen; 3113 3114 /* Exit OTP access mode */ 3115 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3116 this->wait(mtd, FL_RESETING); 3117 } else { 3118 ops.mode = MTD_OOB_PLACE; 3119 ops.ooblen = len; 3120 ops.oobbuf = buf; 3121 ops.ooboffs = 0; 3122 ret = onenand_otp_write_oob_nolock(mtd, from, &ops); 3123 *retlen = ops.oobretlen; 3124 } 3125 3126 return ret; 3127} 3128 3129/** 3130 * onenand_otp_walk - [DEFAULT] Handle OTP operation 3131 * @param mtd MTD device structure 3132 * @param from The offset to read/write 3133 * @param len number of bytes to read/write 3134 * @param retlen pointer to variable to store the number of read bytes 3135 * @param buf the databuffer to put/get data 3136 * @param action do given action 3137 * @param mode specify user and factory 3138 * 3139 * Handle OTP operation. 3140 */ 3141static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len, 3142 size_t *retlen, u_char *buf, 3143 otp_op_t action, int mode) 3144{ 3145 struct onenand_chip *this = mtd->priv; 3146 int otp_pages; 3147 int density; 3148 int ret = 0; 3149 3150 *retlen = 0; 3151 3152 density = onenand_get_density(this->device_id); 3153 if (density < ONENAND_DEVICE_DENSITY_512Mb) 3154 otp_pages = 20; 3155 else 3156 otp_pages = 50; 3157 3158 if (mode == MTD_OTP_FACTORY) { 3159 from += mtd->writesize * otp_pages; 3160 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages; 3161 } 3162 3163 /* Check User/Factory boundary */ 3164 if (mode == MTD_OTP_USER) { 3165 if (mtd->writesize * otp_pages < from + len) 3166 return 0; 3167 } else { 3168 if (mtd->writesize * otp_pages < len) 3169 return 0; 3170 } 3171 3172 onenand_get_device(mtd, FL_OTPING); 3173 while (len > 0 && otp_pages > 0) { 3174 if (!action) { /* OTP Info functions */ 3175 struct otp_info *otpinfo; 3176 3177 len -= sizeof(struct otp_info); 3178 if (len <= 0) { 3179 ret = -ENOSPC; 3180 break; 3181 } 3182 3183 otpinfo = (struct otp_info *) buf; 3184 otpinfo->start = from; 3185 otpinfo->length = mtd->writesize; 3186 otpinfo->locked = 0; 3187 3188 from += mtd->writesize; 3189 buf += sizeof(struct otp_info); 3190 *retlen += sizeof(struct otp_info); 3191 } else { 3192 size_t tmp_retlen; 3193 3194 ret = action(mtd, from, len, &tmp_retlen, buf); 3195 3196 buf += tmp_retlen; 3197 len -= tmp_retlen; 3198 *retlen += tmp_retlen; 3199 3200 if (ret) 3201 break; 3202 } 3203 otp_pages--; 3204 } 3205 onenand_release_device(mtd); 3206 3207 return ret; 3208} 3209 3210/** 3211 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info 3212 * @param mtd MTD device structure 3213 * @param buf the databuffer to put/get data 3214 * @param len number of bytes to read 3215 * 3216 * Read factory OTP info. 3217 */ 3218static int onenand_get_fact_prot_info(struct mtd_info *mtd, 3219 struct otp_info *buf, size_t len) 3220{ 3221 size_t retlen; 3222 int ret; 3223 3224 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY); 3225 3226 return ret ? : retlen; 3227} 3228 3229/** 3230 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area 3231 * @param mtd MTD device structure 3232 * @param from The offset to read 3233 * @param len number of bytes to read 3234 * @param retlen pointer to variable to store the number of read bytes 3235 * @param buf the databuffer to put/get data 3236 * 3237 * Read factory OTP area. 3238 */ 3239static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, 3240 size_t len, size_t *retlen, u_char *buf) 3241{ 3242 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY); 3243} 3244 3245/** 3246 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info 3247 * @param mtd MTD device structure 3248 * @param buf the databuffer to put/get data 3249 * @param len number of bytes to read 3250 * 3251 * Read user OTP info. 3252 */ 3253static int onenand_get_user_prot_info(struct mtd_info *mtd, 3254 struct otp_info *buf, size_t len) 3255{ 3256 size_t retlen; 3257 int ret; 3258 3259 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER); 3260 3261 return ret ? : retlen; 3262} 3263 3264/** 3265 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area 3266 * @param mtd MTD device structure 3267 * @param from The offset to read 3268 * @param len number of bytes to read 3269 * @param retlen pointer to variable to store the number of read bytes 3270 * @param buf the databuffer to put/get data 3271 * 3272 * Read user OTP area. 3273 */ 3274static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from, 3275 size_t len, size_t *retlen, u_char *buf) 3276{ 3277 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER); 3278} 3279 3280/** 3281 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area 3282 * @param mtd MTD device structure 3283 * @param from The offset to write 3284 * @param len number of bytes to write 3285 * @param retlen pointer to variable to store the number of write bytes 3286 * @param buf the databuffer to put/get data 3287 * 3288 * Write user OTP area. 3289 */ 3290static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from, 3291 size_t len, size_t *retlen, u_char *buf) 3292{ 3293 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER); 3294} 3295 3296/** 3297 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area 3298 * @param mtd MTD device structure 3299 * @param from The offset to lock 3300 * @param len number of bytes to unlock 3301 * 3302 * Write lock mark on spare area in page 0 in OTP block 3303 */ 3304static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, 3305 size_t len) 3306{ 3307 struct onenand_chip *this = mtd->priv; 3308 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf; 3309 size_t retlen; 3310 int ret; 3311 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET; 3312 3313 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize 3314 : mtd->oobsize); 3315 /* 3316 * Write lock mark to 8th word of sector0 of page0 of the spare0. 3317 * We write 16 bytes spare area instead of 2 bytes. 3318 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of 3319 * main area of page 49. 3320 */ 3321 3322 from = 0; 3323 len = FLEXONENAND(this) ? mtd->writesize : 16; 3324 3325 /* 3326 * Note: OTP lock operation 3327 * OTP block : 0xXXFC XX 1111 1100 3328 * 1st block : 0xXXF3 (If chip support) XX 1111 0011 3329 * Both : 0xXXF0 (If chip support) XX 1111 0000 3330 */ 3331 if (FLEXONENAND(this)) 3332 otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET; 3333 3334 /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */ 3335 if (otp == 1) 3336 buf[otp_lock_offset] = 0xFC; 3337 else if (otp == 2) 3338 buf[otp_lock_offset] = 0xF3; 3339 else if (otp == 3) 3340 buf[otp_lock_offset] = 0xF0; 3341 else if (otp != 0) 3342 printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n"); 3343 3344 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER); 3345 3346 return ret ? : retlen; 3347} 3348 3349#endif /* CONFIG_MTD_ONENAND_OTP */ 3350 3351/** 3352 * onenand_check_features - Check and set OneNAND features 3353 * @param mtd MTD data structure 3354 * 3355 * Check and set OneNAND features 3356 * - lock scheme 3357 * - two plane 3358 */ 3359static void onenand_check_features(struct mtd_info *mtd) 3360{ 3361 struct onenand_chip *this = mtd->priv; 3362 unsigned int density, process; 3363 3364 /* Lock scheme depends on density and process */ 3365 density = onenand_get_density(this->device_id); 3366 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT; 3367 3368 /* Lock scheme */ 3369 switch (density) { 3370 case ONENAND_DEVICE_DENSITY_4Gb: 3371 if (ONENAND_IS_DDP(this)) 3372 this->options |= ONENAND_HAS_2PLANE; 3373 else 3374 this->options |= ONENAND_HAS_4KB_PAGE; 3375 3376 case ONENAND_DEVICE_DENSITY_2Gb: 3377 /* 2Gb DDP does not have 2 plane */ 3378 if (!ONENAND_IS_DDP(this)) 3379 this->options |= ONENAND_HAS_2PLANE; 3380 this->options |= ONENAND_HAS_UNLOCK_ALL; 3381 3382 case ONENAND_DEVICE_DENSITY_1Gb: 3383 /* A-Die has all block unlock */ 3384 if (process) 3385 this->options |= ONENAND_HAS_UNLOCK_ALL; 3386 break; 3387 3388 default: 3389 /* Some OneNAND has continuous lock scheme */ 3390 if (!process) 3391 this->options |= ONENAND_HAS_CONT_LOCK; 3392 break; 3393 } 3394 3395 if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) 3396 this->options &= ~ONENAND_HAS_2PLANE; 3397 3398 if (FLEXONENAND(this)) { 3399 this->options &= ~ONENAND_HAS_CONT_LOCK; 3400 this->options |= ONENAND_HAS_UNLOCK_ALL; 3401 } 3402 3403 if (this->options & ONENAND_HAS_CONT_LOCK) 3404 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n"); 3405 if (this->options & ONENAND_HAS_UNLOCK_ALL) 3406 printk(KERN_DEBUG "Chip support all block unlock\n"); 3407 if (this->options & ONENAND_HAS_2PLANE) 3408 printk(KERN_DEBUG "Chip has 2 plane\n"); 3409 if (this->options & ONENAND_HAS_4KB_PAGE) 3410 printk(KERN_DEBUG "Chip has 4KiB pagesize\n"); 3411} 3412 3413/** 3414 * onenand_print_device_info - Print device & version ID 3415 * @param device device ID 3416 * @param version version ID 3417 * 3418 * Print device & version ID 3419 */ 3420static void onenand_print_device_info(int device, int version) 3421{ 3422 int vcc, demuxed, ddp, density, flexonenand; 3423 3424 vcc = device & ONENAND_DEVICE_VCC_MASK; 3425 demuxed = device & ONENAND_DEVICE_IS_DEMUX; 3426 ddp = device & ONENAND_DEVICE_IS_DDP; 3427 density = onenand_get_density(device); 3428 flexonenand = device & DEVICE_IS_FLEXONENAND; 3429 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", 3430 demuxed ? "" : "Muxed ", 3431 flexonenand ? "Flex-" : "", 3432 ddp ? "(DDP)" : "", 3433 (16 << density), 3434 vcc ? "2.65/3.3" : "1.8", 3435 device); 3436 printk(KERN_INFO "OneNAND version = 0x%04x\n", version); 3437} 3438 3439static const struct onenand_manufacturers onenand_manuf_ids[] = { 3440 {ONENAND_MFR_SAMSUNG, "Samsung"}, 3441 {ONENAND_MFR_NUMONYX, "Numonyx"}, 3442}; 3443 3444/** 3445 * onenand_check_maf - Check manufacturer ID 3446 * @param manuf manufacturer ID 3447 * 3448 * Check manufacturer ID 3449 */ 3450static int onenand_check_maf(int manuf) 3451{ 3452 int size = ARRAY_SIZE(onenand_manuf_ids); 3453 char *name; 3454 int i; 3455 3456 for (i = 0; i < size; i++) 3457 if (manuf == onenand_manuf_ids[i].id) 3458 break; 3459 3460 if (i < size) 3461 name = onenand_manuf_ids[i].name; 3462 else 3463 name = "Unknown"; 3464 3465 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf); 3466 3467 return (i == size); 3468} 3469 3470/** 3471* flexonenand_get_boundary - Reads the SLC boundary 3472* @param onenand_info - onenand info structure 3473**/ 3474static int flexonenand_get_boundary(struct mtd_info *mtd) 3475{ 3476 struct onenand_chip *this = mtd->priv; 3477 unsigned die, bdry; 3478 int ret, syscfg, locked; 3479 3480 /* Disable ECC */ 3481 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 3482 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1); 3483 3484 for (die = 0; die < this->dies; die++) { 3485 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 3486 this->wait(mtd, FL_SYNCING); 3487 3488 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 3489 ret = this->wait(mtd, FL_READING); 3490 3491 bdry = this->read_word(this->base + ONENAND_DATARAM); 3492 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3) 3493 locked = 0; 3494 else 3495 locked = 1; 3496 this->boundary[die] = bdry & FLEXONENAND_PI_MASK; 3497 3498 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3499 ret = this->wait(mtd, FL_RESETING); 3500 3501 printk(KERN_INFO "Die %d boundary: %d%s\n", die, 3502 this->boundary[die], locked ? "(Locked)" : "(Unlocked)"); 3503 } 3504 3505 /* Enable ECC */ 3506 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 3507 return 0; 3508} 3509 3510/** 3511 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info 3512 * boundary[], diesize[], mtd->size, mtd->erasesize 3513 * @param mtd - MTD device structure 3514 */ 3515static void flexonenand_get_size(struct mtd_info *mtd) 3516{ 3517 struct onenand_chip *this = mtd->priv; 3518 int die, i, eraseshift, density; 3519 int blksperdie, maxbdry; 3520 loff_t ofs; 3521 3522 density = onenand_get_density(this->device_id); 3523 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift); 3524 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 3525 maxbdry = blksperdie - 1; 3526 eraseshift = this->erase_shift - 1; 3527 3528 mtd->numeraseregions = this->dies << 1; 3529 3530 /* This fills up the device boundary */ 3531 flexonenand_get_boundary(mtd); 3532 die = ofs = 0; 3533 i = -1; 3534 for (; die < this->dies; die++) { 3535 if (!die || this->boundary[die-1] != maxbdry) { 3536 i++; 3537 mtd->eraseregions[i].offset = ofs; 3538 mtd->eraseregions[i].erasesize = 1 << eraseshift; 3539 mtd->eraseregions[i].numblocks = 3540 this->boundary[die] + 1; 3541 ofs += mtd->eraseregions[i].numblocks << eraseshift; 3542 eraseshift++; 3543 } else { 3544 mtd->numeraseregions -= 1; 3545 mtd->eraseregions[i].numblocks += 3546 this->boundary[die] + 1; 3547 ofs += (this->boundary[die] + 1) << (eraseshift - 1); 3548 } 3549 if (this->boundary[die] != maxbdry) { 3550 i++; 3551 mtd->eraseregions[i].offset = ofs; 3552 mtd->eraseregions[i].erasesize = 1 << eraseshift; 3553 mtd->eraseregions[i].numblocks = maxbdry ^ 3554 this->boundary[die]; 3555 ofs += mtd->eraseregions[i].numblocks << eraseshift; 3556 eraseshift--; 3557 } else 3558 mtd->numeraseregions -= 1; 3559 } 3560 3561 /* Expose MLC erase size except when all blocks are SLC */ 3562 mtd->erasesize = 1 << this->erase_shift; 3563 if (mtd->numeraseregions == 1) 3564 mtd->erasesize >>= 1; 3565 3566 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions); 3567 for (i = 0; i < mtd->numeraseregions; i++) 3568 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x," 3569 " numblocks: %04u]\n", 3570 (unsigned int) mtd->eraseregions[i].offset, 3571 mtd->eraseregions[i].erasesize, 3572 mtd->eraseregions[i].numblocks); 3573 3574 for (die = 0, mtd->size = 0; die < this->dies; die++) { 3575 this->diesize[die] = (loff_t)blksperdie << this->erase_shift; 3576 this->diesize[die] -= (loff_t)(this->boundary[die] + 1) 3577 << (this->erase_shift - 1); 3578 mtd->size += this->diesize[die]; 3579 } 3580} 3581 3582/** 3583 * flexonenand_check_blocks_erased - Check if blocks are erased 3584 * @param mtd_info - mtd info structure 3585 * @param start - first erase block to check 3586 * @param end - last erase block to check 3587 * 3588 * Converting an unerased block from MLC to SLC 3589 * causes byte values to change. Since both data and its ECC 3590 * have changed, reads on the block give uncorrectable error. 3591 * This might lead to the block being detected as bad. 3592 * 3593 * Avoid this by ensuring that the block to be converted is 3594 * erased. 3595 */ 3596static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end) 3597{ 3598 struct onenand_chip *this = mtd->priv; 3599 int i, ret; 3600 int block; 3601 struct mtd_oob_ops ops = { 3602 .mode = MTD_OOB_PLACE, 3603 .ooboffs = 0, 3604 .ooblen = mtd->oobsize, 3605 .datbuf = NULL, 3606 .oobbuf = this->oob_buf, 3607 }; 3608 loff_t addr; 3609 3610 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end); 3611 3612 for (block = start; block <= end; block++) { 3613 addr = flexonenand_addr(this, block); 3614 if (onenand_block_isbad_nolock(mtd, addr, 0)) 3615 continue; 3616 3617 /* 3618 * Since main area write results in ECC write to spare, 3619 * it is sufficient to check only ECC bytes for change. 3620 */ 3621 ret = onenand_read_oob_nolock(mtd, addr, &ops); 3622 if (ret) 3623 return ret; 3624 3625 for (i = 0; i < mtd->oobsize; i++) 3626 if (this->oob_buf[i] != 0xff) 3627 break; 3628 3629 if (i != mtd->oobsize) { 3630 printk(KERN_WARNING "%s: Block %d not erased.\n", 3631 __func__, block); 3632 return 1; 3633 } 3634 } 3635 3636 return 0; 3637} 3638 3639/** 3640 * flexonenand_set_boundary - Writes the SLC boundary 3641 * @param mtd - mtd info structure 3642 */ 3643int flexonenand_set_boundary(struct mtd_info *mtd, int die, 3644 int boundary, int lock) 3645{ 3646 struct onenand_chip *this = mtd->priv; 3647 int ret, density, blksperdie, old, new, thisboundary; 3648 loff_t addr; 3649 3650 /* Change only once for SDP Flex-OneNAND */ 3651 if (die && (!ONENAND_IS_DDP(this))) 3652 return 0; 3653 3654 /* boundary value of -1 indicates no required change */ 3655 if (boundary < 0 || boundary == this->boundary[die]) 3656 return 0; 3657 3658 density = onenand_get_density(this->device_id); 3659 blksperdie = ((16 << density) << 20) >> this->erase_shift; 3660 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 3661 3662 if (boundary >= blksperdie) { 3663 printk(KERN_ERR "%s: Invalid boundary value. " 3664 "Boundary not changed.\n", __func__); 3665 return -EINVAL; 3666 } 3667 3668 /* Check if converting blocks are erased */ 3669 old = this->boundary[die] + (die * this->density_mask); 3670 new = boundary + (die * this->density_mask); 3671 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new)); 3672 if (ret) { 3673 printk(KERN_ERR "%s: Please erase blocks " 3674 "before boundary change\n", __func__); 3675 return ret; 3676 } 3677 3678 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 3679 this->wait(mtd, FL_SYNCING); 3680 3681 /* Check is boundary is locked */ 3682 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 3683 ret = this->wait(mtd, FL_READING); 3684 3685 thisboundary = this->read_word(this->base + ONENAND_DATARAM); 3686 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) { 3687 printk(KERN_ERR "%s: boundary locked\n", __func__); 3688 ret = 1; 3689 goto out; 3690 } 3691 3692 printk(KERN_INFO "Changing die %d boundary: %d%s\n", 3693 die, boundary, lock ? "(Locked)" : "(Unlocked)"); 3694 3695 addr = die ? this->diesize[0] : 0; 3696 3697 boundary &= FLEXONENAND_PI_MASK; 3698 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT); 3699 3700 this->command(mtd, ONENAND_CMD_ERASE, addr, 0); 3701 ret = this->wait(mtd, FL_ERASING); 3702 if (ret) { 3703 printk(KERN_ERR "%s: Failed PI erase for Die %d\n", 3704 __func__, die); 3705 goto out; 3706 } 3707 3708 this->write_word(boundary, this->base + ONENAND_DATARAM); 3709 this->command(mtd, ONENAND_CMD_PROG, addr, 0); 3710 ret = this->wait(mtd, FL_WRITING); 3711 if (ret) { 3712 printk(KERN_ERR "%s: Failed PI write for Die %d\n", 3713 __func__, die); 3714 goto out; 3715 } 3716 3717 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0); 3718 ret = this->wait(mtd, FL_WRITING); 3719out: 3720 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND); 3721 this->wait(mtd, FL_RESETING); 3722 if (!ret) 3723 /* Recalculate device size on boundary change*/ 3724 flexonenand_get_size(mtd); 3725 3726 return ret; 3727} 3728 3729/** 3730 * onenand_chip_probe - [OneNAND Interface] The generic chip probe 3731 * @param mtd MTD device structure 3732 * 3733 * OneNAND detection method: 3734 * Compare the values from command with ones from register 3735 */ 3736static int onenand_chip_probe(struct mtd_info *mtd) 3737{ 3738 struct onenand_chip *this = mtd->priv; 3739 int bram_maf_id, bram_dev_id, maf_id, dev_id; 3740 int syscfg; 3741 3742 /* Save system configuration 1 */ 3743 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 3744 /* Clear Sync. Burst Read mode to read BootRAM */ 3745 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1); 3746 3747 /* Send the command for reading device ID from BootRAM */ 3748 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); 3749 3750 /* Read manufacturer and device IDs from BootRAM */ 3751 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); 3752 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); 3753 3754 /* Reset OneNAND to read default register values */ 3755 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); 3756 /* Wait reset */ 3757 this->wait(mtd, FL_RESETING); 3758 3759 /* Restore system configuration 1 */ 3760 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 3761 3762 /* Check manufacturer ID */ 3763 if (onenand_check_maf(bram_maf_id)) 3764 return -ENXIO; 3765 3766 /* Read manufacturer and device IDs from Register */ 3767 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); 3768 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 3769 3770 /* Check OneNAND device */ 3771 if (maf_id != bram_maf_id || dev_id != bram_dev_id) 3772 return -ENXIO; 3773 3774 return 0; 3775} 3776 3777/** 3778 * onenand_probe - [OneNAND Interface] Probe the OneNAND device 3779 * @param mtd MTD device structure 3780 */ 3781static int onenand_probe(struct mtd_info *mtd) 3782{ 3783 struct onenand_chip *this = mtd->priv; 3784 int maf_id, dev_id, ver_id; 3785 int density; 3786 int ret; 3787 3788 ret = this->chip_probe(mtd); 3789 if (ret) 3790 return ret; 3791 3792 /* Read manufacturer and device IDs from Register */ 3793 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); 3794 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 3795 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); 3796 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY); 3797 3798 /* Flash device information */ 3799 onenand_print_device_info(dev_id, ver_id); 3800 this->device_id = dev_id; 3801 this->version_id = ver_id; 3802 3803 /* Check OneNAND features */ 3804 onenand_check_features(mtd); 3805 3806 density = onenand_get_density(dev_id); 3807 if (FLEXONENAND(this)) { 3808 this->dies = ONENAND_IS_DDP(this) ? 2 : 1; 3809 /* Maximum possible erase regions */ 3810 mtd->numeraseregions = this->dies << 1; 3811 mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info) 3812 * (this->dies << 1), GFP_KERNEL); 3813 if (!mtd->eraseregions) 3814 return -ENOMEM; 3815 } 3816 3817 /* 3818 * For Flex-OneNAND, chipsize represents maximum possible device size. 3819 * mtd->size represents the actual device size. 3820 */ 3821 this->chipsize = (16 << density) << 20; 3822 3823 /* OneNAND page size & block size */ 3824 /* The data buffer size is equal to page size */ 3825 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); 3826 /* We use the full BufferRAM */ 3827 if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) 3828 mtd->writesize <<= 1; 3829 3830 mtd->oobsize = mtd->writesize >> 5; 3831 /* Pages per a block are always 64 in OneNAND */ 3832 mtd->erasesize = mtd->writesize << 6; 3833 /* 3834 * Flex-OneNAND SLC area has 64 pages per block. 3835 * Flex-OneNAND MLC area has 128 pages per block. 3836 * Expose MLC erase size to find erase_shift and page_mask. 3837 */ 3838 if (FLEXONENAND(this)) 3839 mtd->erasesize <<= 1; 3840 3841 this->erase_shift = ffs(mtd->erasesize) - 1; 3842 this->page_shift = ffs(mtd->writesize) - 1; 3843 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1; 3844 /* Set density mask. it is used for DDP */ 3845 if (ONENAND_IS_DDP(this)) 3846 this->density_mask = this->chipsize >> (this->erase_shift + 1); 3847 /* It's real page size */ 3848 this->writesize = mtd->writesize; 3849 3850 /* REVISIT: Multichip handling */ 3851 3852 if (FLEXONENAND(this)) 3853 flexonenand_get_size(mtd); 3854 else 3855 mtd->size = this->chipsize; 3856 3857 /* 3858 * We emulate the 4KiB page and 256KiB erase block size 3859 * But oobsize is still 64 bytes. 3860 * It is only valid if you turn on 2X program support, 3861 * Otherwise it will be ignored by compiler. 3862 */ 3863 if (ONENAND_IS_2PLANE(this)) { 3864 mtd->writesize <<= 1; 3865 mtd->erasesize <<= 1; 3866 } 3867 3868 return 0; 3869} 3870 3871/** 3872 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash 3873 * @param mtd MTD device structure 3874 */ 3875static int onenand_suspend(struct mtd_info *mtd) 3876{ 3877 return onenand_get_device(mtd, FL_PM_SUSPENDED); 3878} 3879 3880/** 3881 * onenand_resume - [MTD Interface] Resume the OneNAND flash 3882 * @param mtd MTD device structure 3883 */ 3884static void onenand_resume(struct mtd_info *mtd) 3885{ 3886 struct onenand_chip *this = mtd->priv; 3887 3888 if (this->state == FL_PM_SUSPENDED) 3889 onenand_release_device(mtd); 3890 else 3891 printk(KERN_ERR "%s: resume() called for the chip which is not " 3892 "in suspended state\n", __func__); 3893} 3894 3895/** 3896 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device 3897 * @param mtd MTD device structure 3898 * @param maxchips Number of chips to scan for 3899 * 3900 * This fills out all the not initialized function pointers 3901 * with the defaults. 3902 * The flash ID is read and the mtd/chip structures are 3903 * filled with the appropriate values. 3904 */ 3905int onenand_scan(struct mtd_info *mtd, int maxchips) 3906{ 3907 int i, ret; 3908 struct onenand_chip *this = mtd->priv; 3909 3910 if (!this->read_word) 3911 this->read_word = onenand_readw; 3912 if (!this->write_word) 3913 this->write_word = onenand_writew; 3914 3915 if (!this->command) 3916 this->command = onenand_command; 3917 if (!this->wait) 3918 onenand_setup_wait(mtd); 3919 if (!this->bbt_wait) 3920 this->bbt_wait = onenand_bbt_wait; 3921 if (!this->unlock_all) 3922 this->unlock_all = onenand_unlock_all; 3923 3924 if (!this->chip_probe) 3925 this->chip_probe = onenand_chip_probe; 3926 3927 if (!this->read_bufferram) 3928 this->read_bufferram = onenand_read_bufferram; 3929 if (!this->write_bufferram) 3930 this->write_bufferram = onenand_write_bufferram; 3931 3932 if (!this->block_markbad) 3933 this->block_markbad = onenand_default_block_markbad; 3934 if (!this->scan_bbt) 3935 this->scan_bbt = onenand_default_bbt; 3936 3937 if (onenand_probe(mtd)) 3938 return -ENXIO; 3939 3940 /* Set Sync. Burst Read after probing */ 3941 if (this->mmcontrol) { 3942 printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); 3943 this->read_bufferram = onenand_sync_read_bufferram; 3944 } 3945 3946 /* Allocate buffers, if necessary */ 3947 if (!this->page_buf) { 3948 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL); 3949 if (!this->page_buf) { 3950 printk(KERN_ERR "%s: Can't allocate page_buf\n", 3951 __func__); 3952 return -ENOMEM; 3953 } 3954#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 3955 this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL); 3956 if (!this->verify_buf) { 3957 kfree(this->page_buf); 3958 return -ENOMEM; 3959 } 3960#endif 3961 this->options |= ONENAND_PAGEBUF_ALLOC; 3962 } 3963 if (!this->oob_buf) { 3964 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL); 3965 if (!this->oob_buf) { 3966 printk(KERN_ERR "%s: Can't allocate oob_buf\n", 3967 __func__); 3968 if (this->options & ONENAND_PAGEBUF_ALLOC) { 3969 this->options &= ~ONENAND_PAGEBUF_ALLOC; 3970 kfree(this->page_buf); 3971 } 3972 return -ENOMEM; 3973 } 3974 this->options |= ONENAND_OOBBUF_ALLOC; 3975 } 3976 3977 this->state = FL_READY; 3978 init_waitqueue_head(&this->wq); 3979 spin_lock_init(&this->chip_lock); 3980 3981 /* 3982 * Allow subpage writes up to oobsize. 3983 */ 3984 switch (mtd->oobsize) { 3985 case 128: 3986 this->ecclayout = &onenand_oob_128; 3987 mtd->subpage_sft = 0; 3988 break; 3989 case 64: 3990 this->ecclayout = &onenand_oob_64; 3991 mtd->subpage_sft = 2; 3992 break; 3993 3994 case 32: 3995 this->ecclayout = &onenand_oob_32; 3996 mtd->subpage_sft = 1; 3997 break; 3998 3999 default: 4000 printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n", 4001 __func__, mtd->oobsize); 4002 mtd->subpage_sft = 0; 4003 /* To prevent kernel oops */ 4004 this->ecclayout = &onenand_oob_32; 4005 break; 4006 } 4007 4008 this->subpagesize = mtd->writesize >> mtd->subpage_sft; 4009 4010 /* 4011 * The number of bytes available for a client to place data into 4012 * the out of band area 4013 */ 4014 this->ecclayout->oobavail = 0; 4015 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && 4016 this->ecclayout->oobfree[i].length; i++) 4017 this->ecclayout->oobavail += 4018 this->ecclayout->oobfree[i].length; 4019 mtd->oobavail = this->ecclayout->oobavail; 4020 4021 mtd->ecclayout = this->ecclayout; 4022 4023 /* Fill in remaining MTD driver data */ 4024 mtd->type = MTD_NANDFLASH; 4025 mtd->flags = MTD_CAP_NANDFLASH; 4026 mtd->erase = onenand_erase; 4027 mtd->point = NULL; 4028 mtd->unpoint = NULL; 4029 mtd->read = onenand_read; 4030 mtd->write = onenand_write; 4031 mtd->read_oob = onenand_read_oob; 4032 mtd->write_oob = onenand_write_oob; 4033 mtd->panic_write = onenand_panic_write; 4034#ifdef CONFIG_MTD_ONENAND_OTP 4035 mtd->get_fact_prot_info = onenand_get_fact_prot_info; 4036 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg; 4037 mtd->get_user_prot_info = onenand_get_user_prot_info; 4038 mtd->read_user_prot_reg = onenand_read_user_prot_reg; 4039 mtd->write_user_prot_reg = onenand_write_user_prot_reg; 4040 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg; 4041#endif 4042 mtd->sync = onenand_sync; 4043 mtd->lock = onenand_lock; 4044 mtd->unlock = onenand_unlock; 4045 mtd->suspend = onenand_suspend; 4046 mtd->resume = onenand_resume; 4047 mtd->block_isbad = onenand_block_isbad; 4048 mtd->block_markbad = onenand_block_markbad; 4049 mtd->owner = THIS_MODULE; 4050 4051 /* Unlock whole block */ 4052 this->unlock_all(mtd); 4053 4054 ret = this->scan_bbt(mtd); 4055 if ((!FLEXONENAND(this)) || ret) 4056 return ret; 4057 4058 /* Change Flex-OneNAND boundaries if required */ 4059 for (i = 0; i < MAX_DIES; i++) 4060 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i], 4061 flex_bdry[(2 * i) + 1]); 4062 4063 return 0; 4064} 4065 4066/** 4067 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device 4068 * @param mtd MTD device structure 4069 */ 4070void onenand_release(struct mtd_info *mtd) 4071{ 4072 struct onenand_chip *this = mtd->priv; 4073 4074#ifdef CONFIG_MTD_PARTITIONS 4075 /* Deregister partitions */ 4076 del_mtd_partitions (mtd); 4077#endif 4078 /* Deregister the device */ 4079 del_mtd_device (mtd); 4080 4081 /* Free bad block table memory, if allocated */ 4082 if (this->bbm) { 4083 struct bbm_info *bbm = this->bbm; 4084 kfree(bbm->bbt); 4085 kfree(this->bbm); 4086 } 4087 /* Buffers allocated by onenand_scan */ 4088 if (this->options & ONENAND_PAGEBUF_ALLOC) { 4089 kfree(this->page_buf); 4090#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 4091 kfree(this->verify_buf); 4092#endif 4093 } 4094 if (this->options & ONENAND_OOBBUF_ALLOC) 4095 kfree(this->oob_buf); 4096 kfree(mtd->eraseregions); 4097} 4098 4099EXPORT_SYMBOL_GPL(onenand_scan); 4100EXPORT_SYMBOL_GPL(onenand_release); 4101 4102MODULE_LICENSE("GPL"); 4103MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>"); 4104MODULE_DESCRIPTION("Generic OneNAND flash driver code"); 4105