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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/media/video/gspca/stv06xx/
1/*
2 * Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher
3 *		      Mark Cave-Ayland, Carlo E Prelz, Dick Streefland
4 * Copyright (c) 2002, 2003 Tuukka Toivonen
5 * Copyright (c) 2008 Erik Andr��n
6 * Copyright (c) 2008 Chia-I Wu
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21 *
22 * P/N 861037:      Sensor HDCS1000        ASIC STV0600
23 * P/N 861050-0010: Sensor HDCS1000        ASIC STV0600
24 * P/N 861050-0020: Sensor Photobit PB100  ASIC STV0600-1 - QuickCam Express
25 * P/N 861055:      Sensor ST VV6410       ASIC STV0610   - LEGO cam
26 * P/N 861075-0040: Sensor HDCS1000        ASIC
27 * P/N 961179-0700: Sensor ST VV6410       ASIC STV0602   - Dexxa WebCam USB
28 * P/N 861040-0000: Sensor ST VV6410       ASIC STV0610   - QuickCam Web
29 */
30
31#ifndef STV06XX_HDCS_H_
32#define STV06XX_HDCS_H_
33
34#include "stv06xx_sensor.h"
35
36#define HDCS_REG_CONFIG(sd)	(IS_1020(sd) ? HDCS20_CONFIG : HDCS00_CONFIG)
37#define HDCS_REG_CONTROL(sd)	(IS_1020(sd) ? HDCS20_CONTROL : HDCS00_CONTROL)
38
39#define HDCS_1X00_DEF_WIDTH	360
40#define HDCS_1X00_DEF_HEIGHT 	296
41
42#define HDCS_1020_DEF_WIDTH	352
43#define HDCS_1020_DEF_HEIGHT	292
44
45#define HDCS_1020_BOTTOM_Y_SKIP	4
46
47#define HDCS_CLK_FREQ_MHZ	25
48
49#define HDCS_ADC_START_SIG_DUR	3
50
51/* LSB bit of I2C or register address signifies write (0) or read (1) */
52/* I2C Registers common for both HDCS-1000/1100 and HDCS-1020 */
53/* Identifications Register */
54#define HDCS_IDENT		(0x00 << 1)
55/* Status Register */
56#define HDCS_STATUS		(0x01 << 1)
57/* Interrupt Mask Register */
58#define HDCS_IMASK		(0x02 << 1)
59/* Pad Control Register */
60#define HDCS_PCTRL		(0x03 << 1)
61/* Pad Drive Control Register */
62#define HDCS_PDRV		(0x04 << 1)
63/* Interface Control Register */
64#define HDCS_ICTRL		(0x05 << 1)
65/* Interface Timing Register */
66#define HDCS_ITMG		(0x06 << 1)
67/* Baud Fraction Register */
68#define HDCS_BFRAC		(0x07 << 1)
69/* Baud Rate Register */
70#define HDCS_BRATE		(0x08 << 1)
71/* ADC Control Register */
72#define HDCS_ADCCTRL		(0x09 << 1)
73/* First Window Row Register */
74#define HDCS_FWROW		(0x0a << 1)
75/* First Window Column Register */
76#define HDCS_FWCOL		(0x0b << 1)
77/* Last Window Row Register */
78#define HDCS_LWROW		(0x0c << 1)
79/* Last Window Column Register */
80#define HDCS_LWCOL		(0x0d << 1)
81/* Timing Control Register */
82#define HDCS_TCTRL		(0x0e << 1)
83/* PGA Gain Register: Even Row, Even Column */
84#define HDCS_ERECPGA		(0x0f << 1)
85/* PGA Gain Register: Even Row, Odd Column */
86#define HDCS_EROCPGA		(0x10 << 1)
87/* PGA Gain Register: Odd Row, Even Column */
88#define HDCS_ORECPGA		(0x11 << 1)
89/* PGA Gain Register: Odd Row, Odd Column */
90#define HDCS_OROCPGA		(0x12 << 1)
91/* Row Exposure Low Register */
92#define HDCS_ROWEXPL		(0x13 << 1)
93/* Row Exposure High Register */
94#define HDCS_ROWEXPH		(0x14 << 1)
95
96/* I2C Registers only for HDCS-1000/1100 */
97/* Sub-Row Exposure Low Register */
98#define HDCS00_SROWEXPL		(0x15 << 1)
99/* Sub-Row Exposure High Register */
100#define HDCS00_SROWEXPH		(0x16 << 1)
101/* Configuration Register */
102#define HDCS00_CONFIG		(0x17 << 1)
103/* Control Register */
104#define HDCS00_CONTROL		(0x18 << 1)
105
106/* I2C Registers only for HDCS-1020 */
107/* Sub-Row Exposure Register */
108#define HDCS20_SROWEXP		(0x15 << 1)
109/* Error Control Register */
110#define HDCS20_ERROR		(0x16 << 1)
111/* Interface Timing 2 Register */
112#define HDCS20_ITMG2		(0x17 << 1)
113/* Interface Control 2 Register	*/
114#define HDCS20_ICTRL2		(0x18 << 1)
115/* Horizontal Blank Register */
116#define HDCS20_HBLANK		(0x19 << 1)
117/* Vertical Blank Register */
118#define HDCS20_VBLANK		(0x1a << 1)
119/* Configuration Register */
120#define HDCS20_CONFIG		(0x1b << 1)
121/* Control Register */
122#define HDCS20_CONTROL		(0x1c << 1)
123
124#define HDCS_RUN_ENABLE		(1 << 2)
125#define HDCS_SLEEP_MODE		(1 << 1)
126
127#define HDCS_DEFAULT_EXPOSURE	48
128#define HDCS_DEFAULT_GAIN	128
129
130static int hdcs_probe_1x00(struct sd *sd);
131static int hdcs_probe_1020(struct sd *sd);
132static int hdcs_start(struct sd *sd);
133static int hdcs_init(struct sd *sd);
134static int hdcs_stop(struct sd *sd);
135static int hdcs_dump(struct sd *sd);
136static void hdcs_disconnect(struct sd *sd);
137
138static int hdcs_get_exposure(struct gspca_dev *gspca_dev, __s32 *val);
139static int hdcs_set_exposure(struct gspca_dev *gspca_dev, __s32 val);
140static int hdcs_set_gain(struct gspca_dev *gspca_dev, __s32 val);
141static int hdcs_get_gain(struct gspca_dev *gspca_dev, __s32 *val);
142
143const struct stv06xx_sensor stv06xx_sensor_hdcs1x00 = {
144	.name = "HP HDCS-1000/1100",
145	.i2c_flush = 0,
146	.i2c_addr = (0x55 << 1),
147	.i2c_len = 1,
148
149	.init = hdcs_init,
150	.probe = hdcs_probe_1x00,
151	.start = hdcs_start,
152	.stop = hdcs_stop,
153	.disconnect = hdcs_disconnect,
154	.dump = hdcs_dump,
155};
156
157const struct stv06xx_sensor stv06xx_sensor_hdcs1020 = {
158	.name = "HDCS-1020",
159	.i2c_flush = 0,
160	.i2c_addr = (0x55 << 1),
161	.i2c_len = 1,
162
163	.init = hdcs_init,
164	.probe = hdcs_probe_1020,
165	.start = hdcs_start,
166	.stop = hdcs_stop,
167	.dump = hdcs_dump,
168};
169
170static const u16 stv_bridge_init[][2] = {
171	{STV_ISO_ENABLE, 0},
172	{STV_REG23, 0},
173	{STV_REG00, 0x1d},
174	{STV_REG01, 0xb5},
175	{STV_REG02, 0xa8},
176	{STV_REG03, 0x95},
177	{STV_REG04, 0x07},
178
179	{STV_SCAN_RATE, 0x20},
180	{STV_ISO_SIZE_L, 847},
181	{STV_Y_CTRL, 0x01},
182	{STV_X_CTRL, 0x0a}
183};
184
185static const u8 stv_sensor_init[][2] = {
186	/* Clear status (writing 1 will clear the corresponding status bit) */
187	{HDCS_STATUS, BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1)},
188	/* Disable all interrupts */
189	{HDCS_IMASK, 0x00},
190	{HDCS_PCTRL, BIT(6) | BIT(5) | BIT(1) | BIT(0)},
191	{HDCS_PDRV,  0x00},
192	{HDCS_ICTRL, BIT(5)},
193	{HDCS_ITMG,  BIT(4) | BIT(1)},
194	/* ADC output resolution to 10 bits */
195	{HDCS_ADCCTRL, 10}
196};
197
198#endif
199