1/* $Id: isar.c,v 1.22.2.6 2004/02/11 13:21:34 Exp $ 2 * 3 * isar.c ISAR (Siemens PSB 7110) specific routines 4 * 5 * Author Karsten Keil (keil@isdn4linux.de) 6 * 7 * This file is (c) under GNU General Public License 8 * 9 */ 10 11#include <linux/init.h> 12#include "hisax.h" 13#include "isar.h" 14#include "isdnl1.h" 15#include <linux/interrupt.h> 16#include <linux/slab.h> 17 18#define DBG_LOADFIRM 0 19#define DUMP_MBOXFRAME 2 20 21#define DLE 0x10 22#define ETX 0x03 23 24#define FAXMODCNT 13 25static const u_char faxmodulation[] = {3,24,48,72,73,74,96,97,98,121,122,145,146}; 26static u_int modmask = 0x1fff; 27static int frm_extra_delay = 2; 28static int para_TOA = 6; 29static const u_char *FC1_CMD[] = {"FAE", "FTS", "FRS", "FTM", "FRM", "FTH", "FRH", "CTRL" }; 30 31static void isar_setup(struct IsdnCardState *cs); 32static void isar_pump_cmd(struct BCState *bcs, u_char cmd, u_char para); 33static void ll_deliver_faxstat(struct BCState *bcs, u_char status); 34 35static inline int 36waitforHIA(struct IsdnCardState *cs, int timeout) 37{ 38 39 while ((cs->BC_Read_Reg(cs, 0, ISAR_HIA) & 1) && timeout) { 40 udelay(1); 41 timeout--; 42 } 43 if (!timeout) 44 printk(KERN_WARNING "HiSax: ISAR waitforHIA timeout\n"); 45 return(timeout); 46} 47 48 49static int 50sendmsg(struct IsdnCardState *cs, u_char his, u_char creg, u_char len, 51 u_char *msg) 52{ 53 int i; 54 55 if (!waitforHIA(cs, 4000)) 56 return(0); 57#if DUMP_MBOXFRAME 58 if (cs->debug & L1_DEB_HSCX) 59 debugl1(cs, "sendmsg(%02x,%02x,%d)", his, creg, len); 60#endif 61 cs->BC_Write_Reg(cs, 0, ISAR_CTRL_H, creg); 62 cs->BC_Write_Reg(cs, 0, ISAR_CTRL_L, len); 63 cs->BC_Write_Reg(cs, 0, ISAR_WADR, 0); 64 if (msg && len) { 65 cs->BC_Write_Reg(cs, 1, ISAR_MBOX, msg[0]); 66 for (i=1; i<len; i++) 67 cs->BC_Write_Reg(cs, 2, ISAR_MBOX, msg[i]); 68#if DUMP_MBOXFRAME>1 69 if (cs->debug & L1_DEB_HSCX_FIFO) { 70 char tmp[256], *t; 71 72 i = len; 73 while (i>0) { 74 t = tmp; 75 t += sprintf(t, "sendmbox cnt %d", len); 76 QuickHex(t, &msg[len-i], (i>64) ? 64:i); 77 debugl1(cs, tmp); 78 i -= 64; 79 } 80 } 81#endif 82 } 83 cs->BC_Write_Reg(cs, 1, ISAR_HIS, his); 84 waitforHIA(cs, 10000); 85 return(1); 86} 87 88/* Call only with IRQ disabled !!! */ 89static inline void 90rcv_mbox(struct IsdnCardState *cs, struct isar_reg *ireg, u_char *msg) 91{ 92 int i; 93 94 cs->BC_Write_Reg(cs, 1, ISAR_RADR, 0); 95 if (msg && ireg->clsb) { 96 msg[0] = cs->BC_Read_Reg(cs, 1, ISAR_MBOX); 97 for (i=1; i < ireg->clsb; i++) 98 msg[i] = cs->BC_Read_Reg(cs, 2, ISAR_MBOX); 99#if DUMP_MBOXFRAME>1 100 if (cs->debug & L1_DEB_HSCX_FIFO) { 101 char tmp[256], *t; 102 103 i = ireg->clsb; 104 while (i>0) { 105 t = tmp; 106 t += sprintf(t, "rcv_mbox cnt %d", ireg->clsb); 107 QuickHex(t, &msg[ireg->clsb-i], (i>64) ? 64:i); 108 debugl1(cs, tmp); 109 i -= 64; 110 } 111 } 112#endif 113 } 114 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 115} 116 117/* Call only with IRQ disabled !!! */ 118static inline void 119get_irq_infos(struct IsdnCardState *cs, struct isar_reg *ireg) 120{ 121 ireg->iis = cs->BC_Read_Reg(cs, 1, ISAR_IIS); 122 ireg->cmsb = cs->BC_Read_Reg(cs, 1, ISAR_CTRL_H); 123 ireg->clsb = cs->BC_Read_Reg(cs, 1, ISAR_CTRL_L); 124#if DUMP_MBOXFRAME 125 if (cs->debug & L1_DEB_HSCX) 126 debugl1(cs, "irq_stat(%02x,%02x,%d)", ireg->iis, ireg->cmsb, 127 ireg->clsb); 128#endif 129} 130 131static int 132waitrecmsg(struct IsdnCardState *cs, u_char *len, 133 u_char *msg, int maxdelay) 134{ 135 int timeout = 0; 136 struct isar_reg *ir = cs->bcs[0].hw.isar.reg; 137 138 139 while((!(cs->BC_Read_Reg(cs, 0, ISAR_IRQBIT) & ISAR_IRQSTA)) && 140 (timeout++ < maxdelay)) 141 udelay(1); 142 if (timeout > maxdelay) { 143 printk(KERN_WARNING"isar recmsg IRQSTA timeout\n"); 144 return(0); 145 } 146 get_irq_infos(cs, ir); 147 rcv_mbox(cs, ir, msg); 148 *len = ir->clsb; 149 return(1); 150} 151 152int 153ISARVersion(struct IsdnCardState *cs, char *s) 154{ 155 int ver; 156 u_char msg[] = ISAR_MSG_HWVER; 157 u_char tmp[64]; 158 u_char len; 159 u_long flags; 160 int debug; 161 162 cs->cardmsg(cs, CARD_RESET, NULL); 163 spin_lock_irqsave(&cs->lock, flags); 164 /* disable ISAR IRQ */ 165 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0); 166 debug = cs->debug; 167 cs->debug &= ~(L1_DEB_HSCX | L1_DEB_HSCX_FIFO); 168 if (!sendmsg(cs, ISAR_HIS_VNR, 0, 3, msg)) { 169 spin_unlock_irqrestore(&cs->lock, flags); 170 return(-1); 171 } 172 if (!waitrecmsg(cs, &len, tmp, 100000)) { 173 spin_unlock_irqrestore(&cs->lock, flags); 174 return(-2); 175 } 176 cs->debug = debug; 177 if (cs->bcs[0].hw.isar.reg->iis == ISAR_IIS_VNR) { 178 if (len == 1) { 179 ver = tmp[0] & 0xf; 180 printk(KERN_INFO "%s ISAR version %d\n", s, ver); 181 } else 182 ver = -3; 183 } else 184 ver = -4; 185 spin_unlock_irqrestore(&cs->lock, flags); 186 return(ver); 187} 188 189static int 190isar_load_firmware(struct IsdnCardState *cs, u_char __user *buf) 191{ 192 int ret, size, cnt, debug; 193 u_char len, nom, noc; 194 u_short sadr, left, *sp; 195 u_char __user *p = buf; 196 u_char *msg, *tmpmsg, *mp, tmp[64]; 197 u_long flags; 198 struct isar_reg *ireg = cs->bcs[0].hw.isar.reg; 199 200 struct {u_short sadr; 201 u_short len; 202 u_short d_key; 203 } blk_head; 204 205#define BLK_HEAD_SIZE 6 206 if (1 != (ret = ISARVersion(cs, "Testing"))) { 207 printk(KERN_ERR"isar_load_firmware wrong isar version %d\n", ret); 208 return(1); 209 } 210 debug = cs->debug; 211#if DBG_LOADFIRM<2 212 cs->debug &= ~(L1_DEB_HSCX | L1_DEB_HSCX_FIFO); 213#endif 214 215 if ((ret = copy_from_user(&size, p, sizeof(int)))) { 216 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", ret); 217 return ret; 218 } 219 p += sizeof(int); 220 printk(KERN_DEBUG"isar_load_firmware size: %d\n", size); 221 cnt = 0; 222 /* disable ISAR IRQ */ 223 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0); 224 if (!(msg = kmalloc(256, GFP_KERNEL))) { 225 printk(KERN_ERR"isar_load_firmware no buffer\n"); 226 return (1); 227 } 228 if (!(tmpmsg = kmalloc(256, GFP_KERNEL))) { 229 printk(KERN_ERR"isar_load_firmware no tmp buffer\n"); 230 kfree(msg); 231 return (1); 232 } 233 spin_lock_irqsave(&cs->lock, flags); 234 /* disable ISAR IRQ */ 235 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0); 236 spin_unlock_irqrestore(&cs->lock, flags); 237 while (cnt < size) { 238 if ((ret = copy_from_user(&blk_head, p, BLK_HEAD_SIZE))) { 239 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", ret); 240 goto reterror; 241 } 242#ifdef __BIG_ENDIAN 243 sadr = (blk_head.sadr & 0xff)*256 + blk_head.sadr/256; 244 blk_head.sadr = sadr; 245 sadr = (blk_head.len & 0xff)*256 + blk_head.len/256; 246 blk_head.len = sadr; 247 sadr = (blk_head.d_key & 0xff)*256 + blk_head.d_key/256; 248 blk_head.d_key = sadr; 249#endif /* __BIG_ENDIAN */ 250 cnt += BLK_HEAD_SIZE; 251 p += BLK_HEAD_SIZE; 252 printk(KERN_DEBUG"isar firmware block (%#x,%5d,%#x)\n", 253 blk_head.sadr, blk_head.len, blk_head.d_key & 0xff); 254 sadr = blk_head.sadr; 255 left = blk_head.len; 256 spin_lock_irqsave(&cs->lock, flags); 257 if (!sendmsg(cs, ISAR_HIS_DKEY, blk_head.d_key & 0xff, 0, NULL)) { 258 printk(KERN_ERR"isar sendmsg dkey failed\n"); 259 ret = 1;goto reterr_unlock; 260 } 261 if (!waitrecmsg(cs, &len, tmp, 100000)) { 262 printk(KERN_ERR"isar waitrecmsg dkey failed\n"); 263 ret = 1;goto reterr_unlock; 264 } 265 if ((ireg->iis != ISAR_IIS_DKEY) || ireg->cmsb || len) { 266 printk(KERN_ERR"isar wrong dkey response (%x,%x,%x)\n", 267 ireg->iis, ireg->cmsb, len); 268 ret = 1;goto reterr_unlock; 269 } 270 spin_unlock_irqrestore(&cs->lock, flags); 271 while (left>0) { 272 if (left > 126) 273 noc = 126; 274 else 275 noc = left; 276 nom = 2*noc; 277 mp = msg; 278 *mp++ = sadr / 256; 279 *mp++ = sadr % 256; 280 left -= noc; 281 *mp++ = noc; 282 if ((ret = copy_from_user(tmpmsg, p, nom))) { 283 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", ret); 284 goto reterror; 285 } 286 p += nom; 287 cnt += nom; 288 nom += 3; 289 sp = (u_short *)tmpmsg; 290#if DBG_LOADFIRM 291 printk(KERN_DEBUG"isar: load %3d words at %04x left %d\n", 292 noc, sadr, left); 293#endif 294 sadr += noc; 295 while(noc) { 296#ifdef __BIG_ENDIAN 297 *mp++ = *sp % 256; 298 *mp++ = *sp / 256; 299#else 300 *mp++ = *sp / 256; 301 *mp++ = *sp % 256; 302#endif /* __BIG_ENDIAN */ 303 sp++; 304 noc--; 305 } 306 spin_lock_irqsave(&cs->lock, flags); 307 if (!sendmsg(cs, ISAR_HIS_FIRM, 0, nom, msg)) { 308 printk(KERN_ERR"isar sendmsg prog failed\n"); 309 ret = 1;goto reterr_unlock; 310 } 311 if (!waitrecmsg(cs, &len, tmp, 100000)) { 312 printk(KERN_ERR"isar waitrecmsg prog failed\n"); 313 ret = 1;goto reterr_unlock; 314 } 315 if ((ireg->iis != ISAR_IIS_FIRM) || ireg->cmsb || len) { 316 printk(KERN_ERR"isar wrong prog response (%x,%x,%x)\n", 317 ireg->iis, ireg->cmsb, len); 318 ret = 1;goto reterr_unlock; 319 } 320 spin_unlock_irqrestore(&cs->lock, flags); 321 } 322 printk(KERN_DEBUG"isar firmware block %5d words loaded\n", 323 blk_head.len); 324 } 325 /* 10ms delay */ 326 cnt = 10; 327 while (cnt--) 328 udelay(1000); 329 msg[0] = 0xff; 330 msg[1] = 0xfe; 331 ireg->bstat = 0; 332 spin_lock_irqsave(&cs->lock, flags); 333 if (!sendmsg(cs, ISAR_HIS_STDSP, 0, 2, msg)) { 334 printk(KERN_ERR"isar sendmsg start dsp failed\n"); 335 ret = 1;goto reterr_unlock; 336 } 337 if (!waitrecmsg(cs, &len, tmp, 100000)) { 338 printk(KERN_ERR"isar waitrecmsg start dsp failed\n"); 339 ret = 1;goto reterr_unlock; 340 } 341 if ((ireg->iis != ISAR_IIS_STDSP) || ireg->cmsb || len) { 342 printk(KERN_ERR"isar wrong start dsp response (%x,%x,%x)\n", 343 ireg->iis, ireg->cmsb, len); 344 ret = 1;goto reterr_unlock; 345 } else 346 printk(KERN_DEBUG"isar start dsp success\n"); 347 /* NORMAL mode entered */ 348 /* Enable IRQs of ISAR */ 349 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, ISAR_IRQSTA); 350 spin_unlock_irqrestore(&cs->lock, flags); 351 cnt = 1000; /* max 1s */ 352 while ((!ireg->bstat) && cnt) { 353 udelay(1000); 354 cnt--; 355 } 356 if (!cnt) { 357 printk(KERN_ERR"isar no general status event received\n"); 358 ret = 1;goto reterror; 359 } else { 360 printk(KERN_DEBUG"isar general status event %x\n", 361 ireg->bstat); 362 } 363 /* 10ms delay */ 364 cnt = 10; 365 while (cnt--) 366 udelay(1000); 367 spin_lock_irqsave(&cs->lock, flags); 368 ireg->iis = 0; 369 if (!sendmsg(cs, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) { 370 printk(KERN_ERR"isar sendmsg self tst failed\n"); 371 ret = 1;goto reterr_unlock; 372 } 373 cnt = 10000; /* max 100 ms */ 374 spin_unlock_irqrestore(&cs->lock, flags); 375 while ((ireg->iis != ISAR_IIS_DIAG) && cnt) { 376 udelay(10); 377 cnt--; 378 } 379 udelay(1000); 380 if (!cnt) { 381 printk(KERN_ERR"isar no self tst response\n"); 382 ret = 1;goto reterror; 383 } 384 if ((ireg->cmsb == ISAR_CTRL_STST) && (ireg->clsb == 1) 385 && (ireg->par[0] == 0)) { 386 printk(KERN_DEBUG"isar selftest OK\n"); 387 } else { 388 printk(KERN_DEBUG"isar selftest not OK %x/%x/%x\n", 389 ireg->cmsb, ireg->clsb, ireg->par[0]); 390 ret = 1;goto reterror; 391 } 392 spin_lock_irqsave(&cs->lock, flags); 393 ireg->iis = 0; 394 if (!sendmsg(cs, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) { 395 printk(KERN_ERR"isar RQST SVN failed\n"); 396 ret = 1;goto reterr_unlock; 397 } 398 spin_unlock_irqrestore(&cs->lock, flags); 399 cnt = 30000; /* max 300 ms */ 400 while ((ireg->iis != ISAR_IIS_DIAG) && cnt) { 401 udelay(10); 402 cnt--; 403 } 404 udelay(1000); 405 if (!cnt) { 406 printk(KERN_ERR"isar no SVN response\n"); 407 ret = 1;goto reterror; 408 } else { 409 if ((ireg->cmsb == ISAR_CTRL_SWVER) && (ireg->clsb == 1)) 410 printk(KERN_DEBUG"isar software version %#x\n", 411 ireg->par[0]); 412 else { 413 printk(KERN_ERR"isar wrong swver response (%x,%x) cnt(%d)\n", 414 ireg->cmsb, ireg->clsb, cnt); 415 ret = 1;goto reterror; 416 } 417 } 418 spin_lock_irqsave(&cs->lock, flags); 419 cs->debug = debug; 420 isar_setup(cs); 421 422 ret = 0; 423reterr_unlock: 424 spin_unlock_irqrestore(&cs->lock, flags); 425reterror: 426 cs->debug = debug; 427 if (ret) 428 /* disable ISAR IRQ */ 429 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0); 430 kfree(msg); 431 kfree(tmpmsg); 432 return(ret); 433} 434 435#define B_LL_NOCARRIER 8 436#define B_LL_CONNECT 9 437#define B_LL_OK 10 438 439static void 440isar_bh(struct work_struct *work) 441{ 442 struct BCState *bcs = container_of(work, struct BCState, tqueue); 443 444 BChannel_bh(work); 445 if (test_and_clear_bit(B_LL_NOCARRIER, &bcs->event)) 446 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_NOCARR); 447 if (test_and_clear_bit(B_LL_CONNECT, &bcs->event)) 448 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT); 449 if (test_and_clear_bit(B_LL_OK, &bcs->event)) 450 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_OK); 451} 452 453static void 454send_DLE_ETX(struct BCState *bcs) 455{ 456 u_char dleetx[2] = {DLE,ETX}; 457 struct sk_buff *skb; 458 459 if ((skb = dev_alloc_skb(2))) { 460 memcpy(skb_put(skb, 2), dleetx, 2); 461 skb_queue_tail(&bcs->rqueue, skb); 462 schedule_event(bcs, B_RCVBUFREADY); 463 } else { 464 printk(KERN_WARNING "HiSax: skb out of memory\n"); 465 } 466} 467 468static inline int 469dle_count(unsigned char *buf, int len) 470{ 471 int count = 0; 472 473 while (len--) 474 if (*buf++ == DLE) 475 count++; 476 return count; 477} 478 479static inline void 480insert_dle(unsigned char *dest, unsigned char *src, int count) { 481 /* <DLE> in input stream have to be flagged as <DLE><DLE> */ 482 while (count--) { 483 *dest++ = *src; 484 if (*src++ == DLE) 485 *dest++ = DLE; 486 } 487} 488 489static void 490isar_rcv_frame(struct IsdnCardState *cs, struct BCState *bcs) 491{ 492 u_char *ptr; 493 struct sk_buff *skb; 494 struct isar_reg *ireg = bcs->hw.isar.reg; 495 496 if (!ireg->clsb) { 497 debugl1(cs, "isar zero len frame"); 498 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 499 return; 500 } 501 switch (bcs->mode) { 502 case L1_MODE_NULL: 503 debugl1(cs, "isar mode 0 spurious IIS_RDATA %x/%x/%x", 504 ireg->iis, ireg->cmsb, ireg->clsb); 505 printk(KERN_WARNING"isar mode 0 spurious IIS_RDATA %x/%x/%x\n", 506 ireg->iis, ireg->cmsb, ireg->clsb); 507 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 508 break; 509 case L1_MODE_TRANS: 510 case L1_MODE_V32: 511 if ((skb = dev_alloc_skb(ireg->clsb))) { 512 rcv_mbox(cs, ireg, (u_char *)skb_put(skb, ireg->clsb)); 513 skb_queue_tail(&bcs->rqueue, skb); 514 schedule_event(bcs, B_RCVBUFREADY); 515 } else { 516 printk(KERN_WARNING "HiSax: skb out of memory\n"); 517 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 518 } 519 break; 520 case L1_MODE_HDLC: 521 if ((bcs->hw.isar.rcvidx + ireg->clsb) > HSCX_BUFMAX) { 522 if (cs->debug & L1_DEB_WARN) 523 debugl1(cs, "isar_rcv_frame: incoming packet too large"); 524 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 525 bcs->hw.isar.rcvidx = 0; 526 } else if (ireg->cmsb & HDLC_ERROR) { 527 if (cs->debug & L1_DEB_WARN) 528 debugl1(cs, "isar frame error %x len %d", 529 ireg->cmsb, ireg->clsb); 530#ifdef ERROR_STATISTIC 531 if (ireg->cmsb & HDLC_ERR_RER) 532 bcs->err_inv++; 533 if (ireg->cmsb & HDLC_ERR_CER) 534 bcs->err_crc++; 535#endif 536 bcs->hw.isar.rcvidx = 0; 537 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 538 } else { 539 if (ireg->cmsb & HDLC_FSD) 540 bcs->hw.isar.rcvidx = 0; 541 ptr = bcs->hw.isar.rcvbuf + bcs->hw.isar.rcvidx; 542 bcs->hw.isar.rcvidx += ireg->clsb; 543 rcv_mbox(cs, ireg, ptr); 544 if (ireg->cmsb & HDLC_FED) { 545 if (bcs->hw.isar.rcvidx < 3) { /* last 2 bytes are the FCS */ 546 if (cs->debug & L1_DEB_WARN) 547 debugl1(cs, "isar frame to short %d", 548 bcs->hw.isar.rcvidx); 549 } else if (!(skb = dev_alloc_skb(bcs->hw.isar.rcvidx-2))) { 550 printk(KERN_WARNING "ISAR: receive out of memory\n"); 551 } else { 552 memcpy(skb_put(skb, bcs->hw.isar.rcvidx-2), 553 bcs->hw.isar.rcvbuf, bcs->hw.isar.rcvidx-2); 554 skb_queue_tail(&bcs->rqueue, skb); 555 schedule_event(bcs, B_RCVBUFREADY); 556 } 557 bcs->hw.isar.rcvidx = 0; 558 } 559 } 560 break; 561 case L1_MODE_FAX: 562 if (bcs->hw.isar.state != STFAX_ACTIV) { 563 if (cs->debug & L1_DEB_WARN) 564 debugl1(cs, "isar_rcv_frame: not ACTIV"); 565 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 566 bcs->hw.isar.rcvidx = 0; 567 break; 568 } 569 if (bcs->hw.isar.cmd == PCTRL_CMD_FRM) { 570 rcv_mbox(cs, ireg, bcs->hw.isar.rcvbuf); 571 bcs->hw.isar.rcvidx = ireg->clsb + 572 dle_count(bcs->hw.isar.rcvbuf, ireg->clsb); 573 if (cs->debug & L1_DEB_HSCX) 574 debugl1(cs, "isar_rcv_frame: raw(%d) dle(%d)", 575 ireg->clsb, bcs->hw.isar.rcvidx); 576 if ((skb = dev_alloc_skb(bcs->hw.isar.rcvidx))) { 577 insert_dle((u_char *)skb_put(skb, bcs->hw.isar.rcvidx), 578 bcs->hw.isar.rcvbuf, ireg->clsb); 579 skb_queue_tail(&bcs->rqueue, skb); 580 schedule_event(bcs, B_RCVBUFREADY); 581 if (ireg->cmsb & SART_NMD) { /* ABORT */ 582 if (cs->debug & L1_DEB_WARN) 583 debugl1(cs, "isar_rcv_frame: no more data"); 584 bcs->hw.isar.rcvidx = 0; 585 send_DLE_ETX(bcs); 586 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | 587 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 588 0, NULL); 589 bcs->hw.isar.state = STFAX_ESCAPE; 590 schedule_event(bcs, B_LL_NOCARRIER); 591 } 592 } else { 593 printk(KERN_WARNING "HiSax: skb out of memory\n"); 594 } 595 break; 596 } 597 if (bcs->hw.isar.cmd != PCTRL_CMD_FRH) { 598 if (cs->debug & L1_DEB_WARN) 599 debugl1(cs, "isar_rcv_frame: unknown fax mode %x", 600 bcs->hw.isar.cmd); 601 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 602 bcs->hw.isar.rcvidx = 0; 603 break; 604 } 605 /* PCTRL_CMD_FRH */ 606 if ((bcs->hw.isar.rcvidx + ireg->clsb) > HSCX_BUFMAX) { 607 if (cs->debug & L1_DEB_WARN) 608 debugl1(cs, "isar_rcv_frame: incoming packet too large"); 609 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 610 bcs->hw.isar.rcvidx = 0; 611 } else if (ireg->cmsb & HDLC_ERROR) { 612 if (cs->debug & L1_DEB_WARN) 613 debugl1(cs, "isar frame error %x len %d", 614 ireg->cmsb, ireg->clsb); 615 bcs->hw.isar.rcvidx = 0; 616 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 617 } else { 618 if (ireg->cmsb & HDLC_FSD) { 619 bcs->hw.isar.rcvidx = 0; 620 } 621 ptr = bcs->hw.isar.rcvbuf + bcs->hw.isar.rcvidx; 622 bcs->hw.isar.rcvidx += ireg->clsb; 623 rcv_mbox(cs, ireg, ptr); 624 if (ireg->cmsb & HDLC_FED) { 625 int len = bcs->hw.isar.rcvidx + 626 dle_count(bcs->hw.isar.rcvbuf, bcs->hw.isar.rcvidx); 627 if (bcs->hw.isar.rcvidx < 3) { /* last 2 bytes are the FCS */ 628 if (cs->debug & L1_DEB_WARN) 629 debugl1(cs, "isar frame to short %d", 630 bcs->hw.isar.rcvidx); 631 printk(KERN_WARNING "ISAR: frame to short %d\n", 632 bcs->hw.isar.rcvidx); 633 } else if (!(skb = dev_alloc_skb(len))) { 634 printk(KERN_WARNING "ISAR: receive out of memory\n"); 635 } else { 636 insert_dle((u_char *)skb_put(skb, len), 637 bcs->hw.isar.rcvbuf, 638 bcs->hw.isar.rcvidx); 639 skb_queue_tail(&bcs->rqueue, skb); 640 schedule_event(bcs, B_RCVBUFREADY); 641 send_DLE_ETX(bcs); 642 schedule_event(bcs, B_LL_OK); 643 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag); 644 } 645 bcs->hw.isar.rcvidx = 0; 646 } 647 } 648 if (ireg->cmsb & SART_NMD) { /* ABORT */ 649 if (cs->debug & L1_DEB_WARN) 650 debugl1(cs, "isar_rcv_frame: no more data"); 651 bcs->hw.isar.rcvidx = 0; 652 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | 653 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL); 654 bcs->hw.isar.state = STFAX_ESCAPE; 655 if (test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag)) { 656 send_DLE_ETX(bcs); 657 schedule_event(bcs, B_LL_NOCARRIER); 658 } 659 } 660 break; 661 default: 662 printk(KERN_ERR"isar_rcv_frame mode (%x)error\n", bcs->mode); 663 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 664 break; 665 } 666} 667 668void 669isar_fill_fifo(struct BCState *bcs) 670{ 671 struct IsdnCardState *cs = bcs->cs; 672 int count; 673 u_char msb; 674 u_char *ptr; 675 676 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO)) 677 debugl1(cs, "isar_fill_fifo"); 678 if (!bcs->tx_skb) 679 return; 680 if (bcs->tx_skb->len <= 0) 681 return; 682 if (!(bcs->hw.isar.reg->bstat & 683 (bcs->hw.isar.dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2))) 684 return; 685 if (bcs->tx_skb->len > bcs->hw.isar.mml) { 686 msb = 0; 687 count = bcs->hw.isar.mml; 688 } else { 689 count = bcs->tx_skb->len; 690 msb = HDLC_FED; 691 } 692 ptr = bcs->tx_skb->data; 693 if (!bcs->hw.isar.txcnt) { 694 msb |= HDLC_FST; 695 if ((bcs->mode == L1_MODE_FAX) && 696 (bcs->hw.isar.cmd == PCTRL_CMD_FTH)) { 697 if (bcs->tx_skb->len > 1) { 698 if ((ptr[0]== 0xff) && (ptr[1] == 0x13)) 699 /* last frame */ 700 test_and_set_bit(BC_FLG_LASTDATA, 701 &bcs->Flag); 702 } 703 } 704 } 705 skb_pull(bcs->tx_skb, count); 706 bcs->tx_cnt -= count; 707 bcs->hw.isar.txcnt += count; 708 switch (bcs->mode) { 709 case L1_MODE_NULL: 710 printk(KERN_ERR"isar_fill_fifo wrong mode 0\n"); 711 break; 712 case L1_MODE_TRANS: 713 case L1_MODE_V32: 714 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA, 715 0, count, ptr); 716 break; 717 case L1_MODE_HDLC: 718 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA, 719 msb, count, ptr); 720 break; 721 case L1_MODE_FAX: 722 if (bcs->hw.isar.state != STFAX_ACTIV) { 723 if (cs->debug & L1_DEB_WARN) 724 debugl1(cs, "isar_fill_fifo: not ACTIV"); 725 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) { 726 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA, 727 msb, count, ptr); 728 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTM) { 729 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA, 730 0, count, ptr); 731 } else { 732 if (cs->debug & L1_DEB_WARN) 733 debugl1(cs, "isar_fill_fifo: not FTH/FTM"); 734 } 735 break; 736 default: 737 if (cs->debug) 738 debugl1(cs, "isar_fill_fifo mode(%x) error", bcs->mode); 739 printk(KERN_ERR"isar_fill_fifo mode(%x) error\n", bcs->mode); 740 break; 741 } 742} 743 744static inline 745struct BCState *sel_bcs_isar(struct IsdnCardState *cs, u_char dpath) 746{ 747 if ((!dpath) || (dpath == 3)) 748 return(NULL); 749 if (cs->bcs[0].hw.isar.dpath == dpath) 750 return(&cs->bcs[0]); 751 if (cs->bcs[1].hw.isar.dpath == dpath) 752 return(&cs->bcs[1]); 753 return(NULL); 754} 755 756static void 757send_frames(struct BCState *bcs) 758{ 759 if (bcs->tx_skb) { 760 if (bcs->tx_skb->len) { 761 isar_fill_fifo(bcs); 762 return; 763 } else { 764 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 765 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 766 u_long flags; 767 spin_lock_irqsave(&bcs->aclock, flags); 768 bcs->ackcnt += bcs->hw.isar.txcnt; 769 spin_unlock_irqrestore(&bcs->aclock, flags); 770 schedule_event(bcs, B_ACKPENDING); 771 } 772 if (bcs->mode == L1_MODE_FAX) { 773 if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) { 774 if (test_bit(BC_FLG_LASTDATA, &bcs->Flag)) { 775 test_and_set_bit(BC_FLG_NMD_DATA, &bcs->Flag); 776 } 777 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTM) { 778 if (test_bit(BC_FLG_DLEETX, &bcs->Flag)) { 779 test_and_set_bit(BC_FLG_LASTDATA, &bcs->Flag); 780 test_and_set_bit(BC_FLG_NMD_DATA, &bcs->Flag); 781 } 782 } 783 } 784 dev_kfree_skb_any(bcs->tx_skb); 785 bcs->hw.isar.txcnt = 0; 786 bcs->tx_skb = NULL; 787 } 788 } 789 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) { 790 bcs->hw.isar.txcnt = 0; 791 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 792 isar_fill_fifo(bcs); 793 } else { 794 if (test_and_clear_bit(BC_FLG_DLEETX, &bcs->Flag)) { 795 if (test_and_clear_bit(BC_FLG_LASTDATA, &bcs->Flag)) { 796 if (test_and_clear_bit(BC_FLG_NMD_DATA, &bcs->Flag)) { 797 u_char dummy = 0; 798 sendmsg(bcs->cs, SET_DPS(bcs->hw.isar.dpath) | 799 ISAR_HIS_SDATA, 0x01, 1, &dummy); 800 } 801 test_and_set_bit(BC_FLG_LL_OK, &bcs->Flag); 802 } else { 803 schedule_event(bcs, B_LL_CONNECT); 804 } 805 } 806 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 807 schedule_event(bcs, B_XMTBUFREADY); 808 } 809} 810 811static inline void 812check_send(struct IsdnCardState *cs, u_char rdm) 813{ 814 struct BCState *bcs; 815 816 if (rdm & BSTAT_RDM1) { 817 if ((bcs = sel_bcs_isar(cs, 1))) { 818 if (bcs->mode) { 819 send_frames(bcs); 820 } 821 } 822 } 823 if (rdm & BSTAT_RDM2) { 824 if ((bcs = sel_bcs_isar(cs, 2))) { 825 if (bcs->mode) { 826 send_frames(bcs); 827 } 828 } 829 } 830 831} 832 833static const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", 834 "NODEF4", "300", "600", "1200", "2400", 835 "4800", "7200", "9600nt", "9600t", "12000", 836 "14400", "WRONG"}; 837static const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21", 838 "Bell103", "V23", "Bell202", "V17", "V29", 839 "V27ter"}; 840 841static void 842isar_pump_status_rsp(struct BCState *bcs, struct isar_reg *ireg) { 843 struct IsdnCardState *cs = bcs->cs; 844 u_char ril = ireg->par[0]; 845 u_char rim; 846 847 if (!test_and_clear_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags)) 848 return; 849 if (ril > 14) { 850 if (cs->debug & L1_DEB_WARN) 851 debugl1(cs, "wrong pstrsp ril=%d",ril); 852 ril = 15; 853 } 854 switch(ireg->par[1]) { 855 case 0: 856 rim = 0; 857 break; 858 case 0x20: 859 rim = 2; 860 break; 861 case 0x40: 862 rim = 3; 863 break; 864 case 0x41: 865 rim = 4; 866 break; 867 case 0x51: 868 rim = 5; 869 break; 870 case 0x61: 871 rim = 6; 872 break; 873 case 0x71: 874 rim = 7; 875 break; 876 case 0x82: 877 rim = 8; 878 break; 879 case 0x92: 880 rim = 9; 881 break; 882 case 0xa2: 883 rim = 10; 884 break; 885 default: 886 rim = 1; 887 break; 888 } 889 sprintf(bcs->hw.isar.conmsg,"%s %s", dmril[ril], dmrim[rim]); 890 bcs->conmsg = bcs->hw.isar.conmsg; 891 if (cs->debug & L1_DEB_HSCX) 892 debugl1(cs, "pump strsp %s", bcs->conmsg); 893} 894 895static void 896isar_pump_statev_modem(struct BCState *bcs, u_char devt) { 897 struct IsdnCardState *cs = bcs->cs; 898 u_char dps = SET_DPS(bcs->hw.isar.dpath); 899 900 switch(devt) { 901 case PSEV_10MS_TIMER: 902 if (cs->debug & L1_DEB_HSCX) 903 debugl1(cs, "pump stev TIMER"); 904 break; 905 case PSEV_CON_ON: 906 if (cs->debug & L1_DEB_HSCX) 907 debugl1(cs, "pump stev CONNECT"); 908 l1_msg_b(bcs->st, PH_ACTIVATE | REQUEST, NULL); 909 break; 910 case PSEV_CON_OFF: 911 if (cs->debug & L1_DEB_HSCX) 912 debugl1(cs, "pump stev NO CONNECT"); 913 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); 914 l1_msg_b(bcs->st, PH_DEACTIVATE | REQUEST, NULL); 915 break; 916 case PSEV_V24_OFF: 917 if (cs->debug & L1_DEB_HSCX) 918 debugl1(cs, "pump stev V24 OFF"); 919 break; 920 case PSEV_CTS_ON: 921 if (cs->debug & L1_DEB_HSCX) 922 debugl1(cs, "pump stev CTS ON"); 923 break; 924 case PSEV_CTS_OFF: 925 if (cs->debug & L1_DEB_HSCX) 926 debugl1(cs, "pump stev CTS OFF"); 927 break; 928 case PSEV_DCD_ON: 929 if (cs->debug & L1_DEB_HSCX) 930 debugl1(cs, "pump stev CARRIER ON"); 931 test_and_set_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags); 932 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); 933 break; 934 case PSEV_DCD_OFF: 935 if (cs->debug & L1_DEB_HSCX) 936 debugl1(cs, "pump stev CARRIER OFF"); 937 break; 938 case PSEV_DSR_ON: 939 if (cs->debug & L1_DEB_HSCX) 940 debugl1(cs, "pump stev DSR ON"); 941 break; 942 case PSEV_DSR_OFF: 943 if (cs->debug & L1_DEB_HSCX) 944 debugl1(cs, "pump stev DSR_OFF"); 945 break; 946 case PSEV_REM_RET: 947 if (cs->debug & L1_DEB_HSCX) 948 debugl1(cs, "pump stev REMOTE RETRAIN"); 949 break; 950 case PSEV_REM_REN: 951 if (cs->debug & L1_DEB_HSCX) 952 debugl1(cs, "pump stev REMOTE RENEGOTIATE"); 953 break; 954 case PSEV_GSTN_CLR: 955 if (cs->debug & L1_DEB_HSCX) 956 debugl1(cs, "pump stev GSTN CLEAR", devt); 957 break; 958 default: 959 if (cs->debug & L1_DEB_HSCX) 960 debugl1(cs, "unknown pump stev %x", devt); 961 break; 962 } 963} 964 965static void 966ll_deliver_faxstat(struct BCState *bcs, u_char status) 967{ 968 isdn_ctrl ic; 969 struct Channel *chanp = (struct Channel *) bcs->st->lli.userdata; 970 971 if (bcs->cs->debug & L1_DEB_HSCX) 972 debugl1(bcs->cs, "HL->LL FAXIND %x", status); 973 ic.driver = bcs->cs->myid; 974 ic.command = ISDN_STAT_FAXIND; 975 ic.arg = chanp->chan; 976 ic.parm.aux.cmd = status; 977 bcs->cs->iif.statcallb(&ic); 978} 979 980static void 981isar_pump_statev_fax(struct BCState *bcs, u_char devt) { 982 struct IsdnCardState *cs = bcs->cs; 983 u_char dps = SET_DPS(bcs->hw.isar.dpath); 984 u_char p1; 985 986 switch(devt) { 987 case PSEV_10MS_TIMER: 988 if (cs->debug & L1_DEB_HSCX) 989 debugl1(cs, "pump stev TIMER"); 990 break; 991 case PSEV_RSP_READY: 992 if (cs->debug & L1_DEB_HSCX) 993 debugl1(cs, "pump stev RSP_READY"); 994 bcs->hw.isar.state = STFAX_READY; 995 l1_msg_b(bcs->st, PH_ACTIVATE | REQUEST, NULL); 996 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) { 997 isar_pump_cmd(bcs, ISDN_FAX_CLASS1_FRH, 3); 998 } else { 999 isar_pump_cmd(bcs, ISDN_FAX_CLASS1_FTH, 3); 1000 } 1001 break; 1002 case PSEV_LINE_TX_H: 1003 if (bcs->hw.isar.state == STFAX_LINE) { 1004 if (cs->debug & L1_DEB_HSCX) 1005 debugl1(cs, "pump stev LINE_TX_H"); 1006 bcs->hw.isar.state = STFAX_CONT; 1007 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL); 1008 } else { 1009 if (cs->debug & L1_DEB_WARN) 1010 debugl1(cs, "pump stev LINE_TX_H wrong st %x", 1011 bcs->hw.isar.state); 1012 } 1013 break; 1014 case PSEV_LINE_RX_H: 1015 if (bcs->hw.isar.state == STFAX_LINE) { 1016 if (cs->debug & L1_DEB_HSCX) 1017 debugl1(cs, "pump stev LINE_RX_H"); 1018 bcs->hw.isar.state = STFAX_CONT; 1019 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL); 1020 } else { 1021 if (cs->debug & L1_DEB_WARN) 1022 debugl1(cs, "pump stev LINE_RX_H wrong st %x", 1023 bcs->hw.isar.state); 1024 } 1025 break; 1026 case PSEV_LINE_TX_B: 1027 if (bcs->hw.isar.state == STFAX_LINE) { 1028 if (cs->debug & L1_DEB_HSCX) 1029 debugl1(cs, "pump stev LINE_TX_B"); 1030 bcs->hw.isar.state = STFAX_CONT; 1031 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL); 1032 } else { 1033 if (cs->debug & L1_DEB_WARN) 1034 debugl1(cs, "pump stev LINE_TX_B wrong st %x", 1035 bcs->hw.isar.state); 1036 } 1037 break; 1038 case PSEV_LINE_RX_B: 1039 if (bcs->hw.isar.state == STFAX_LINE) { 1040 if (cs->debug & L1_DEB_HSCX) 1041 debugl1(cs, "pump stev LINE_RX_B"); 1042 bcs->hw.isar.state = STFAX_CONT; 1043 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL); 1044 } else { 1045 if (cs->debug & L1_DEB_WARN) 1046 debugl1(cs, "pump stev LINE_RX_B wrong st %x", 1047 bcs->hw.isar.state); 1048 } 1049 break; 1050 case PSEV_RSP_CONN: 1051 if (bcs->hw.isar.state == STFAX_CONT) { 1052 if (cs->debug & L1_DEB_HSCX) 1053 debugl1(cs, "pump stev RSP_CONN"); 1054 bcs->hw.isar.state = STFAX_ACTIV; 1055 test_and_set_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags); 1056 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); 1057 if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) { 1058 /* 1s Flags before data */ 1059 if (test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag)) 1060 del_timer(&bcs->hw.isar.ftimer); 1061 /* 1000 ms */ 1062 bcs->hw.isar.ftimer.expires = 1063 jiffies + ((1000 * HZ)/1000); 1064 test_and_set_bit(BC_FLG_LL_CONN, 1065 &bcs->Flag); 1066 add_timer(&bcs->hw.isar.ftimer); 1067 } else { 1068 schedule_event(bcs, B_LL_CONNECT); 1069 } 1070 } else { 1071 if (cs->debug & L1_DEB_WARN) 1072 debugl1(cs, "pump stev RSP_CONN wrong st %x", 1073 bcs->hw.isar.state); 1074 } 1075 break; 1076 case PSEV_FLAGS_DET: 1077 if (cs->debug & L1_DEB_HSCX) 1078 debugl1(cs, "pump stev FLAGS_DET"); 1079 break; 1080 case PSEV_RSP_DISC: 1081 if (cs->debug & L1_DEB_HSCX) 1082 debugl1(cs, "pump stev RSP_DISC"); 1083 if (bcs->hw.isar.state == STFAX_ESCAPE) { 1084 p1 = 5; 1085 switch(bcs->hw.isar.newcmd) { 1086 case 0: 1087 bcs->hw.isar.state = STFAX_READY; 1088 break; 1089 case PCTRL_CMD_FTM: 1090 p1 = 2; 1091 case PCTRL_CMD_FTH: 1092 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, 1093 PCTRL_CMD_SILON, 1, &p1); 1094 bcs->hw.isar.state = STFAX_SILDET; 1095 break; 1096 case PCTRL_CMD_FRM: 1097 if (frm_extra_delay) 1098 mdelay(frm_extra_delay); 1099 case PCTRL_CMD_FRH: 1100 p1 = bcs->hw.isar.mod = bcs->hw.isar.newmod; 1101 bcs->hw.isar.newmod = 0; 1102 bcs->hw.isar.cmd = bcs->hw.isar.newcmd; 1103 bcs->hw.isar.newcmd = 0; 1104 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, 1105 bcs->hw.isar.cmd, 1, &p1); 1106 bcs->hw.isar.state = STFAX_LINE; 1107 bcs->hw.isar.try_mod = 3; 1108 break; 1109 default: 1110 if (cs->debug & L1_DEB_HSCX) 1111 debugl1(cs, "RSP_DISC unknown newcmd %x", bcs->hw.isar.newcmd); 1112 break; 1113 } 1114 } else if (bcs->hw.isar.state == STFAX_ACTIV) { 1115 if (test_and_clear_bit(BC_FLG_LL_OK, &bcs->Flag)) { 1116 schedule_event(bcs, B_LL_OK); 1117 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FRM) { 1118 send_DLE_ETX(bcs); 1119 schedule_event(bcs, B_LL_NOCARRIER); 1120 } else { 1121 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR); 1122 } 1123 bcs->hw.isar.state = STFAX_READY; 1124 } else { 1125 bcs->hw.isar.state = STFAX_READY; 1126 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR); 1127 } 1128 break; 1129 case PSEV_RSP_SILDET: 1130 if (cs->debug & L1_DEB_HSCX) 1131 debugl1(cs, "pump stev RSP_SILDET"); 1132 if (bcs->hw.isar.state == STFAX_SILDET) { 1133 p1 = bcs->hw.isar.mod = bcs->hw.isar.newmod; 1134 bcs->hw.isar.newmod = 0; 1135 bcs->hw.isar.cmd = bcs->hw.isar.newcmd; 1136 bcs->hw.isar.newcmd = 0; 1137 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, 1138 bcs->hw.isar.cmd, 1, &p1); 1139 bcs->hw.isar.state = STFAX_LINE; 1140 bcs->hw.isar.try_mod = 3; 1141 } 1142 break; 1143 case PSEV_RSP_SILOFF: 1144 if (cs->debug & L1_DEB_HSCX) 1145 debugl1(cs, "pump stev RSP_SILOFF"); 1146 break; 1147 case PSEV_RSP_FCERR: 1148 if (bcs->hw.isar.state == STFAX_LINE) { 1149 if (cs->debug & L1_DEB_HSCX) 1150 debugl1(cs, "pump stev RSP_FCERR try %d", 1151 bcs->hw.isar.try_mod); 1152 if (bcs->hw.isar.try_mod--) { 1153 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, 1154 bcs->hw.isar.cmd, 1, 1155 &bcs->hw.isar.mod); 1156 break; 1157 } 1158 } 1159 if (cs->debug & L1_DEB_HSCX) 1160 debugl1(cs, "pump stev RSP_FCERR"); 1161 bcs->hw.isar.state = STFAX_ESCAPE; 1162 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL); 1163 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR); 1164 break; 1165 default: 1166 break; 1167 } 1168} 1169 1170static char debbuf[128]; 1171 1172void 1173isar_int_main(struct IsdnCardState *cs) 1174{ 1175 struct isar_reg *ireg = cs->bcs[0].hw.isar.reg; 1176 struct BCState *bcs; 1177 1178 get_irq_infos(cs, ireg); 1179 switch (ireg->iis & ISAR_IIS_MSCMSD) { 1180 case ISAR_IIS_RDATA: 1181 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) { 1182 isar_rcv_frame(cs, bcs); 1183 } else { 1184 debugl1(cs, "isar spurious IIS_RDATA %x/%x/%x", 1185 ireg->iis, ireg->cmsb, ireg->clsb); 1186 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 1187 } 1188 break; 1189 case ISAR_IIS_GSTEV: 1190 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 1191 ireg->bstat |= ireg->cmsb; 1192 check_send(cs, ireg->cmsb); 1193 break; 1194 case ISAR_IIS_BSTEV: 1195#ifdef ERROR_STATISTIC 1196 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) { 1197 if (ireg->cmsb == BSTEV_TBO) 1198 bcs->err_tx++; 1199 if (ireg->cmsb == BSTEV_RBO) 1200 bcs->err_rdo++; 1201 } 1202#endif 1203 if (cs->debug & L1_DEB_WARN) 1204 debugl1(cs, "Buffer STEV dpath%d msb(%x)", 1205 ireg->iis>>6, ireg->cmsb); 1206 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 1207 break; 1208 case ISAR_IIS_PSTEV: 1209 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) { 1210 rcv_mbox(cs, ireg, (u_char *)ireg->par); 1211 if (bcs->mode == L1_MODE_V32) { 1212 isar_pump_statev_modem(bcs, ireg->cmsb); 1213 } else if (bcs->mode == L1_MODE_FAX) { 1214 isar_pump_statev_fax(bcs, ireg->cmsb); 1215 } else if (ireg->cmsb == PSEV_10MS_TIMER) { 1216 if (cs->debug & L1_DEB_HSCX) 1217 debugl1(cs, "pump stev TIMER"); 1218 } else { 1219 if (cs->debug & L1_DEB_WARN) 1220 debugl1(cs, "isar IIS_PSTEV pmode %d stat %x", 1221 bcs->mode, ireg->cmsb); 1222 } 1223 } else { 1224 debugl1(cs, "isar spurious IIS_PSTEV %x/%x/%x", 1225 ireg->iis, ireg->cmsb, ireg->clsb); 1226 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 1227 } 1228 break; 1229 case ISAR_IIS_PSTRSP: 1230 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) { 1231 rcv_mbox(cs, ireg, (u_char *)ireg->par); 1232 isar_pump_status_rsp(bcs, ireg); 1233 } else { 1234 debugl1(cs, "isar spurious IIS_PSTRSP %x/%x/%x", 1235 ireg->iis, ireg->cmsb, ireg->clsb); 1236 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 1237 } 1238 break; 1239 case ISAR_IIS_DIAG: 1240 case ISAR_IIS_BSTRSP: 1241 case ISAR_IIS_IOM2RSP: 1242 rcv_mbox(cs, ireg, (u_char *)ireg->par); 1243 if ((cs->debug & (L1_DEB_HSCX | L1_DEB_HSCX_FIFO)) 1244 == L1_DEB_HSCX) { 1245 u_char *tp=debbuf; 1246 1247 tp += sprintf(debbuf, "msg iis(%x) msb(%x)", 1248 ireg->iis, ireg->cmsb); 1249 QuickHex(tp, (u_char *)ireg->par, ireg->clsb); 1250 debugl1(cs, debbuf); 1251 } 1252 break; 1253 case ISAR_IIS_INVMSG: 1254 rcv_mbox(cs, ireg, debbuf); 1255 if (cs->debug & L1_DEB_WARN) 1256 debugl1(cs, "invalid msg his:%x", 1257 ireg->cmsb); 1258 break; 1259 default: 1260 rcv_mbox(cs, ireg, debbuf); 1261 if (cs->debug & L1_DEB_WARN) 1262 debugl1(cs, "unhandled msg iis(%x) ctrl(%x/%x)", 1263 ireg->iis, ireg->cmsb, ireg->clsb); 1264 break; 1265 } 1266} 1267 1268static void 1269ftimer_handler(struct BCState *bcs) { 1270 if (bcs->cs->debug) 1271 debugl1(bcs->cs, "ftimer flags %04x", 1272 bcs->Flag); 1273 test_and_clear_bit(BC_FLG_FTI_RUN, &bcs->Flag); 1274 if (test_and_clear_bit(BC_FLG_LL_CONN, &bcs->Flag)) { 1275 schedule_event(bcs, B_LL_CONNECT); 1276 } 1277 if (test_and_clear_bit(BC_FLG_FTI_FTS, &bcs->Flag)) { 1278 schedule_event(bcs, B_LL_OK); 1279 } 1280} 1281 1282static void 1283setup_pump(struct BCState *bcs) { 1284 struct IsdnCardState *cs = bcs->cs; 1285 u_char dps = SET_DPS(bcs->hw.isar.dpath); 1286 u_char ctrl, param[6]; 1287 1288 switch (bcs->mode) { 1289 case L1_MODE_NULL: 1290 case L1_MODE_TRANS: 1291 case L1_MODE_HDLC: 1292 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL); 1293 break; 1294 case L1_MODE_V32: 1295 ctrl = PMOD_DATAMODEM; 1296 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) { 1297 ctrl |= PCTRL_ORIG; 1298 param[5] = PV32P6_CTN; 1299 } else { 1300 param[5] = PV32P6_ATN; 1301 } 1302 param[0] = para_TOA; /* 6 db */ 1303 param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B | 1304 PV32P2_V22C | PV32P2_V21 | PV32P2_BEL; 1305 param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B; 1306 param[3] = PV32P4_UT144; 1307 param[4] = PV32P5_UT144; 1308 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param); 1309 break; 1310 case L1_MODE_FAX: 1311 ctrl = PMOD_FAX; 1312 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) { 1313 ctrl |= PCTRL_ORIG; 1314 param[1] = PFAXP2_CTN; 1315 } else { 1316 param[1] = PFAXP2_ATN; 1317 } 1318 param[0] = para_TOA; /* 6 db */ 1319 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param); 1320 bcs->hw.isar.state = STFAX_NULL; 1321 bcs->hw.isar.newcmd = 0; 1322 bcs->hw.isar.newmod = 0; 1323 test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag); 1324 break; 1325 } 1326 udelay(1000); 1327 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); 1328 udelay(1000); 1329} 1330 1331static void 1332setup_sart(struct BCState *bcs) { 1333 struct IsdnCardState *cs = bcs->cs; 1334 u_char dps = SET_DPS(bcs->hw.isar.dpath); 1335 u_char ctrl, param[2]; 1336 1337 switch (bcs->mode) { 1338 case L1_MODE_NULL: 1339 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE, 0, 1340 NULL); 1341 break; 1342 case L1_MODE_TRANS: 1343 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_BINARY, 2, 1344 "\0\0"); 1345 break; 1346 case L1_MODE_HDLC: 1347 param[0] = 0; 1348 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_HDLC, 1, 1349 param); 1350 break; 1351 case L1_MODE_V32: 1352 ctrl = SMODE_V14 | SCTRL_HDMC_BOTH; 1353 param[0] = S_P1_CHS_8; 1354 param[1] = S_P2_BFT_DEF; 1355 sendmsg(cs, dps | ISAR_HIS_SARTCFG, ctrl, 2, 1356 param); 1357 break; 1358 case L1_MODE_FAX: 1359 /* SART must not configured with FAX */ 1360 break; 1361 } 1362 udelay(1000); 1363 sendmsg(cs, dps | ISAR_HIS_BSTREQ, 0, 0, NULL); 1364 udelay(1000); 1365} 1366 1367static void 1368setup_iom2(struct BCState *bcs) { 1369 struct IsdnCardState *cs = bcs->cs; 1370 u_char dps = SET_DPS(bcs->hw.isar.dpath); 1371 u_char cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD,0,0,0,0}; 1372 1373 if (bcs->channel) 1374 msg[1] = msg[3] = 1; 1375 switch (bcs->mode) { 1376 case L1_MODE_NULL: 1377 cmsb = 0; 1378 /* dummy slot */ 1379 msg[1] = msg[3] = bcs->hw.isar.dpath + 2; 1380 break; 1381 case L1_MODE_TRANS: 1382 case L1_MODE_HDLC: 1383 break; 1384 case L1_MODE_V32: 1385 case L1_MODE_FAX: 1386 cmsb |= IOM_CTRL_ALAW | IOM_CTRL_RCV; 1387 break; 1388 } 1389 sendmsg(cs, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg); 1390 udelay(1000); 1391 sendmsg(cs, dps | ISAR_HIS_IOM2REQ, 0, 0, NULL); 1392 udelay(1000); 1393} 1394 1395static int 1396modeisar(struct BCState *bcs, int mode, int bc) 1397{ 1398 struct IsdnCardState *cs = bcs->cs; 1399 1400 /* Here we are selecting the best datapath for requested mode */ 1401 if(bcs->mode == L1_MODE_NULL) { /* New Setup */ 1402 bcs->channel = bc; 1403 switch (mode) { 1404 case L1_MODE_NULL: /* init */ 1405 if (!bcs->hw.isar.dpath) 1406 /* no init for dpath 0 */ 1407 return(0); 1408 break; 1409 case L1_MODE_TRANS: 1410 case L1_MODE_HDLC: 1411 /* best is datapath 2 */ 1412 if (!test_and_set_bit(ISAR_DP2_USE, 1413 &bcs->hw.isar.reg->Flags)) 1414 bcs->hw.isar.dpath = 2; 1415 else if (!test_and_set_bit(ISAR_DP1_USE, 1416 &bcs->hw.isar.reg->Flags)) 1417 bcs->hw.isar.dpath = 1; 1418 else { 1419 printk(KERN_WARNING"isar modeisar both pathes in use\n"); 1420 return(1); 1421 } 1422 break; 1423 case L1_MODE_V32: 1424 case L1_MODE_FAX: 1425 /* only datapath 1 */ 1426 if (!test_and_set_bit(ISAR_DP1_USE, 1427 &bcs->hw.isar.reg->Flags)) 1428 bcs->hw.isar.dpath = 1; 1429 else { 1430 printk(KERN_WARNING"isar modeisar analog funktions only with DP1\n"); 1431 debugl1(cs, "isar modeisar analog funktions only with DP1"); 1432 return(1); 1433 } 1434 break; 1435 } 1436 } 1437 if (cs->debug & L1_DEB_HSCX) 1438 debugl1(cs, "isar dp%d mode %d->%d ichan %d", 1439 bcs->hw.isar.dpath, bcs->mode, mode, bc); 1440 bcs->mode = mode; 1441 setup_pump(bcs); 1442 setup_iom2(bcs); 1443 setup_sart(bcs); 1444 if (bcs->mode == L1_MODE_NULL) { 1445 /* Clear resources */ 1446 if (bcs->hw.isar.dpath == 1) 1447 test_and_clear_bit(ISAR_DP1_USE, &bcs->hw.isar.reg->Flags); 1448 else if (bcs->hw.isar.dpath == 2) 1449 test_and_clear_bit(ISAR_DP2_USE, &bcs->hw.isar.reg->Flags); 1450 bcs->hw.isar.dpath = 0; 1451 } 1452 return(0); 1453} 1454 1455static void 1456isar_pump_cmd(struct BCState *bcs, u_char cmd, u_char para) 1457{ 1458 struct IsdnCardState *cs = bcs->cs; 1459 u_char dps = SET_DPS(bcs->hw.isar.dpath); 1460 u_char ctrl = 0, nom = 0, p1 = 0; 1461 1462 switch(cmd) { 1463 case ISDN_FAX_CLASS1_FTM: 1464 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag); 1465 if (bcs->hw.isar.state == STFAX_READY) { 1466 p1 = para; 1467 ctrl = PCTRL_CMD_FTM; 1468 nom = 1; 1469 bcs->hw.isar.state = STFAX_LINE; 1470 bcs->hw.isar.cmd = ctrl; 1471 bcs->hw.isar.mod = para; 1472 bcs->hw.isar.newmod = 0; 1473 bcs->hw.isar.newcmd = 0; 1474 bcs->hw.isar.try_mod = 3; 1475 } else if ((bcs->hw.isar.state == STFAX_ACTIV) && 1476 (bcs->hw.isar.cmd == PCTRL_CMD_FTM) && 1477 (bcs->hw.isar.mod == para)) { 1478 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT); 1479 } else { 1480 bcs->hw.isar.newmod = para; 1481 bcs->hw.isar.newcmd = PCTRL_CMD_FTM; 1482 nom = 0; 1483 ctrl = PCTRL_CMD_ESC; 1484 bcs->hw.isar.state = STFAX_ESCAPE; 1485 } 1486 break; 1487 case ISDN_FAX_CLASS1_FTH: 1488 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag); 1489 if (bcs->hw.isar.state == STFAX_READY) { 1490 p1 = para; 1491 ctrl = PCTRL_CMD_FTH; 1492 nom = 1; 1493 bcs->hw.isar.state = STFAX_LINE; 1494 bcs->hw.isar.cmd = ctrl; 1495 bcs->hw.isar.mod = para; 1496 bcs->hw.isar.newmod = 0; 1497 bcs->hw.isar.newcmd = 0; 1498 bcs->hw.isar.try_mod = 3; 1499 } else if ((bcs->hw.isar.state == STFAX_ACTIV) && 1500 (bcs->hw.isar.cmd == PCTRL_CMD_FTH) && 1501 (bcs->hw.isar.mod == para)) { 1502 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT); 1503 } else { 1504 bcs->hw.isar.newmod = para; 1505 bcs->hw.isar.newcmd = PCTRL_CMD_FTH; 1506 nom = 0; 1507 ctrl = PCTRL_CMD_ESC; 1508 bcs->hw.isar.state = STFAX_ESCAPE; 1509 } 1510 break; 1511 case ISDN_FAX_CLASS1_FRM: 1512 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag); 1513 if (bcs->hw.isar.state == STFAX_READY) { 1514 p1 = para; 1515 ctrl = PCTRL_CMD_FRM; 1516 nom = 1; 1517 bcs->hw.isar.state = STFAX_LINE; 1518 bcs->hw.isar.cmd = ctrl; 1519 bcs->hw.isar.mod = para; 1520 bcs->hw.isar.newmod = 0; 1521 bcs->hw.isar.newcmd = 0; 1522 bcs->hw.isar.try_mod = 3; 1523 } else if ((bcs->hw.isar.state == STFAX_ACTIV) && 1524 (bcs->hw.isar.cmd == PCTRL_CMD_FRM) && 1525 (bcs->hw.isar.mod == para)) { 1526 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT); 1527 } else { 1528 bcs->hw.isar.newmod = para; 1529 bcs->hw.isar.newcmd = PCTRL_CMD_FRM; 1530 nom = 0; 1531 ctrl = PCTRL_CMD_ESC; 1532 bcs->hw.isar.state = STFAX_ESCAPE; 1533 } 1534 break; 1535 case ISDN_FAX_CLASS1_FRH: 1536 test_and_set_bit(BC_FLG_FRH_WAIT, &bcs->Flag); 1537 if (bcs->hw.isar.state == STFAX_READY) { 1538 p1 = para; 1539 ctrl = PCTRL_CMD_FRH; 1540 nom = 1; 1541 bcs->hw.isar.state = STFAX_LINE; 1542 bcs->hw.isar.cmd = ctrl; 1543 bcs->hw.isar.mod = para; 1544 bcs->hw.isar.newmod = 0; 1545 bcs->hw.isar.newcmd = 0; 1546 bcs->hw.isar.try_mod = 3; 1547 } else if ((bcs->hw.isar.state == STFAX_ACTIV) && 1548 (bcs->hw.isar.cmd == PCTRL_CMD_FRH) && 1549 (bcs->hw.isar.mod == para)) { 1550 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT); 1551 } else { 1552 bcs->hw.isar.newmod = para; 1553 bcs->hw.isar.newcmd = PCTRL_CMD_FRH; 1554 nom = 0; 1555 ctrl = PCTRL_CMD_ESC; 1556 bcs->hw.isar.state = STFAX_ESCAPE; 1557 } 1558 break; 1559 case ISDN_FAXPUMP_HALT: 1560 bcs->hw.isar.state = STFAX_NULL; 1561 nom = 0; 1562 ctrl = PCTRL_CMD_HALT; 1563 break; 1564 } 1565 if (ctrl) 1566 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1); 1567} 1568 1569static void 1570isar_setup(struct IsdnCardState *cs) 1571{ 1572 u_char msg; 1573 int i; 1574 1575 /* Dpath 1, 2 */ 1576 msg = 61; 1577 for (i=0; i<2; i++) { 1578 /* Buffer Config */ 1579 sendmsg(cs, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) | 1580 ISAR_HIS_P12CFG, 4, 1, &msg); 1581 cs->bcs[i].hw.isar.mml = msg; 1582 cs->bcs[i].mode = 0; 1583 cs->bcs[i].hw.isar.dpath = i + 1; 1584 modeisar(&cs->bcs[i], 0, 0); 1585 INIT_WORK(&cs->bcs[i].tqueue, isar_bh); 1586 } 1587} 1588 1589static void 1590isar_l2l1(struct PStack *st, int pr, void *arg) 1591{ 1592 struct BCState *bcs = st->l1.bcs; 1593 struct sk_buff *skb = arg; 1594 int ret; 1595 u_long flags; 1596 1597 switch (pr) { 1598 case (PH_DATA | REQUEST): 1599 spin_lock_irqsave(&bcs->cs->lock, flags); 1600 if (bcs->tx_skb) { 1601 skb_queue_tail(&bcs->squeue, skb); 1602 } else { 1603 bcs->tx_skb = skb; 1604 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 1605 if (bcs->cs->debug & L1_DEB_HSCX) 1606 debugl1(bcs->cs, "DRQ set BC_FLG_BUSY"); 1607 bcs->hw.isar.txcnt = 0; 1608 bcs->cs->BC_Send_Data(bcs); 1609 } 1610 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1611 break; 1612 case (PH_PULL | INDICATION): 1613 spin_lock_irqsave(&bcs->cs->lock, flags); 1614 if (bcs->tx_skb) { 1615 printk(KERN_WARNING "isar_l2l1: this shouldn't happen\n"); 1616 } else { 1617 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 1618 if (bcs->cs->debug & L1_DEB_HSCX) 1619 debugl1(bcs->cs, "PUI set BC_FLG_BUSY"); 1620 bcs->tx_skb = skb; 1621 bcs->hw.isar.txcnt = 0; 1622 bcs->cs->BC_Send_Data(bcs); 1623 } 1624 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1625 break; 1626 case (PH_PULL | REQUEST): 1627 if (!bcs->tx_skb) { 1628 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 1629 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 1630 } else 1631 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 1632 break; 1633 case (PH_ACTIVATE | REQUEST): 1634 spin_lock_irqsave(&bcs->cs->lock, flags); 1635 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag); 1636 bcs->hw.isar.conmsg[0] = 0; 1637 if (test_bit(FLG_ORIG, &st->l2.flag)) 1638 test_and_set_bit(BC_FLG_ORIG, &bcs->Flag); 1639 else 1640 test_and_clear_bit(BC_FLG_ORIG, &bcs->Flag); 1641 switch(st->l1.mode) { 1642 case L1_MODE_TRANS: 1643 case L1_MODE_HDLC: 1644 ret = modeisar(bcs, st->l1.mode, st->l1.bc); 1645 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1646 if (ret) 1647 l1_msg_b(st, PH_DEACTIVATE | REQUEST, arg); 1648 else 1649 l1_msg_b(st, PH_ACTIVATE | REQUEST, arg); 1650 break; 1651 case L1_MODE_V32: 1652 case L1_MODE_FAX: 1653 ret = modeisar(bcs, st->l1.mode, st->l1.bc); 1654 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1655 if (ret) 1656 l1_msg_b(st, PH_DEACTIVATE | REQUEST, arg); 1657 break; 1658 default: 1659 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1660 break; 1661 } 1662 break; 1663 case (PH_DEACTIVATE | REQUEST): 1664 l1_msg_b(st, pr, arg); 1665 break; 1666 case (PH_DEACTIVATE | CONFIRM): 1667 spin_lock_irqsave(&bcs->cs->lock, flags); 1668 switch(st->l1.mode) { 1669 case L1_MODE_TRANS: 1670 case L1_MODE_HDLC: 1671 case L1_MODE_V32: 1672 break; 1673 case L1_MODE_FAX: 1674 isar_pump_cmd(bcs, ISDN_FAXPUMP_HALT, 0); 1675 break; 1676 } 1677 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag); 1678 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 1679 if (bcs->cs->debug & L1_DEB_HSCX) 1680 debugl1(bcs->cs, "PDAC clear BC_FLG_BUSY"); 1681 modeisar(bcs, 0, st->l1.bc); 1682 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1683 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); 1684 break; 1685 } 1686} 1687 1688static void 1689close_isarstate(struct BCState *bcs) 1690{ 1691 modeisar(bcs, 0, bcs->channel); 1692 if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) { 1693 kfree(bcs->hw.isar.rcvbuf); 1694 bcs->hw.isar.rcvbuf = NULL; 1695 skb_queue_purge(&bcs->rqueue); 1696 skb_queue_purge(&bcs->squeue); 1697 if (bcs->tx_skb) { 1698 dev_kfree_skb_any(bcs->tx_skb); 1699 bcs->tx_skb = NULL; 1700 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 1701 if (bcs->cs->debug & L1_DEB_HSCX) 1702 debugl1(bcs->cs, "closeisar clear BC_FLG_BUSY"); 1703 } 1704 } 1705 del_timer(&bcs->hw.isar.ftimer); 1706} 1707 1708static int 1709open_isarstate(struct IsdnCardState *cs, struct BCState *bcs) 1710{ 1711 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) { 1712 if (!(bcs->hw.isar.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) { 1713 printk(KERN_WARNING 1714 "HiSax: No memory for isar.rcvbuf\n"); 1715 return (1); 1716 } 1717 skb_queue_head_init(&bcs->rqueue); 1718 skb_queue_head_init(&bcs->squeue); 1719 } 1720 bcs->tx_skb = NULL; 1721 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 1722 if (cs->debug & L1_DEB_HSCX) 1723 debugl1(cs, "openisar clear BC_FLG_BUSY"); 1724 bcs->event = 0; 1725 bcs->hw.isar.rcvidx = 0; 1726 bcs->tx_cnt = 0; 1727 return (0); 1728} 1729 1730static int 1731setstack_isar(struct PStack *st, struct BCState *bcs) 1732{ 1733 bcs->channel = st->l1.bc; 1734 if (open_isarstate(st->l1.hardware, bcs)) 1735 return (-1); 1736 st->l1.bcs = bcs; 1737 st->l2.l2l1 = isar_l2l1; 1738 setstack_manager(st); 1739 bcs->st = st; 1740 setstack_l1_B(st); 1741 return (0); 1742} 1743 1744int 1745isar_auxcmd(struct IsdnCardState *cs, isdn_ctrl *ic) { 1746 u_long adr; 1747 int features, i; 1748 struct BCState *bcs; 1749 1750 if (cs->debug & L1_DEB_HSCX) 1751 debugl1(cs, "isar_auxcmd cmd/ch %x/%d", ic->command, ic->arg); 1752 switch (ic->command) { 1753 case (ISDN_CMD_FAXCMD): 1754 bcs = cs->channel[ic->arg].bcs; 1755 if (cs->debug & L1_DEB_HSCX) 1756 debugl1(cs, "isar_auxcmd cmd/subcmd %d/%d", 1757 ic->parm.aux.cmd, ic->parm.aux.subcmd); 1758 switch(ic->parm.aux.cmd) { 1759 case ISDN_FAX_CLASS1_CTRL: 1760 if (ic->parm.aux.subcmd == ETX) 1761 test_and_set_bit(BC_FLG_DLEETX, 1762 &bcs->Flag); 1763 break; 1764 case ISDN_FAX_CLASS1_FTS: 1765 if (ic->parm.aux.subcmd == AT_QUERY) { 1766 ic->command = ISDN_STAT_FAXIND; 1767 ic->parm.aux.cmd = ISDN_FAX_CLASS1_OK; 1768 cs->iif.statcallb(ic); 1769 return(0); 1770 } else if (ic->parm.aux.subcmd == AT_EQ_QUERY) { 1771 strcpy(ic->parm.aux.para, "0-255"); 1772 ic->command = ISDN_STAT_FAXIND; 1773 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY; 1774 cs->iif.statcallb(ic); 1775 return(0); 1776 } else if (ic->parm.aux.subcmd == AT_EQ_VALUE) { 1777 if (cs->debug & L1_DEB_HSCX) 1778 debugl1(cs, "isar_auxcmd %s=%d", 1779 FC1_CMD[ic->parm.aux.cmd], ic->parm.aux.para[0]); 1780 if (bcs->hw.isar.state == STFAX_READY) { 1781 if (! ic->parm.aux.para[0]) { 1782 ic->command = ISDN_STAT_FAXIND; 1783 ic->parm.aux.cmd = ISDN_FAX_CLASS1_OK; 1784 cs->iif.statcallb(ic); 1785 return(0); 1786 } 1787 if (! test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag)) { 1788 /* n*10 ms */ 1789 bcs->hw.isar.ftimer.expires = 1790 jiffies + ((ic->parm.aux.para[0] * 10 * HZ)/1000); 1791 test_and_set_bit(BC_FLG_FTI_FTS, &bcs->Flag); 1792 add_timer(&bcs->hw.isar.ftimer); 1793 return(0); 1794 } else { 1795 if (cs->debug) 1796 debugl1(cs, "isar FTS=%d and FTI busy", 1797 ic->parm.aux.para[0]); 1798 } 1799 } else { 1800 if (cs->debug) 1801 debugl1(cs, "isar FTS=%d and isar.state not ready(%x)", 1802 ic->parm.aux.para[0],bcs->hw.isar.state); 1803 } 1804 ic->command = ISDN_STAT_FAXIND; 1805 ic->parm.aux.cmd = ISDN_FAX_CLASS1_ERROR; 1806 cs->iif.statcallb(ic); 1807 } 1808 break; 1809 case ISDN_FAX_CLASS1_FRM: 1810 case ISDN_FAX_CLASS1_FRH: 1811 case ISDN_FAX_CLASS1_FTM: 1812 case ISDN_FAX_CLASS1_FTH: 1813 if (ic->parm.aux.subcmd == AT_QUERY) { 1814 sprintf(ic->parm.aux.para, 1815 "%d", bcs->hw.isar.mod); 1816 ic->command = ISDN_STAT_FAXIND; 1817 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY; 1818 cs->iif.statcallb(ic); 1819 return(0); 1820 } else if (ic->parm.aux.subcmd == AT_EQ_QUERY) { 1821 char *p = ic->parm.aux.para; 1822 for(i=0;i<FAXMODCNT;i++) 1823 if ((1<<i) & modmask) 1824 p += sprintf(p, "%d,", faxmodulation[i]); 1825 p--; 1826 *p=0; 1827 ic->command = ISDN_STAT_FAXIND; 1828 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY; 1829 cs->iif.statcallb(ic); 1830 return(0); 1831 } else if (ic->parm.aux.subcmd == AT_EQ_VALUE) { 1832 if (cs->debug & L1_DEB_HSCX) 1833 debugl1(cs, "isar_auxcmd %s=%d", 1834 FC1_CMD[ic->parm.aux.cmd], ic->parm.aux.para[0]); 1835 for(i=0;i<FAXMODCNT;i++) 1836 if (faxmodulation[i]==ic->parm.aux.para[0]) 1837 break; 1838 if ((i < FAXMODCNT) && ((1<<i) & modmask) && 1839 test_bit(BC_FLG_INIT, &bcs->Flag)) { 1840 isar_pump_cmd(bcs, 1841 ic->parm.aux.cmd, 1842 ic->parm.aux.para[0]); 1843 return(0); 1844 } 1845 } 1846 /* wrong modulation or not activ */ 1847 /* fall through */ 1848 default: 1849 ic->command = ISDN_STAT_FAXIND; 1850 ic->parm.aux.cmd = ISDN_FAX_CLASS1_ERROR; 1851 cs->iif.statcallb(ic); 1852 } 1853 break; 1854 case (ISDN_CMD_IOCTL): 1855 switch (ic->arg) { 1856 case 9: /* load firmware */ 1857 features = ISDN_FEATURE_L2_MODEM | 1858 ISDN_FEATURE_L2_FAX | 1859 ISDN_FEATURE_L3_FCLASS1; 1860 memcpy(&adr, ic->parm.num, sizeof(ulong)); 1861 if (isar_load_firmware(cs, (u_char __user *)adr)) 1862 return(1); 1863 else 1864 ll_run(cs, features); 1865 break; 1866 case 20: 1867 features = *(unsigned int *) ic->parm.num; 1868 printk(KERN_DEBUG "HiSax: max modulation old(%04x) new(%04x)\n", 1869 modmask, features); 1870 modmask = features; 1871 break; 1872 case 21: 1873 features = *(unsigned int *) ic->parm.num; 1874 printk(KERN_DEBUG "HiSax: FRM extra delay old(%d) new(%d) ms\n", 1875 frm_extra_delay, features); 1876 if (features >= 0) 1877 frm_extra_delay = features; 1878 break; 1879 case 22: 1880 features = *(unsigned int *) ic->parm.num; 1881 printk(KERN_DEBUG "HiSax: TOA old(%d) new(%d) db\n", 1882 para_TOA, features); 1883 if (features >= 0 && features < 32) 1884 para_TOA = features; 1885 break; 1886 default: 1887 printk(KERN_DEBUG "HiSax: invalid ioctl %d\n", 1888 (int) ic->arg); 1889 return(-EINVAL); 1890 } 1891 break; 1892 default: 1893 return(-EINVAL); 1894 } 1895 return(0); 1896} 1897 1898void initisar(struct IsdnCardState *cs) 1899{ 1900 cs->bcs[0].BC_SetStack = setstack_isar; 1901 cs->bcs[1].BC_SetStack = setstack_isar; 1902 cs->bcs[0].BC_Close = close_isarstate; 1903 cs->bcs[1].BC_Close = close_isarstate; 1904 cs->bcs[0].hw.isar.ftimer.function = (void *) ftimer_handler; 1905 cs->bcs[0].hw.isar.ftimer.data = (long) &cs->bcs[0]; 1906 init_timer(&cs->bcs[0].hw.isar.ftimer); 1907 cs->bcs[1].hw.isar.ftimer.function = (void *) ftimer_handler; 1908 cs->bcs[1].hw.isar.ftimer.data = (long) &cs->bcs[1]; 1909 init_timer(&cs->bcs[1].hw.isar.ftimer); 1910} 1911