1/* 2 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> 3 * Copyright (C) 1995-1998 Mark Lord 4 * Copyright (C) 2007-2009 Bartlomiej Zolnierkiewicz 5 * 6 * May be copied or modified under the terms of the GNU General Public License 7 */ 8 9#include <linux/types.h> 10#include <linux/kernel.h> 11#include <linux/pci.h> 12#include <linux/init.h> 13#include <linux/interrupt.h> 14#include <linux/ide.h> 15#include <linux/dma-mapping.h> 16 17#include <asm/io.h> 18 19 20static int ide_setup_pci_baseregs(struct pci_dev *dev, const char *name) 21{ 22 u8 progif = 0; 23 24 /* 25 * Place both IDE interfaces into PCI "native" mode: 26 */ 27 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 28 (progif & 5) != 5) { 29 if ((progif & 0xa) != 0xa) { 30 printk(KERN_INFO "%s %s: device not capable of full " 31 "native PCI mode\n", name, pci_name(dev)); 32 return -EOPNOTSUPP; 33 } 34 printk(KERN_INFO "%s %s: placing both ports into native PCI " 35 "mode\n", name, pci_name(dev)); 36 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5); 37 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 38 (progif & 5) != 5) { 39 printk(KERN_ERR "%s %s: rewrite of PROGIF failed, " 40 "wanted 0x%04x, got 0x%04x\n", 41 name, pci_name(dev), progif | 5, progif); 42 return -EOPNOTSUPP; 43 } 44 } 45 return 0; 46} 47 48#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 49static int ide_pci_clear_simplex(unsigned long dma_base, const char *name) 50{ 51 u8 dma_stat = inb(dma_base + 2); 52 53 outb(dma_stat & 0x60, dma_base + 2); 54 dma_stat = inb(dma_base + 2); 55 56 return (dma_stat & 0x80) ? 1 : 0; 57} 58 59/** 60 * ide_pci_dma_base - setup BMIBA 61 * @hwif: IDE interface 62 * @d: IDE port info 63 * 64 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space. 65 */ 66 67unsigned long ide_pci_dma_base(ide_hwif_t *hwif, const struct ide_port_info *d) 68{ 69 struct pci_dev *dev = to_pci_dev(hwif->dev); 70 unsigned long dma_base = 0; 71 72 if (hwif->host_flags & IDE_HFLAG_MMIO) 73 return hwif->dma_base; 74 75 if (hwif->mate && hwif->mate->dma_base) { 76 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); 77 } else { 78 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4; 79 80 dma_base = pci_resource_start(dev, baridx); 81 82 if (dma_base == 0) { 83 printk(KERN_ERR "%s %s: DMA base is invalid\n", 84 d->name, pci_name(dev)); 85 return 0; 86 } 87 } 88 89 if (hwif->channel) 90 dma_base += 8; 91 92 return dma_base; 93} 94EXPORT_SYMBOL_GPL(ide_pci_dma_base); 95 96int ide_pci_check_simplex(ide_hwif_t *hwif, const struct ide_port_info *d) 97{ 98 struct pci_dev *dev = to_pci_dev(hwif->dev); 99 u8 dma_stat; 100 101 if (d->host_flags & (IDE_HFLAG_MMIO | IDE_HFLAG_CS5520)) 102 goto out; 103 104 if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) { 105 if (ide_pci_clear_simplex(hwif->dma_base, d->name)) 106 printk(KERN_INFO "%s %s: simplex device: DMA forced\n", 107 d->name, pci_name(dev)); 108 goto out; 109 } 110 111 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif); 112 if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) { 113 printk(KERN_INFO "%s %s: simplex device: DMA disabled\n", 114 d->name, pci_name(dev)); 115 return -1; 116 } 117out: 118 return 0; 119} 120EXPORT_SYMBOL_GPL(ide_pci_check_simplex); 121 122/* 123 * Set up BM-DMA capability (PnP BIOS should have done this) 124 */ 125int ide_pci_set_master(struct pci_dev *dev, const char *name) 126{ 127 u16 pcicmd; 128 129 pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 130 131 if ((pcicmd & PCI_COMMAND_MASTER) == 0) { 132 pci_set_master(dev); 133 134 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || 135 (pcicmd & PCI_COMMAND_MASTER) == 0) { 136 printk(KERN_ERR "%s %s: error updating PCICMD\n", 137 name, pci_name(dev)); 138 return -EIO; 139 } 140 } 141 142 return 0; 143} 144EXPORT_SYMBOL_GPL(ide_pci_set_master); 145#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ 146 147void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d) 148{ 149 printk(KERN_INFO "%s %s: IDE controller (0x%04x:0x%04x rev 0x%02x)\n", 150 d->name, pci_name(dev), 151 dev->vendor, dev->device, dev->revision); 152} 153EXPORT_SYMBOL_GPL(ide_setup_pci_noise); 154 155 156/** 157 * ide_pci_enable - do PCI enables 158 * @dev: PCI device 159 * @d: IDE port info 160 * 161 * Enable the IDE PCI device. We attempt to enable the device in full 162 * but if that fails then we only need IO space. The PCI code should 163 * have setup the proper resources for us already for controllers in 164 * legacy mode. 165 * 166 * Returns zero on success or an error code 167 */ 168 169static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d) 170{ 171 int ret, bars; 172 173 if (pci_enable_device(dev)) { 174 ret = pci_enable_device_io(dev); 175 if (ret < 0) { 176 printk(KERN_WARNING "%s %s: couldn't enable device\n", 177 d->name, pci_name(dev)); 178 goto out; 179 } 180 printk(KERN_WARNING "%s %s: BIOS configuration fixed\n", 181 d->name, pci_name(dev)); 182 } 183 184 /* 185 * assume all devices can do 32-bit DMA for now, we can add 186 * a DMA mask field to the struct ide_port_info if we need it 187 * (or let lower level driver set the DMA mask) 188 */ 189 ret = pci_set_dma_mask(dev, DMA_BIT_MASK(32)); 190 if (ret < 0) { 191 printk(KERN_ERR "%s %s: can't set DMA mask\n", 192 d->name, pci_name(dev)); 193 goto out; 194 } 195 196 if (d->host_flags & IDE_HFLAG_SINGLE) 197 bars = (1 << 2) - 1; 198 else 199 bars = (1 << 4) - 1; 200 201 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) { 202 if (d->host_flags & IDE_HFLAG_CS5520) 203 bars |= (1 << 2); 204 else 205 bars |= (1 << 4); 206 } 207 208 ret = pci_request_selected_regions(dev, bars, d->name); 209 if (ret < 0) 210 printk(KERN_ERR "%s %s: can't reserve resources\n", 211 d->name, pci_name(dev)); 212out: 213 return ret; 214} 215 216/** 217 * ide_pci_configure - configure an unconfigured device 218 * @dev: PCI device 219 * @d: IDE port info 220 * 221 * Enable and configure the PCI device we have been passed. 222 * Returns zero on success or an error code. 223 */ 224 225static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d) 226{ 227 u16 pcicmd = 0; 228 /* 229 * PnP BIOS was *supposed* to have setup this device, but we 230 * can do it ourselves, so long as the BIOS has assigned an IRQ 231 * (or possibly the device is using a "legacy header" for IRQs). 232 * Maybe the user deliberately *disabled* the device, 233 * but we'll eventually ignore it again if no drives respond. 234 */ 235 if (ide_setup_pci_baseregs(dev, d->name) || 236 pci_write_config_word(dev, PCI_COMMAND, pcicmd | PCI_COMMAND_IO)) { 237 printk(KERN_INFO "%s %s: device disabled (BIOS)\n", 238 d->name, pci_name(dev)); 239 return -ENODEV; 240 } 241 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) { 242 printk(KERN_ERR "%s %s: error accessing PCI regs\n", 243 d->name, pci_name(dev)); 244 return -EIO; 245 } 246 if (!(pcicmd & PCI_COMMAND_IO)) { 247 printk(KERN_ERR "%s %s: unable to enable IDE controller\n", 248 d->name, pci_name(dev)); 249 return -ENXIO; 250 } 251 return 0; 252} 253 254/** 255 * ide_pci_check_iomem - check a register is I/O 256 * @dev: PCI device 257 * @d: IDE port info 258 * @bar: BAR number 259 * 260 * Checks if a BAR is configured and points to MMIO space. If so, 261 * return an error code. Otherwise return 0 262 */ 263 264static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, 265 int bar) 266{ 267 ulong flags = pci_resource_flags(dev, bar); 268 269 /* Unconfigured ? */ 270 if (!flags || pci_resource_len(dev, bar) == 0) 271 return 0; 272 273 /* I/O space */ 274 if (flags & IORESOURCE_IO) 275 return 0; 276 277 /* Bad */ 278 return -EINVAL; 279} 280 281/** 282 * ide_hw_configure - configure a struct ide_hw instance 283 * @dev: PCI device holding interface 284 * @d: IDE port info 285 * @port: port number 286 * @hw: struct ide_hw instance corresponding to this port 287 * 288 * Perform the initial set up for the hardware interface structure. This 289 * is done per interface port rather than per PCI device. There may be 290 * more than one port per device. 291 * 292 * Returns zero on success or an error code. 293 */ 294 295static int ide_hw_configure(struct pci_dev *dev, const struct ide_port_info *d, 296 unsigned int port, struct ide_hw *hw) 297{ 298 unsigned long ctl = 0, base = 0; 299 300 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { 301 if (ide_pci_check_iomem(dev, d, 2 * port) || 302 ide_pci_check_iomem(dev, d, 2 * port + 1)) { 303 printk(KERN_ERR "%s %s: I/O baseregs (BIOS) are " 304 "reported as MEM for port %d!\n", 305 d->name, pci_name(dev), port); 306 return -EINVAL; 307 } 308 309 ctl = pci_resource_start(dev, 2*port+1); 310 base = pci_resource_start(dev, 2*port); 311 } else { 312 /* Use default values */ 313 ctl = port ? 0x374 : 0x3f4; 314 base = port ? 0x170 : 0x1f0; 315 } 316 317 if (!base || !ctl) { 318 printk(KERN_ERR "%s %s: bad PCI BARs for port %d, skipping\n", 319 d->name, pci_name(dev), port); 320 return -EINVAL; 321 } 322 323 memset(hw, 0, sizeof(*hw)); 324 hw->dev = &dev->dev; 325 ide_std_init_ports(hw, base, ctl | 2); 326 327 return 0; 328} 329 330#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 331/** 332 * ide_hwif_setup_dma - configure DMA interface 333 * @hwif: IDE interface 334 * @d: IDE port info 335 * 336 * Set up the DMA base for the interface. Enable the master bits as 337 * necessary and attempt to bring the device DMA into a ready to use 338 * state 339 */ 340 341int ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d) 342{ 343 struct pci_dev *dev = to_pci_dev(hwif->dev); 344 345 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 || 346 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && 347 (dev->class & 0x80))) { 348 unsigned long base = ide_pci_dma_base(hwif, d); 349 350 if (base == 0) 351 return -1; 352 353 hwif->dma_base = base; 354 355 if (hwif->dma_ops == NULL) 356 hwif->dma_ops = &sff_dma_ops; 357 358 if (ide_pci_check_simplex(hwif, d) < 0) 359 return -1; 360 361 if (ide_pci_set_master(dev, d->name) < 0) 362 return -1; 363 364 if (hwif->host_flags & IDE_HFLAG_MMIO) 365 printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name); 366 else 367 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", 368 hwif->name, base, base + 7); 369 370 hwif->extra_base = base + (hwif->channel ? 8 : 16); 371 372 if (ide_allocate_dma_engine(hwif)) 373 return -1; 374 } 375 376 return 0; 377} 378#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ 379 380/** 381 * ide_setup_pci_controller - set up IDE PCI 382 * @dev: PCI device 383 * @d: IDE port info 384 * @noisy: verbose flag 385 * 386 * Set up the PCI and controller side of the IDE interface. This brings 387 * up the PCI side of the device, checks that the device is enabled 388 * and enables it if need be 389 */ 390 391static int ide_setup_pci_controller(struct pci_dev *dev, 392 const struct ide_port_info *d, int noisy) 393{ 394 int ret; 395 u16 pcicmd; 396 397 if (noisy) 398 ide_setup_pci_noise(dev, d); 399 400 ret = ide_pci_enable(dev, d); 401 if (ret < 0) 402 goto out; 403 404 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 405 if (ret < 0) { 406 printk(KERN_ERR "%s %s: error accessing PCI regs\n", 407 d->name, pci_name(dev)); 408 goto out; 409 } 410 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */ 411 ret = ide_pci_configure(dev, d); 412 if (ret < 0) 413 goto out; 414 printk(KERN_INFO "%s %s: device enabled (Linux)\n", 415 d->name, pci_name(dev)); 416 } 417 418out: 419 return ret; 420} 421 422/** 423 * ide_pci_setup_ports - configure ports/devices on PCI IDE 424 * @dev: PCI device 425 * @d: IDE port info 426 * @hw: struct ide_hw instances corresponding to this PCI IDE device 427 * @hws: struct ide_hw pointers table to update 428 * 429 * Scan the interfaces attached to this device and do any 430 * necessary per port setup. Attach the devices and ask the 431 * generic DMA layer to do its work for us. 432 * 433 * Normally called automaticall from do_ide_pci_setup_device, 434 * but is also used directly as a helper function by some controllers 435 * where the chipset setup is not the default PCI IDE one. 436 */ 437 438void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, 439 struct ide_hw *hw, struct ide_hw **hws) 440{ 441 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port; 442 u8 tmp; 443 444 /* 445 * Set up the IDE ports 446 */ 447 448 for (port = 0; port < channels; ++port) { 449 const struct ide_pci_enablebit *e = &d->enablebits[port]; 450 451 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || 452 (tmp & e->mask) != e->val)) { 453 printk(KERN_INFO "%s %s: IDE port disabled\n", 454 d->name, pci_name(dev)); 455 continue; /* port not enabled */ 456 } 457 458 if (ide_hw_configure(dev, d, port, hw + port)) 459 continue; 460 461 *(hws + port) = hw + port; 462 } 463} 464EXPORT_SYMBOL_GPL(ide_pci_setup_ports); 465 466/* 467 * ide_setup_pci_device() looks at the primary/secondary interfaces 468 * on a PCI IDE device and, if they are enabled, prepares the IDE driver 469 * for use with them. This generic code works for most PCI chipsets. 470 * 471 * One thing that is not standardized is the location of the 472 * primary/secondary interface "enable/disable" bits. For chipsets that 473 * we "know" about, this information is in the struct ide_port_info; 474 * for all other chipsets, we just assume both interfaces are enabled. 475 */ 476static int do_ide_setup_pci_device(struct pci_dev *dev, 477 const struct ide_port_info *d, 478 u8 noisy) 479{ 480 int pciirq, ret; 481 482 /* 483 * Can we trust the reported IRQ? 484 */ 485 pciirq = dev->irq; 486 487 /* 488 * This allows offboard ide-pci cards the enable a BIOS, 489 * verify interrupt settings of split-mirror pci-config 490 * space, place chipset into init-mode, and/or preserve 491 * an interrupt if the card is not native ide support. 492 */ 493 ret = d->init_chipset ? d->init_chipset(dev) : 0; 494 if (ret < 0) 495 goto out; 496 497 if (ide_pci_is_in_compatibility_mode(dev)) { 498 if (noisy) 499 printk(KERN_INFO "%s %s: not 100%% native mode: will " 500 "probe irqs later\n", d->name, pci_name(dev)); 501 pciirq = 0; 502 } else if (!pciirq && noisy) { 503 printk(KERN_WARNING "%s %s: bad irq (%d): will probe later\n", 504 d->name, pci_name(dev), pciirq); 505 } else if (noisy) { 506 printk(KERN_INFO "%s %s: 100%% native mode on irq %d\n", 507 d->name, pci_name(dev), pciirq); 508 } 509 510 ret = pciirq; 511out: 512 return ret; 513} 514 515int ide_pci_init_two(struct pci_dev *dev1, struct pci_dev *dev2, 516 const struct ide_port_info *d, void *priv) 517{ 518 struct pci_dev *pdev[] = { dev1, dev2 }; 519 struct ide_host *host; 520 int ret, i, n_ports = dev2 ? 4 : 2; 521 struct ide_hw hw[4], *hws[] = { NULL, NULL, NULL, NULL }; 522 523 for (i = 0; i < n_ports / 2; i++) { 524 ret = ide_setup_pci_controller(pdev[i], d, !i); 525 if (ret < 0) 526 goto out; 527 528 ide_pci_setup_ports(pdev[i], d, &hw[i*2], &hws[i*2]); 529 } 530 531 host = ide_host_alloc(d, hws, n_ports); 532 if (host == NULL) { 533 ret = -ENOMEM; 534 goto out; 535 } 536 537 host->dev[0] = &dev1->dev; 538 if (dev2) 539 host->dev[1] = &dev2->dev; 540 541 host->host_priv = priv; 542 host->irq_flags = IRQF_SHARED; 543 544 pci_set_drvdata(pdev[0], host); 545 if (dev2) 546 pci_set_drvdata(pdev[1], host); 547 548 for (i = 0; i < n_ports / 2; i++) { 549 ret = do_ide_setup_pci_device(pdev[i], d, !i); 550 551 if (ret < 0) 552 goto out; 553 554 /* fixup IRQ */ 555 if (ide_pci_is_in_compatibility_mode(pdev[i])) { 556 hw[i*2].irq = pci_get_legacy_ide_irq(pdev[i], 0); 557 hw[i*2 + 1].irq = pci_get_legacy_ide_irq(pdev[i], 1); 558 } else 559 hw[i*2 + 1].irq = hw[i*2].irq = ret; 560 } 561 562 ret = ide_host_register(host, d, hws); 563 if (ret) 564 ide_host_free(host); 565out: 566 return ret; 567} 568EXPORT_SYMBOL_GPL(ide_pci_init_two); 569 570int ide_pci_init_one(struct pci_dev *dev, const struct ide_port_info *d, 571 void *priv) 572{ 573 return ide_pci_init_two(dev, NULL, d, priv); 574} 575EXPORT_SYMBOL_GPL(ide_pci_init_one); 576 577void ide_pci_remove(struct pci_dev *dev) 578{ 579 struct ide_host *host = pci_get_drvdata(dev); 580 struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL; 581 int bars; 582 583 if (host->host_flags & IDE_HFLAG_SINGLE) 584 bars = (1 << 2) - 1; 585 else 586 bars = (1 << 4) - 1; 587 588 if ((host->host_flags & IDE_HFLAG_NO_DMA) == 0) { 589 if (host->host_flags & IDE_HFLAG_CS5520) 590 bars |= (1 << 2); 591 else 592 bars |= (1 << 4); 593 } 594 595 ide_host_remove(host); 596 597 if (dev2) 598 pci_release_selected_regions(dev2, bars); 599 pci_release_selected_regions(dev, bars); 600 601 if (dev2) 602 pci_disable_device(dev2); 603 pci_disable_device(dev); 604} 605EXPORT_SYMBOL_GPL(ide_pci_remove); 606 607#ifdef CONFIG_PM 608int ide_pci_suspend(struct pci_dev *dev, pm_message_t state) 609{ 610 pci_save_state(dev); 611 pci_disable_device(dev); 612 pci_set_power_state(dev, pci_choose_state(dev, state)); 613 614 return 0; 615} 616EXPORT_SYMBOL_GPL(ide_pci_suspend); 617 618int ide_pci_resume(struct pci_dev *dev) 619{ 620 struct ide_host *host = pci_get_drvdata(dev); 621 int rc; 622 623 pci_set_power_state(dev, PCI_D0); 624 625 rc = pci_enable_device(dev); 626 if (rc) 627 return rc; 628 629 pci_restore_state(dev); 630 pci_set_master(dev); 631 632 if (host->init_chipset) 633 host->init_chipset(dev); 634 635 return 0; 636} 637EXPORT_SYMBOL_GPL(ide_pci_resume); 638#endif 639