1/* 2** ----------------------------------------------------------------------------- 3** 4** Perle Specialix driver for Linux 5** Ported from existing RIO Driver for SCO sources. 6 * 7 * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22** 23** Module : pci.h 24** SID : 1.2 25** Last Modified : 11/6/98 11:34:12 26** Retrieved : 11/6/98 11:34:21 27** 28** ident @(#)pci.h 1.2 29** 30** ----------------------------------------------------------------------------- 31*/ 32 33#ifndef __rio_pci_h__ 34#define __rio_pci_h__ 35 36/* 37** PCI stuff 38*/ 39 40#define PCITpFastClock 0x80 41#define PCITpSlowClock 0x00 42#define PCITpFastLinks 0x40 43#define PCITpSlowLinks 0x00 44#define PCITpIntEnable 0x04 45#define PCITpIntDisable 0x00 46#define PCITpBusEnable 0x02 47#define PCITpBusDisable 0x00 48#define PCITpBootFromRam 0x01 49#define PCITpBootFromLink 0x00 50 51#define RIO_PCI_VENDOR 0x11CB 52#define RIO_PCI_DEVICE 0x8000 53#define RIO_PCI_BASE_CLASS 0x02 54#define RIO_PCI_SUB_CLASS 0x80 55#define RIO_PCI_PROG_IFACE 0x00 56 57#define RIO_PCI_RID 0x0008 58#define RIO_PCI_BADR0 0x0010 59#define RIO_PCI_INTLN 0x003C 60#define RIO_PCI_INTPIN 0x003D 61 62#define RIO_PCI_MEM_SIZE 65536 63 64#define RIO_PCI_TURBO_TP 0x80 65#define RIO_PCI_FAST_LINKS 0x40 66#define RIO_PCI_INT_ENABLE 0x04 67#define RIO_PCI_TP_BUS_ENABLE 0x02 68#define RIO_PCI_BOOT_FROM_RAM 0x01 69 70#define RIO_PCI_DEFAULT_MODE 0x05 71 72#endif /* __rio_pci_h__ */ 73