1 2 3#include <linux/kernel.h> 4#include <linux/module.h> 5#include <linux/pci.h> 6#include <linux/init.h> 7#include <linux/blkdev.h> 8#include <linux/delay.h> 9#include <scsi/scsi_host.h> 10#include <linux/libata.h> 11#include <linux/dmi.h> 12 13#define DRV_NAME "pata_ali" 14#define DRV_VERSION "0.7.8" 15 16static int ali_atapi_dma = 0; 17module_param_named(atapi_dma, ali_atapi_dma, int, 0644); 18MODULE_PARM_DESC(atapi_dma, "Enable ATAPI DMA (0=disable, 1=enable)"); 19 20static struct pci_dev *ali_isa_bridge; 21 22/* 23 * Cable special cases 24 */ 25 26static const struct dmi_system_id cable_dmi_table[] = { 27 { 28 .ident = "HP Pavilion N5430", 29 .matches = { 30 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 31 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), 32 }, 33 }, 34 { 35 .ident = "Toshiba Satelite S1800-814", 36 .matches = { 37 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 38 DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), 39 }, 40 }, 41 { } 42}; 43 44static int ali_cable_override(struct pci_dev *pdev) 45{ 46 /* Fujitsu P2000 */ 47 if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF) 48 return 1; 49 /* Mitac 8317 (Winbook-A) and relatives */ 50 if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317) 51 return 1; 52 /* Systems by DMI */ 53 if (dmi_check_system(cable_dmi_table)) 54 return 1; 55 return 0; 56} 57 58/** 59 * ali_c2_cable_detect - cable detection 60 * @ap: ATA port 61 * 62 * Perform cable detection for C2 and later revisions 63 */ 64 65static int ali_c2_cable_detect(struct ata_port *ap) 66{ 67 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 68 u8 ata66; 69 70 /* Certain laptops use short but suitable cables and don't 71 implement the detect logic */ 72 73 if (ali_cable_override(pdev)) 74 return ATA_CBL_PATA40_SHORT; 75 76 /* Host view cable detect 0x4A bit 0 primary bit 1 secondary 77 Bit set for 40 pin */ 78 pci_read_config_byte(pdev, 0x4A, &ata66); 79 if (ata66 & (1 << ap->port_no)) 80 return ATA_CBL_PATA40; 81 else 82 return ATA_CBL_PATA80; 83} 84 85/** 86 * ali_20_filter - filter for earlier ALI DMA 87 * @ap: ALi ATA port 88 * @adev: attached device 89 * 90 * Ensure that we do not do DMA on CD devices. We may be able to 91 * fix that later on. Also ensure we do not do UDMA on WDC drives 92 */ 93 94static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask) 95{ 96 char model_num[ATA_ID_PROD_LEN + 1]; 97 /* No DMA on anything but a disk for now */ 98 if (adev->class != ATA_DEV_ATA) 99 mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 100 ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 101 if (strstr(model_num, "WDC")) 102 return mask &= ~ATA_MASK_UDMA; 103 return mask; 104} 105 106/** 107 * ali_fifo_control - FIFO manager 108 * @ap: ALi channel to control 109 * @adev: device for FIFO control 110 * @on: 0 for off 1 for on 111 * 112 * Enable or disable the FIFO on a given device. Because of the way the 113 * ALi FIFO works it provides a boost on ATA disk but can be confused by 114 * ATAPI and we must therefore manage it. 115 */ 116 117static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on) 118{ 119 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 120 int pio_fifo = 0x54 + ap->port_no; 121 u8 fifo; 122 int shift = 4 * adev->devno; 123 124 /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to 125 0x00. Not all the docs agree but the behaviour we now use is the 126 one stated in the BIOS Programming Guide */ 127 128 pci_read_config_byte(pdev, pio_fifo, &fifo); 129 fifo &= ~(0x0F << shift); 130 fifo |= (on << shift); 131 pci_write_config_byte(pdev, pio_fifo, fifo); 132} 133 134/** 135 * ali_program_modes - load mode registers 136 * @ap: ALi channel to load 137 * @adev: Device the timing is for 138 * @t: timing data 139 * @ultra: UDMA timing or zero for off 140 * 141 * Loads the timing registers for cmd/data and disable UDMA if 142 * ultra is zero. If ultra is set then load and enable the UDMA 143 * timing but do not touch the command/data timing. 144 */ 145 146static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra) 147{ 148 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 149 int cas = 0x58 + 4 * ap->port_no; /* Command timing */ 150 int cbt = 0x59 + 4 * ap->port_no; /* Command timing */ 151 int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */ 152 int udmat = 0x56 + ap->port_no; /* UDMA timing */ 153 int shift = 4 * adev->devno; 154 u8 udma; 155 156 if (t != NULL) { 157 t->setup = clamp_val(t->setup, 1, 8) & 7; 158 t->act8b = clamp_val(t->act8b, 1, 8) & 7; 159 t->rec8b = clamp_val(t->rec8b, 1, 16) & 15; 160 t->active = clamp_val(t->active, 1, 8) & 7; 161 t->recover = clamp_val(t->recover, 1, 16) & 15; 162 163 pci_write_config_byte(pdev, cas, t->setup); 164 pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b); 165 pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover); 166 } 167 168 /* Set up the UDMA enable */ 169 pci_read_config_byte(pdev, udmat, &udma); 170 udma &= ~(0x0F << shift); 171 udma |= ultra << shift; 172 pci_write_config_byte(pdev, udmat, udma); 173} 174 175/** 176 * ali_set_piomode - set initial PIO mode data 177 * @ap: ATA interface 178 * @adev: ATA device 179 * 180 * Program the ALi registers for PIO mode. 181 */ 182 183static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev) 184{ 185 struct ata_device *pair = ata_dev_pair(adev); 186 struct ata_timing t; 187 unsigned long T = 1000000000 / 33333; /* PCI clock based */ 188 189 ata_timing_compute(adev, adev->pio_mode, &t, T, 1); 190 if (pair) { 191 struct ata_timing p; 192 ata_timing_compute(pair, pair->pio_mode, &p, T, 1); 193 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); 194 if (pair->dma_mode) { 195 ata_timing_compute(pair, pair->dma_mode, &p, T, 1); 196 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); 197 } 198 } 199 200 /* PIO FIFO is only permitted on ATA disk */ 201 if (adev->class != ATA_DEV_ATA) 202 ali_fifo_control(ap, adev, 0x00); 203 ali_program_modes(ap, adev, &t, 0); 204 if (adev->class == ATA_DEV_ATA) 205 ali_fifo_control(ap, adev, 0x05); 206 207} 208 209/** 210 * ali_set_dmamode - set initial DMA mode data 211 * @ap: ATA interface 212 * @adev: ATA device 213 * 214 * Program the ALi registers for DMA mode. 215 */ 216 217static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) 218{ 219 static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD }; 220 struct ata_device *pair = ata_dev_pair(adev); 221 struct ata_timing t; 222 unsigned long T = 1000000000 / 33333; /* PCI clock based */ 223 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 224 225 226 if (adev->class == ATA_DEV_ATA) 227 ali_fifo_control(ap, adev, 0x08); 228 229 if (adev->dma_mode >= XFER_UDMA_0) { 230 ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]); 231 if (adev->dma_mode >= XFER_UDMA_3) { 232 u8 reg4b; 233 pci_read_config_byte(pdev, 0x4B, ®4b); 234 reg4b |= 1; 235 pci_write_config_byte(pdev, 0x4B, reg4b); 236 } 237 } else { 238 ata_timing_compute(adev, adev->dma_mode, &t, T, 1); 239 if (pair) { 240 struct ata_timing p; 241 ata_timing_compute(pair, pair->pio_mode, &p, T, 1); 242 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); 243 if (pair->dma_mode) { 244 ata_timing_compute(pair, pair->dma_mode, &p, T, 1); 245 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); 246 } 247 } 248 ali_program_modes(ap, adev, &t, 0); 249 } 250} 251 252/** 253 * ali_warn_atapi_dma - Warn about ATAPI DMA disablement 254 * @adev: Device 255 * 256 * Whine about ATAPI DMA disablement if @adev is an ATAPI device. 257 * Can be used as ->dev_config. 258 */ 259 260static void ali_warn_atapi_dma(struct ata_device *adev) 261{ 262 struct ata_eh_context *ehc = &adev->link->eh_context; 263 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 264 265 if (print_info && adev->class == ATA_DEV_ATAPI && !ali_atapi_dma) { 266 ata_dev_printk(adev, KERN_WARNING, 267 "WARNING: ATAPI DMA disabled for reliability issues. It can be enabled\n"); 268 ata_dev_printk(adev, KERN_WARNING, 269 "WARNING: via pata_ali.atapi_dma modparam or corresponding sysfs node.\n"); 270 } 271} 272 273/** 274 * ali_lock_sectors - Keep older devices to 255 sector mode 275 * @adev: Device 276 * 277 * Called during the bus probe for each device that is found. We use 278 * this call to lock the sector count of the device to 255 or less on 279 * older ALi controllers. If we didn't do this then large I/O's would 280 * require LBA48 commands which the older ALi requires are issued by 281 * slower PIO methods 282 */ 283 284static void ali_lock_sectors(struct ata_device *adev) 285{ 286 adev->max_sectors = 255; 287 ali_warn_atapi_dma(adev); 288} 289 290/** 291 * ali_check_atapi_dma - DMA check for most ALi controllers 292 * @adev: Device 293 * 294 * Called to decide whether commands should be sent by DMA or PIO 295 */ 296 297static int ali_check_atapi_dma(struct ata_queued_cmd *qc) 298{ 299 if (!ali_atapi_dma) { 300 return -EOPNOTSUPP; 301 } 302 303 /* If its not a media command, its not worth it */ 304 if (atapi_cmd_type(qc->cdb[0]) == ATAPI_MISC) 305 return -EOPNOTSUPP; 306 return 0; 307} 308 309static void ali_c2_c3_postreset(struct ata_link *link, unsigned int *classes) 310{ 311 u8 r; 312 int port_bit = 4 << link->ap->port_no; 313 314 /* If our bridge is an ALI 1533 then do the extra work */ 315 if (ali_isa_bridge) { 316 /* Tristate and re-enable the bus signals */ 317 pci_read_config_byte(ali_isa_bridge, 0x58, &r); 318 r &= ~port_bit; 319 pci_write_config_byte(ali_isa_bridge, 0x58, r); 320 r |= port_bit; 321 pci_write_config_byte(ali_isa_bridge, 0x58, r); 322 } 323 ata_sff_postreset(link, classes); 324} 325 326static struct scsi_host_template ali_sht = { 327 ATA_BMDMA_SHT(DRV_NAME), 328}; 329 330/* 331 * Port operations for PIO only ALi 332 */ 333 334static struct ata_port_operations ali_early_port_ops = { 335 .inherits = &ata_sff_port_ops, 336 .cable_detect = ata_cable_40wire, 337 .set_piomode = ali_set_piomode, 338 .sff_data_xfer = ata_sff_data_xfer32, 339}; 340 341static const struct ata_port_operations ali_dma_base_ops = { 342 .inherits = &ata_bmdma32_port_ops, 343 .set_piomode = ali_set_piomode, 344 .set_dmamode = ali_set_dmamode, 345}; 346 347/* 348 * Port operations for DMA capable ALi without cable 349 * detect 350 */ 351static struct ata_port_operations ali_20_port_ops = { 352 .inherits = &ali_dma_base_ops, 353 .cable_detect = ata_cable_40wire, 354 .mode_filter = ali_20_filter, 355 .check_atapi_dma = ali_check_atapi_dma, 356 .dev_config = ali_lock_sectors, 357}; 358 359/* 360 * Port operations for DMA capable ALi with cable detect 361 */ 362static struct ata_port_operations ali_c2_port_ops = { 363 .inherits = &ali_dma_base_ops, 364 .check_atapi_dma = ali_check_atapi_dma, 365 .cable_detect = ali_c2_cable_detect, 366 .dev_config = ali_lock_sectors, 367 .postreset = ali_c2_c3_postreset, 368}; 369 370/* 371 * Port operations for DMA capable ALi with cable detect 372 */ 373static struct ata_port_operations ali_c4_port_ops = { 374 .inherits = &ali_dma_base_ops, 375 .check_atapi_dma = ali_check_atapi_dma, 376 .cable_detect = ali_c2_cable_detect, 377 .dev_config = ali_lock_sectors, 378}; 379 380/* 381 * Port operations for DMA capable ALi with cable detect and LBA48 382 */ 383static struct ata_port_operations ali_c5_port_ops = { 384 .inherits = &ali_dma_base_ops, 385 .check_atapi_dma = ali_check_atapi_dma, 386 .dev_config = ali_warn_atapi_dma, 387 .cable_detect = ali_c2_cable_detect, 388}; 389 390 391/** 392 * ali_init_chipset - chip setup function 393 * @pdev: PCI device of ATA controller 394 * 395 * Perform the setup on the device that must be done both at boot 396 * and at resume time. 397 */ 398 399static void ali_init_chipset(struct pci_dev *pdev) 400{ 401 u8 tmp; 402 struct pci_dev *north; 403 404 /* 405 * The chipset revision selects the driver operations and 406 * mode data. 407 */ 408 409 if (pdev->revision <= 0x20) { 410 pci_read_config_byte(pdev, 0x53, &tmp); 411 tmp |= 0x03; 412 pci_write_config_byte(pdev, 0x53, tmp); 413 } else { 414 pci_read_config_byte(pdev, 0x4a, &tmp); 415 pci_write_config_byte(pdev, 0x4a, tmp | 0x20); 416 pci_read_config_byte(pdev, 0x4B, &tmp); 417 if (pdev->revision < 0xC2) 418 /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */ 419 /* Clear CD-ROM DMA write bit */ 420 tmp &= 0x7F; 421 /* Cable and UDMA */ 422 if (pdev->revision >= 0xc2) 423 tmp |= 0x01; 424 pci_write_config_byte(pdev, 0x4B, tmp | 0x08); 425 /* 426 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want 427 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control 428 * via 0x54/55. 429 */ 430 pci_read_config_byte(pdev, 0x53, &tmp); 431 if (pdev->revision >= 0xc7) 432 tmp |= 0x03; 433 else 434 tmp |= 0x01; /* CD_ROM enable for DMA */ 435 pci_write_config_byte(pdev, 0x53, tmp); 436 } 437 north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0)); 438 if (north && north->vendor == PCI_VENDOR_ID_AL && ali_isa_bridge) { 439 /* Configure the ALi bridge logic. For non ALi rely on BIOS. 440 Set the south bridge enable bit */ 441 pci_read_config_byte(ali_isa_bridge, 0x79, &tmp); 442 if (pdev->revision == 0xC2) 443 pci_write_config_byte(ali_isa_bridge, 0x79, tmp | 0x04); 444 else if (pdev->revision > 0xC2 && pdev->revision < 0xC5) 445 pci_write_config_byte(ali_isa_bridge, 0x79, tmp | 0x02); 446 } 447 pci_dev_put(north); 448 ata_pci_bmdma_clear_simplex(pdev); 449} 450/** 451 * ali_init_one - discovery callback 452 * @pdev: PCI device ID 453 * @id: PCI table info 454 * 455 * An ALi IDE interface has been discovered. Figure out what revision 456 * and perform configuration work before handing it to the ATA layer 457 */ 458 459static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 460{ 461 static const struct ata_port_info info_early = { 462 .flags = ATA_FLAG_SLAVE_POSS, 463 .pio_mask = ATA_PIO4, 464 .port_ops = &ali_early_port_ops 465 }; 466 /* Revision 0x20 added DMA */ 467 static const struct ata_port_info info_20 = { 468 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 | 469 ATA_FLAG_IGN_SIMPLEX, 470 .pio_mask = ATA_PIO4, 471 .mwdma_mask = ATA_MWDMA2, 472 .port_ops = &ali_20_port_ops 473 }; 474 /* Revision 0x20 with support logic added UDMA */ 475 static const struct ata_port_info info_20_udma = { 476 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 | 477 ATA_FLAG_IGN_SIMPLEX, 478 .pio_mask = ATA_PIO4, 479 .mwdma_mask = ATA_MWDMA2, 480 .udma_mask = ATA_UDMA2, 481 .port_ops = &ali_20_port_ops 482 }; 483 /* Revision 0xC2 adds UDMA66 */ 484 static const struct ata_port_info info_c2 = { 485 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 | 486 ATA_FLAG_IGN_SIMPLEX, 487 .pio_mask = ATA_PIO4, 488 .mwdma_mask = ATA_MWDMA2, 489 .udma_mask = ATA_UDMA4, 490 .port_ops = &ali_c2_port_ops 491 }; 492 /* Revision 0xC3 is UDMA66 for now */ 493 static const struct ata_port_info info_c3 = { 494 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 | 495 ATA_FLAG_IGN_SIMPLEX, 496 .pio_mask = ATA_PIO4, 497 .mwdma_mask = ATA_MWDMA2, 498 .udma_mask = ATA_UDMA4, 499 .port_ops = &ali_c2_port_ops 500 }; 501 /* Revision 0xC4 is UDMA100 */ 502 static const struct ata_port_info info_c4 = { 503 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 | 504 ATA_FLAG_IGN_SIMPLEX, 505 .pio_mask = ATA_PIO4, 506 .mwdma_mask = ATA_MWDMA2, 507 .udma_mask = ATA_UDMA5, 508 .port_ops = &ali_c4_port_ops 509 }; 510 /* Revision 0xC5 is UDMA133 with LBA48 DMA */ 511 static const struct ata_port_info info_c5 = { 512 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_IGN_SIMPLEX, 513 .pio_mask = ATA_PIO4, 514 .mwdma_mask = ATA_MWDMA2, 515 .udma_mask = ATA_UDMA6, 516 .port_ops = &ali_c5_port_ops 517 }; 518 519 const struct ata_port_info *ppi[] = { NULL, NULL }; 520 u8 tmp; 521 int rc; 522 523 rc = pcim_enable_device(pdev); 524 if (rc) 525 return rc; 526 527 /* 528 * The chipset revision selects the driver operations and 529 * mode data. 530 */ 531 532 if (pdev->revision < 0x20) { 533 ppi[0] = &info_early; 534 } else if (pdev->revision < 0xC2) { 535 ppi[0] = &info_20; 536 } else if (pdev->revision == 0xC2) { 537 ppi[0] = &info_c2; 538 } else if (pdev->revision == 0xC3) { 539 ppi[0] = &info_c3; 540 } else if (pdev->revision == 0xC4) { 541 ppi[0] = &info_c4; 542 } else 543 ppi[0] = &info_c5; 544 545 ali_init_chipset(pdev); 546 547 if (ali_isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) { 548 /* Are we paired with a UDMA capable chip */ 549 pci_read_config_byte(ali_isa_bridge, 0x5E, &tmp); 550 if ((tmp & 0x1E) == 0x12) 551 ppi[0] = &info_20_udma; 552 } 553 554 if (!ppi[0]->mwdma_mask && !ppi[0]->udma_mask) 555 return ata_pci_sff_init_one(pdev, ppi, &ali_sht, NULL, 0); 556 else 557 return ata_pci_bmdma_init_one(pdev, ppi, &ali_sht, NULL, 0); 558} 559 560#ifdef CONFIG_PM 561static int ali_reinit_one(struct pci_dev *pdev) 562{ 563 struct ata_host *host = dev_get_drvdata(&pdev->dev); 564 int rc; 565 566 rc = ata_pci_device_do_resume(pdev); 567 if (rc) 568 return rc; 569 ali_init_chipset(pdev); 570 ata_host_resume(host); 571 return 0; 572} 573#endif 574 575static const struct pci_device_id ali[] = { 576 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), }, 577 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), }, 578 579 { }, 580}; 581 582static struct pci_driver ali_pci_driver = { 583 .name = DRV_NAME, 584 .id_table = ali, 585 .probe = ali_init_one, 586 .remove = ata_pci_remove_one, 587#ifdef CONFIG_PM 588 .suspend = ata_pci_device_suspend, 589 .resume = ali_reinit_one, 590#endif 591}; 592 593static int __init ali_init(void) 594{ 595 int ret; 596 ali_isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 597 598 ret = pci_register_driver(&ali_pci_driver); 599 if (ret < 0) 600 pci_dev_put(ali_isa_bridge); 601 return ret; 602} 603 604 605static void __exit ali_exit(void) 606{ 607 pci_unregister_driver(&ali_pci_driver); 608 pci_dev_put(ali_isa_bridge); 609} 610 611 612MODULE_AUTHOR("Alan Cox"); 613MODULE_DESCRIPTION("low-level driver for ALi PATA"); 614MODULE_LICENSE("GPL"); 615MODULE_DEVICE_TABLE(pci, ali); 616MODULE_VERSION(DRV_VERSION); 617 618module_init(ali_init); 619module_exit(ali_exit); 620