1/* 2 * Cyrix MediaGX and NatSemi Geode Suspend Modulation 3 * (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com> 4 * (C) 2002 Hiroshi Miura <miura@da-cha.org> 5 * All Rights Reserved 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * version 2 as published by the Free Software Foundation 10 * 11 * The author(s) of this software shall not be held liable for damages 12 * of any nature resulting due to the use of this software. This 13 * software is provided AS-IS with no warranties. 14 * 15 * Theoretical note: 16 * 17 * (see Geode(tm) CS5530 manual (rev.4.1) page.56) 18 * 19 * CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0 20 * are based on Suspend Modulation. 21 * 22 * Suspend Modulation works by asserting and de-asserting the SUSP# pin 23 * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP# 24 * the CPU enters an idle state. GX1 stops its core clock when SUSP# is 25 * asserted then power consumption is reduced. 26 * 27 * Suspend Modulation's OFF/ON duration are configurable 28 * with 'Suspend Modulation OFF Count Register' 29 * and 'Suspend Modulation ON Count Register'. 30 * These registers are 8bit counters that represent the number of 31 * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF) 32 * to the processor. 33 * 34 * These counters define a ratio which is the effective frequency 35 * of operation of the system. 36 * 37 * OFF Count 38 * F_eff = Fgx * ---------------------- 39 * OFF Count + ON Count 40 * 41 * 0 <= On Count, Off Count <= 255 42 * 43 * From these limits, we can get register values 44 * 45 * off_duration + on_duration <= MAX_DURATION 46 * on_duration = off_duration * (stock_freq - freq) / freq 47 * 48 * off_duration = (freq * DURATION) / stock_freq 49 * on_duration = DURATION - off_duration 50 * 51 * 52 *--------------------------------------------------------------------------- 53 * 54 * ChangeLog: 55 * Dec. 12, 2003 Hiroshi Miura <miura@da-cha.org> 56 * - fix on/off register mistake 57 * - fix cpu_khz calc when it stops cpu modulation. 58 * 59 * Dec. 11, 2002 Hiroshi Miura <miura@da-cha.org> 60 * - rewrite for Cyrix MediaGX Cx5510/5520 and 61 * NatSemi Geode Cs5530(A). 62 * 63 * Jul. ??, 2002 Zwane Mwaikambo <zwane@commfireservices.com> 64 * - cs5530_mod patch for 2.4.19-rc1. 65 * 66 *--------------------------------------------------------------------------- 67 * 68 * Todo 69 * Test on machines with 5510, 5530, 5530A 70 */ 71 72/************************************************************************ 73 * Suspend Modulation - Definitions * 74 ************************************************************************/ 75 76#include <linux/kernel.h> 77#include <linux/module.h> 78#include <linux/init.h> 79#include <linux/smp.h> 80#include <linux/cpufreq.h> 81#include <linux/pci.h> 82#include <linux/errno.h> 83#include <linux/slab.h> 84 85#include <asm/processor-cyrix.h> 86 87/* PCI config registers, all at F0 */ 88#define PCI_PMER1 0x80 /* power management enable register 1 */ 89#define PCI_PMER2 0x81 /* power management enable register 2 */ 90#define PCI_PMER3 0x82 /* power management enable register 3 */ 91#define PCI_IRQTC 0x8c /* irq speedup timer counter register:typical 2 to 4ms */ 92#define PCI_VIDTC 0x8d /* video speedup timer counter register: typical 50 to 100ms */ 93#define PCI_MODOFF 0x94 /* suspend modulation OFF counter register, 1 = 32us */ 94#define PCI_MODON 0x95 /* suspend modulation ON counter register */ 95#define PCI_SUSCFG 0x96 /* suspend configuration register */ 96 97/* PMER1 bits */ 98#define GPM (1<<0) /* global power management */ 99#define GIT (1<<1) /* globally enable PM device idle timers */ 100#define GTR (1<<2) /* globally enable IO traps */ 101#define IRQ_SPDUP (1<<3) /* disable clock throttle during interrupt handling */ 102#define VID_SPDUP (1<<4) /* disable clock throttle during vga video handling */ 103 104/* SUSCFG bits */ 105#define SUSMOD (1<<0) /* enable/disable suspend modulation */ 106/* the below is supported only with cs5530 (after rev.1.2)/cs5530A */ 107#define SMISPDUP (1<<1) /* select how SMI re-enable suspend modulation: */ 108 /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */ 109#define SUSCFG (1<<2) /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */ 110/* the below is supported only with cs5530A */ 111#define PWRSVE_ISA (1<<3) /* stop ISA clock */ 112#define PWRSVE (1<<4) /* active idle */ 113 114struct gxfreq_params { 115 u8 on_duration; 116 u8 off_duration; 117 u8 pci_suscfg; 118 u8 pci_pmer1; 119 u8 pci_pmer2; 120 struct pci_dev *cs55x0; 121}; 122 123static struct gxfreq_params *gx_params; 124static int stock_freq; 125 126/* PCI bus clock - defaults to 30.000 if cpu_khz is not available */ 127static int pci_busclk; 128module_param(pci_busclk, int, 0444); 129 130/* maximum duration for which the cpu may be suspended 131 * (32us * MAX_DURATION). If no parameter is given, this defaults 132 * to 255. 133 * Note that this leads to a maximum of 8 ms(!) where the CPU clock 134 * is suspended -- processing power is just 0.39% of what it used to be, 135 * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */ 136static int max_duration = 255; 137module_param(max_duration, int, 0444); 138 139/* For the default policy, we want at least some processing power 140 * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV) 141 */ 142#define POLICY_MIN_DIV 20 143 144 145#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \ 146 "gx-suspmod", msg) 147 148/** 149 * we can detect a core multipiler from dir0_lsb 150 * from GX1 datasheet p.56, 151 * MULT[3:0]: 152 * 0000 = SYSCLK multiplied by 4 (test only) 153 * 0001 = SYSCLK multiplied by 10 154 * 0010 = SYSCLK multiplied by 4 155 * 0011 = SYSCLK multiplied by 6 156 * 0100 = SYSCLK multiplied by 9 157 * 0101 = SYSCLK multiplied by 5 158 * 0110 = SYSCLK multiplied by 7 159 * 0111 = SYSCLK multiplied by 8 160 * of 33.3MHz 161 **/ 162static int gx_freq_mult[16] = { 163 4, 10, 4, 6, 9, 5, 7, 8, 164 0, 0, 0, 0, 0, 0, 0, 0 165}; 166 167 168/**************************************************************** 169 * Low Level chipset interface * 170 ****************************************************************/ 171static struct pci_device_id gx_chipset_tbl[] __initdata = { 172 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY), }, 173 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), }, 174 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), }, 175 { 0, }, 176}; 177 178static void gx_write_byte(int reg, int value) 179{ 180 pci_write_config_byte(gx_params->cs55x0, reg, value); 181} 182 183/** 184 * gx_detect_chipset: 185 * 186 **/ 187static __init struct pci_dev *gx_detect_chipset(void) 188{ 189 struct pci_dev *gx_pci = NULL; 190 191 /* check if CPU is a MediaGX or a Geode. */ 192 if ((boot_cpu_data.x86_vendor != X86_VENDOR_NSC) && 193 (boot_cpu_data.x86_vendor != X86_VENDOR_CYRIX)) { 194 dprintk("error: no MediaGX/Geode processor found!\n"); 195 return NULL; 196 } 197 198 /* detect which companion chip is used */ 199 for_each_pci_dev(gx_pci) { 200 if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL) 201 return gx_pci; 202 } 203 204 dprintk("error: no supported chipset found!\n"); 205 return NULL; 206} 207 208/** 209 * gx_get_cpuspeed: 210 * 211 * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi 212 * Geode CPU runs. 213 */ 214static unsigned int gx_get_cpuspeed(unsigned int cpu) 215{ 216 if ((gx_params->pci_suscfg & SUSMOD) == 0) 217 return stock_freq; 218 219 return (stock_freq * gx_params->off_duration) 220 / (gx_params->on_duration + gx_params->off_duration); 221} 222 223/** 224 * gx_validate_speed: 225 * determine current cpu speed 226 * 227 **/ 228 229static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, 230 u8 *off_duration) 231{ 232 unsigned int i; 233 u8 tmp_on, tmp_off; 234 int old_tmp_freq = stock_freq; 235 int tmp_freq; 236 237 *off_duration = 1; 238 *on_duration = 0; 239 240 for (i = max_duration; i > 0; i--) { 241 tmp_off = ((khz * i) / stock_freq) & 0xff; 242 tmp_on = i - tmp_off; 243 tmp_freq = (stock_freq * tmp_off) / i; 244 /* if this relation is closer to khz, use this. If it's equal, 245 * prefer it, too - lower latency */ 246 if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) { 247 *on_duration = tmp_on; 248 *off_duration = tmp_off; 249 old_tmp_freq = tmp_freq; 250 } 251 } 252 253 return old_tmp_freq; 254} 255 256 257/** 258 * gx_set_cpuspeed: 259 * set cpu speed in khz. 260 **/ 261 262static void gx_set_cpuspeed(unsigned int khz) 263{ 264 u8 suscfg, pmer1; 265 unsigned int new_khz; 266 unsigned long flags; 267 struct cpufreq_freqs freqs; 268 269 freqs.cpu = 0; 270 freqs.old = gx_get_cpuspeed(0); 271 272 new_khz = gx_validate_speed(khz, &gx_params->on_duration, 273 &gx_params->off_duration); 274 275 freqs.new = new_khz; 276 277 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 278 local_irq_save(flags); 279 280 281 282 if (new_khz != stock_freq) { 283 /* if new khz == 100% of CPU speed, it is special case */ 284 switch (gx_params->cs55x0->device) { 285 case PCI_DEVICE_ID_CYRIX_5530_LEGACY: 286 pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP; 287 /* typical 2 to 4ms */ 288 gx_write_byte(PCI_IRQTC, 4); 289 /* typical 50 to 100ms */ 290 gx_write_byte(PCI_VIDTC, 100); 291 gx_write_byte(PCI_PMER1, pmer1); 292 293 if (gx_params->cs55x0->revision < 0x10) { 294 /* CS5530(rev 1.2, 1.3) */ 295 suscfg = gx_params->pci_suscfg|SUSMOD; 296 } else { 297 /* CS5530A,B.. */ 298 suscfg = gx_params->pci_suscfg|SUSMOD|PWRSVE; 299 } 300 break; 301 case PCI_DEVICE_ID_CYRIX_5520: 302 case PCI_DEVICE_ID_CYRIX_5510: 303 suscfg = gx_params->pci_suscfg | SUSMOD; 304 break; 305 default: 306 local_irq_restore(flags); 307 dprintk("fatal: try to set unknown chipset.\n"); 308 return; 309 } 310 } else { 311 suscfg = gx_params->pci_suscfg & ~(SUSMOD); 312 gx_params->off_duration = 0; 313 gx_params->on_duration = 0; 314 dprintk("suspend modulation disabled: cpu runs 100%% speed.\n"); 315 } 316 317 gx_write_byte(PCI_MODOFF, gx_params->off_duration); 318 gx_write_byte(PCI_MODON, gx_params->on_duration); 319 320 gx_write_byte(PCI_SUSCFG, suscfg); 321 pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg); 322 323 local_irq_restore(flags); 324 325 gx_params->pci_suscfg = suscfg; 326 327 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 328 329 dprintk("suspend modulation w/ duration of ON:%d us, OFF:%d us\n", 330 gx_params->on_duration * 32, gx_params->off_duration * 32); 331 dprintk("suspend modulation w/ clock speed: %d kHz.\n", freqs.new); 332} 333 334/**************************************************************** 335 * High level functions * 336 ****************************************************************/ 337 338/* 339 * cpufreq_gx_verify: test if frequency range is valid 340 * 341 * This function checks if a given frequency range in kHz is valid 342 * for the hardware supported by the driver. 343 */ 344 345static int cpufreq_gx_verify(struct cpufreq_policy *policy) 346{ 347 unsigned int tmp_freq = 0; 348 u8 tmp1, tmp2; 349 350 if (!stock_freq || !policy) 351 return -EINVAL; 352 353 policy->cpu = 0; 354 cpufreq_verify_within_limits(policy, (stock_freq / max_duration), 355 stock_freq); 356 357 /* it needs to be assured that at least one supported frequency is 358 * within policy->min and policy->max. If it is not, policy->max 359 * needs to be increased until one freuqency is supported. 360 * policy->min may not be decreased, though. This way we guarantee a 361 * specific processing capacity. 362 */ 363 tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); 364 if (tmp_freq < policy->min) 365 tmp_freq += stock_freq / max_duration; 366 policy->min = tmp_freq; 367 if (policy->min > policy->max) 368 policy->max = tmp_freq; 369 tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2); 370 if (tmp_freq > policy->max) 371 tmp_freq -= stock_freq / max_duration; 372 policy->max = tmp_freq; 373 if (policy->max < policy->min) 374 policy->max = policy->min; 375 cpufreq_verify_within_limits(policy, (stock_freq / max_duration), 376 stock_freq); 377 378 return 0; 379} 380 381/* 382 * cpufreq_gx_target: 383 * 384 */ 385static int cpufreq_gx_target(struct cpufreq_policy *policy, 386 unsigned int target_freq, 387 unsigned int relation) 388{ 389 u8 tmp1, tmp2; 390 unsigned int tmp_freq; 391 392 if (!stock_freq || !policy) 393 return -EINVAL; 394 395 policy->cpu = 0; 396 397 tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2); 398 while (tmp_freq < policy->min) { 399 tmp_freq += stock_freq / max_duration; 400 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); 401 } 402 while (tmp_freq > policy->max) { 403 tmp_freq -= stock_freq / max_duration; 404 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); 405 } 406 407 gx_set_cpuspeed(tmp_freq); 408 409 return 0; 410} 411 412static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy) 413{ 414 unsigned int maxfreq, curfreq; 415 416 if (!policy || policy->cpu != 0) 417 return -ENODEV; 418 419 /* determine maximum frequency */ 420 if (pci_busclk) 421 maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f]; 422 else if (cpu_khz) 423 maxfreq = cpu_khz; 424 else 425 maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f]; 426 427 stock_freq = maxfreq; 428 curfreq = gx_get_cpuspeed(0); 429 430 dprintk("cpu max frequency is %d.\n", maxfreq); 431 dprintk("cpu current frequency is %dkHz.\n", curfreq); 432 433 /* setup basic struct for cpufreq API */ 434 policy->cpu = 0; 435 436 if (max_duration < POLICY_MIN_DIV) 437 policy->min = maxfreq / max_duration; 438 else 439 policy->min = maxfreq / POLICY_MIN_DIV; 440 policy->max = maxfreq; 441 policy->cur = curfreq; 442 policy->cpuinfo.min_freq = maxfreq / max_duration; 443 policy->cpuinfo.max_freq = maxfreq; 444 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 445 446 return 0; 447} 448 449/* 450 * cpufreq_gx_init: 451 * MediaGX/Geode GX initialize cpufreq driver 452 */ 453static struct cpufreq_driver gx_suspmod_driver = { 454 .get = gx_get_cpuspeed, 455 .verify = cpufreq_gx_verify, 456 .target = cpufreq_gx_target, 457 .init = cpufreq_gx_cpu_init, 458 .name = "gx-suspmod", 459 .owner = THIS_MODULE, 460}; 461 462static int __init cpufreq_gx_init(void) 463{ 464 int ret; 465 struct gxfreq_params *params; 466 struct pci_dev *gx_pci; 467 468 /* Test if we have the right hardware */ 469 gx_pci = gx_detect_chipset(); 470 if (gx_pci == NULL) 471 return -ENODEV; 472 473 /* check whether module parameters are sane */ 474 if (max_duration > 0xff) 475 max_duration = 0xff; 476 477 dprintk("geode suspend modulation available.\n"); 478 479 params = kzalloc(sizeof(struct gxfreq_params), GFP_KERNEL); 480 if (params == NULL) 481 return -ENOMEM; 482 483 params->cs55x0 = gx_pci; 484 gx_params = params; 485 486 /* keep cs55x0 configurations */ 487 pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg)); 488 pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1)); 489 pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2)); 490 pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration)); 491 pci_read_config_byte(params->cs55x0, PCI_MODOFF, 492 &(params->off_duration)); 493 494 ret = cpufreq_register_driver(&gx_suspmod_driver); 495 if (ret) { 496 kfree(params); 497 return ret; /* register error! */ 498 } 499 500 return 0; 501} 502 503static void __exit cpufreq_gx_exit(void) 504{ 505 cpufreq_unregister_driver(&gx_suspmod_driver); 506 pci_dev_put(gx_params->cs55x0); 507 kfree(gx_params); 508} 509 510MODULE_AUTHOR("Hiroshi Miura <miura@da-cha.org>"); 511MODULE_DESCRIPTION("Cpufreq driver for Cyrix MediaGX and NatSemi Geode"); 512MODULE_LICENSE("GPL"); 513 514module_init(cpufreq_gx_init); 515module_exit(cpufreq_gx_exit); 516