1/* 2 * SH-X3 SMP 3 * 4 * Copyright (C) 2007 - 2010 Paul Mundt 5 * Copyright (C) 2007 Magnus Damm 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file "COPYING" in the main directory of this archive 9 * for more details. 10 */ 11#include <linux/init.h> 12#include <linux/kernel.h> 13#include <linux/cpumask.h> 14#include <linux/smp.h> 15#include <linux/interrupt.h> 16#include <linux/io.h> 17#include <linux/sched.h> 18#include <linux/delay.h> 19#include <linux/cpu.h> 20#include <asm/sections.h> 21 22#define STBCR_REG(phys_id) (0xfe400004 | (phys_id << 12)) 23#define RESET_REG(phys_id) (0xfe400008 | (phys_id << 12)) 24 25#define STBCR_MSTP 0x00000001 26#define STBCR_RESET 0x00000002 27#define STBCR_SLEEP 0x00000004 28#define STBCR_LTSLP 0x80000000 29 30static irqreturn_t ipi_interrupt_handler(int irq, void *arg) 31{ 32 unsigned int message = (unsigned int)(long)arg; 33 unsigned int cpu = hard_smp_processor_id(); 34 unsigned int offs = 4 * cpu; 35 unsigned int x; 36 37 x = __raw_readl(0xfe410070 + offs); /* C0INITICI..CnINTICI */ 38 x &= (1 << (message << 2)); 39 __raw_writel(x, 0xfe410080 + offs); /* C0INTICICLR..CnINTICICLR */ 40 41 smp_message_recv(message); 42 43 return IRQ_HANDLED; 44} 45 46static void shx3_smp_setup(void) 47{ 48 unsigned int cpu = 0; 49 int i, num; 50 51 init_cpu_possible(cpumask_of(cpu)); 52 53 /* Enable light sleep for the boot CPU */ 54 __raw_writel(__raw_readl(STBCR_REG(cpu)) | STBCR_LTSLP, STBCR_REG(cpu)); 55 56 __cpu_number_map[0] = 0; 57 __cpu_logical_map[0] = 0; 58 59 /* 60 * Do this stupidly for now.. we don't have an easy way to probe 61 * for the total number of cores. 62 */ 63 for (i = 1, num = 0; i < NR_CPUS; i++) { 64 set_cpu_possible(i, true); 65 __cpu_number_map[i] = ++num; 66 __cpu_logical_map[num] = i; 67 } 68 69 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num); 70} 71 72static void shx3_prepare_cpus(unsigned int max_cpus) 73{ 74 int i; 75 76 local_timer_setup(0); 77 78 BUILD_BUG_ON(SMP_MSG_NR >= 8); 79 80 for (i = 0; i < SMP_MSG_NR; i++) 81 request_irq(104 + i, ipi_interrupt_handler, 82 IRQF_DISABLED | IRQF_PERCPU, "IPI", (void *)(long)i); 83 84 for (i = 0; i < max_cpus; i++) 85 set_cpu_present(i, true); 86} 87 88static void shx3_start_cpu(unsigned int cpu, unsigned long entry_point) 89{ 90 if (__in_29bit_mode()) 91 __raw_writel(entry_point, RESET_REG(cpu)); 92 else 93 __raw_writel(virt_to_phys(entry_point), RESET_REG(cpu)); 94 95 if (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP)) 96 __raw_writel(STBCR_MSTP, STBCR_REG(cpu)); 97 98 while (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP)) 99 cpu_relax(); 100 101 /* Start up secondary processor by sending a reset */ 102 __raw_writel(STBCR_RESET | STBCR_LTSLP, STBCR_REG(cpu)); 103} 104 105static unsigned int shx3_smp_processor_id(void) 106{ 107 return __raw_readl(0xff000048); /* CPIDR */ 108} 109 110static void shx3_send_ipi(unsigned int cpu, unsigned int message) 111{ 112 unsigned long addr = 0xfe410070 + (cpu * 4); 113 114 BUG_ON(cpu >= 4); 115 116 __raw_writel(1 << (message << 2), addr); /* C0INTICI..CnINTICI */ 117} 118 119static void shx3_update_boot_vector(unsigned int cpu) 120{ 121 __raw_writel(STBCR_MSTP, STBCR_REG(cpu)); 122 while (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP)) 123 cpu_relax(); 124 __raw_writel(STBCR_RESET, STBCR_REG(cpu)); 125} 126 127static int __cpuinit 128shx3_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) 129{ 130 unsigned int cpu = (unsigned int)hcpu; 131 132 switch (action) { 133 case CPU_UP_PREPARE: 134 shx3_update_boot_vector(cpu); 135 break; 136 case CPU_ONLINE: 137 pr_info("CPU %u is now online\n", cpu); 138 break; 139 case CPU_DEAD: 140 break; 141 } 142 143 return NOTIFY_OK; 144} 145 146static struct notifier_block __cpuinitdata shx3_cpu_notifier = { 147 .notifier_call = shx3_cpu_callback, 148}; 149 150static int __cpuinit register_shx3_cpu_notifier(void) 151{ 152 register_hotcpu_notifier(&shx3_cpu_notifier); 153 return 0; 154} 155late_initcall(register_shx3_cpu_notifier); 156 157struct plat_smp_ops shx3_smp_ops = { 158 .smp_setup = shx3_smp_setup, 159 .prepare_cpus = shx3_prepare_cpus, 160 .start_cpu = shx3_start_cpu, 161 .smp_processor_id = shx3_smp_processor_id, 162 .send_ipi = shx3_send_ipi, 163 .cpu_die = native_cpu_die, 164 .cpu_disable = native_cpu_disable, 165 .play_dead = native_play_dead, 166}; 167