1/* 2 * linux/arch/sh/boards/se/7780/irq.c 3 * 4 * Copyright (C) 2006,2007 Nobuhiro Iwamatsu 5 * 6 * Hitachi UL SolutionEngine 7780 Support. 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12#include <linux/init.h> 13#include <linux/irq.h> 14#include <linux/interrupt.h> 15#include <linux/io.h> 16#include <mach-se/mach/se7780.h> 17 18#define INTC_BASE 0xffd00000 19#define INTC_ICR1 (INTC_BASE+0x1c) 20 21/* 22 * Initialize IRQ setting 23 */ 24void __init init_se7780_IRQ(void) 25{ 26 /* enable all interrupt at FPGA */ 27 __raw_writew(0, FPGA_INTMSK1); 28 /* mask SM501 interrupt */ 29 __raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1); 30 /* enable all interrupt at FPGA */ 31 __raw_writew(0, FPGA_INTMSK2); 32 33 /* set FPGA INTSEL register */ 34 /* FPGA + 0x06 */ 35 __raw_writew( ((IRQPIN_SM501 << IRQPOS_SM501) | 36 (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1); 37 38 /* FPGA + 0x08 */ 39 __raw_writew(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) | 40 (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) | 41 (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) | 42 (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2); 43 44 /* FPGA + 0x0A */ 45 __raw_writew((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); 46 47 plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */ 48 49 /* ICR1: detect low level(for 2ndcut) */ 50 __raw_writel(0xAAAA0000, INTC_ICR1); 51 52 /* 53 * FPGA PCISEL register initialize 54 * 55 * CPU || SLOT1 | SLOT2 | S-ATA | USB 56 * ------------------------------------- 57 * INTA || INTA | INTD | -- | INTB 58 * ------------------------------------- 59 * INTB || INTB | INTA | -- | INTC 60 * ------------------------------------- 61 * INTC || INTC | INTB | INTA | -- 62 * ------------------------------------- 63 * INTD || INTD | INTC | -- | INTA 64 * ------------------------------------- 65 */ 66 __raw_writew(0x0013, FPGA_PCI_INTSEL1); 67 __raw_writew(0xE402, FPGA_PCI_INTSEL2); 68} 69