1/* 2 * linux/arch/sh/boards/se/7722/setup.c 3 * 4 * Copyright (C) 2007 Nobuhiro Iwamatsu 5 * 6 * Hitachi UL SolutionEngine 7722 Support. 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 * 12 */ 13#include <linux/init.h> 14#include <linux/platform_device.h> 15#include <linux/ata_platform.h> 16#include <linux/input.h> 17#include <linux/input/sh_keysc.h> 18#include <linux/smc91x.h> 19#include <mach-se/mach/se7722.h> 20#include <mach-se/mach/mrshpc.h> 21#include <asm/machvec.h> 22#include <asm/clock.h> 23#include <asm/io.h> 24#include <asm/heartbeat.h> 25#include <cpu/sh7722.h> 26 27/* Heartbeat */ 28static struct resource heartbeat_resource = { 29 .start = PA_LED, 30 .end = PA_LED, 31 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT, 32}; 33 34static struct platform_device heartbeat_device = { 35 .name = "heartbeat", 36 .id = -1, 37 .num_resources = 1, 38 .resource = &heartbeat_resource, 39}; 40 41/* SMC91x */ 42static struct smc91x_platdata smc91x_info = { 43 .flags = SMC91X_USE_16BIT, 44}; 45 46static struct resource smc91x_eth_resources[] = { 47 [0] = { 48 .name = "smc91x-regs" , 49 .start = PA_LAN + 0x300, 50 .end = PA_LAN + 0x300 + 0x10 , 51 .flags = IORESOURCE_MEM, 52 }, 53 [1] = { 54 /* Filled in later */ 55 .flags = IORESOURCE_IRQ, 56 }, 57}; 58 59static struct platform_device smc91x_eth_device = { 60 .name = "smc91x", 61 .id = 0, 62 .dev = { 63 .dma_mask = NULL, /* don't use dma */ 64 .coherent_dma_mask = 0xffffffff, 65 .platform_data = &smc91x_info, 66 }, 67 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 68 .resource = smc91x_eth_resources, 69}; 70 71static struct resource cf_ide_resources[] = { 72 [0] = { 73 .start = PA_MRSHPC_IO + 0x1f0, 74 .end = PA_MRSHPC_IO + 0x1f0 + 8 , 75 .flags = IORESOURCE_IO, 76 }, 77 [1] = { 78 .start = PA_MRSHPC_IO + 0x1f0 + 0x206, 79 .end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8, 80 .flags = IORESOURCE_IO, 81 }, 82 [2] = { 83 /* Filled in later */ 84 .flags = IORESOURCE_IRQ, 85 }, 86}; 87 88static struct platform_device cf_ide_device = { 89 .name = "pata_platform", 90 .id = -1, 91 .num_resources = ARRAY_SIZE(cf_ide_resources), 92 .resource = cf_ide_resources, 93}; 94 95static struct sh_keysc_info sh_keysc_info = { 96 .mode = SH_KEYSC_MODE_1, /* KEYOUT0->5, KEYIN0->4 */ 97 .scan_timing = 3, 98 .delay = 5, 99 .keycodes = { /* SW1 -> SW30 */ 100 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, 101 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J, 102 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O, 103 KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, 104 KEY_U, KEY_V, KEY_W, KEY_X, KEY_Y, 105 KEY_Z, 106 KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, /* life */ 107 }, 108}; 109 110static struct resource sh_keysc_resources[] = { 111 [0] = { 112 .start = 0x044b0000, 113 .end = 0x044b000f, 114 .flags = IORESOURCE_MEM, 115 }, 116 [1] = { 117 .start = 79, 118 .flags = IORESOURCE_IRQ, 119 }, 120}; 121 122static struct platform_device sh_keysc_device = { 123 .name = "sh_keysc", 124 .id = 0, /* "keysc0" clock */ 125 .num_resources = ARRAY_SIZE(sh_keysc_resources), 126 .resource = sh_keysc_resources, 127 .dev = { 128 .platform_data = &sh_keysc_info, 129 }, 130 .archdata = { 131 .hwblk_id = HWBLK_KEYSC, 132 }, 133}; 134 135static struct platform_device *se7722_devices[] __initdata = { 136 &heartbeat_device, 137 &smc91x_eth_device, 138 &cf_ide_device, 139 &sh_keysc_device, 140}; 141 142static int __init se7722_devices_setup(void) 143{ 144 mrshpc_setup_windows(); 145 146 /* Wire-up dynamic vectors */ 147 cf_ide_resources[2].start = cf_ide_resources[2].end = 148 se7722_fpga_irq[SE7722_FPGA_IRQ_MRSHPC0]; 149 150 smc91x_eth_resources[1].start = smc91x_eth_resources[1].end = 151 se7722_fpga_irq[SE7722_FPGA_IRQ_SMC]; 152 153 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices)); 154} 155device_initcall(se7722_devices_setup); 156 157static void __init se7722_setup(char **cmdline_p) 158{ 159 __raw_writew(0x010D, FPGA_OUT); /* FPGA */ 160 161 __raw_writew(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ 162 __raw_writew(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ 163 164 /* LCDC I/O */ 165 __raw_writew(0x0020, PORT_PSELD); 166 167 /* SIOF1*/ 168 __raw_writew(0x0003, PORT_PSELB); 169 __raw_writew(0xe000, PORT_PSELC); 170 __raw_writew(0x0000, PORT_PKCR); 171 172 /* LCDC */ 173 __raw_writew(0x4020, PORT_PHCR); 174 __raw_writew(0x0000, PORT_PLCR); 175 __raw_writew(0x0000, PORT_PMCR); 176 __raw_writew(0x0002, PORT_PRCR); 177 __raw_writew(0x0000, PORT_PXCR); /* LCDC,CS6A */ 178 179 /* KEYSC */ 180 __raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */ 181 __raw_writew(0x0000, PORT_PYCR); 182 __raw_writew(0x0000, PORT_PZCR); 183 __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); 184 __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); 185} 186 187/* 188 * The Machine Vector 189 */ 190static struct sh_machine_vector mv_se7722 __initmv = { 191 .mv_name = "Solution Engine 7722" , 192 .mv_setup = se7722_setup , 193 .mv_init_irq = init_se7722_IRQ, 194}; 195