1/* 2 * Board setup routines for the GEFanuc C2K board 3 * 4 * Author: Remi Machet <rmachet@slac.stanford.edu> 5 * 6 * Originated from prpmc2800.c 7 * 8 * 2008 (c) Stanford University 9 * 2007 (c) MontaVista, Software, Inc. 10 * 11 * This program is free software; you can redistribute it and/or modify it 12 * under the terms of the GNU General Public License version 2 as published 13 * by the Free Software Foundation. 14 */ 15 16#include <linux/stddef.h> 17#include <linux/kernel.h> 18#include <linux/delay.h> 19#include <linux/interrupt.h> 20#include <linux/seq_file.h> 21#include <linux/time.h> 22#include <linux/of.h> 23 24#include <asm/machdep.h> 25#include <asm/prom.h> 26#include <asm/system.h> 27#include <asm/time.h> 28 29#include <mm/mmu_decl.h> 30 31#include <sysdev/mv64x60.h> 32 33#define MV64x60_MPP_CNTL_0 0x0000 34#define MV64x60_MPP_CNTL_2 0x0008 35 36#define MV64x60_GPP_IO_CNTL 0x0000 37#define MV64x60_GPP_LEVEL_CNTL 0x0010 38#define MV64x60_GPP_VALUE_SET 0x0018 39 40static void __iomem *mv64x60_mpp_reg_base; 41static void __iomem *mv64x60_gpp_reg_base; 42 43static void __init c2k_setup_arch(void) 44{ 45 struct device_node *np; 46 phys_addr_t paddr; 47 const unsigned int *reg; 48 49 /* 50 * ioremap mpp and gpp registers in case they are later 51 * needed by c2k_reset_board(). 52 */ 53 np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-mpp"); 54 reg = of_get_property(np, "reg", NULL); 55 paddr = of_translate_address(np, reg); 56 of_node_put(np); 57 mv64x60_mpp_reg_base = ioremap(paddr, reg[1]); 58 59 np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-gpp"); 60 reg = of_get_property(np, "reg", NULL); 61 paddr = of_translate_address(np, reg); 62 of_node_put(np); 63 mv64x60_gpp_reg_base = ioremap(paddr, reg[1]); 64 65#ifdef CONFIG_PCI 66 mv64x60_pci_init(); 67#endif 68} 69 70static void c2k_reset_board(void) 71{ 72 u32 temp; 73 74 local_irq_disable(); 75 76 temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0); 77 temp &= 0xFFFF0FFF; 78 out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0, temp); 79 80 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL); 81 temp |= 0x00000004; 82 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp); 83 84 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL); 85 temp |= 0x00000004; 86 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp); 87 88 temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2); 89 temp &= 0xFFFF0FFF; 90 out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2, temp); 91 92 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL); 93 temp |= 0x00080000; 94 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp); 95 96 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL); 97 temp |= 0x00080000; 98 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp); 99 100 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_VALUE_SET, 0x00080004); 101} 102 103static void c2k_restart(char *cmd) 104{ 105 c2k_reset_board(); 106 msleep(100); 107 panic("restart failed\n"); 108} 109 110#ifdef CONFIG_NOT_COHERENT_CACHE 111#define COHERENCY_SETTING "off" 112#else 113#define COHERENCY_SETTING "on" 114#endif 115 116void c2k_show_cpuinfo(struct seq_file *m) 117{ 118 seq_printf(m, "Vendor\t\t: GEFanuc\n"); 119 seq_printf(m, "coherency\t: %s\n", COHERENCY_SETTING); 120} 121 122/* 123 * Called very early, device-tree isn't unflattened 124 */ 125static int __init c2k_probe(void) 126{ 127 unsigned long root = of_get_flat_dt_root(); 128 129 if (!of_flat_dt_is_compatible(root, "GEFanuc,C2K")) 130 return 0; 131 132 printk(KERN_INFO "Detected a GEFanuc C2K board\n"); 133 134 _set_L2CR(0); 135 _set_L2CR(L2CR_L2E | L2CR_L2PE | L2CR_L2I); 136 return 1; 137} 138 139define_machine(c2k) { 140 .name = "C2K", 141 .probe = c2k_probe, 142 .setup_arch = c2k_setup_arch, 143 .init_early = mv64x60_init_early, 144 .show_cpuinfo = c2k_show_cpuinfo, 145 .init_IRQ = mv64x60_init_irq, 146 .get_irq = mv64x60_get_irq, 147 .restart = c2k_restart, 148 .calibrate_decr = generic_calibrate_decr, 149}; 150