1/* 2 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation 3 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM 4 * 5 * RTAS specific routines for PCI. 6 * 7 * Based on code from pci.c, chrp_pci.c and pSeries_pci.c 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 */ 23 24#include <linux/kernel.h> 25#include <linux/threads.h> 26#include <linux/pci.h> 27#include <linux/string.h> 28#include <linux/init.h> 29#include <linux/bootmem.h> 30 31#include <asm/io.h> 32#include <asm/pgtable.h> 33#include <asm/irq.h> 34#include <asm/prom.h> 35#include <asm/machdep.h> 36#include <asm/pci-bridge.h> 37#include <asm/iommu.h> 38#include <asm/rtas.h> 39#include <asm/mpic.h> 40#include <asm/ppc-pci.h> 41#include <asm/eeh.h> 42 43/* RTAS tokens */ 44static int read_pci_config; 45static int write_pci_config; 46static int ibm_read_pci_config; 47static int ibm_write_pci_config; 48 49static inline int config_access_valid(struct pci_dn *dn, int where) 50{ 51 if (where < 256) 52 return 1; 53 if (where < 4096 && dn->pci_ext_config_space) 54 return 1; 55 56 return 0; 57} 58 59int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val) 60{ 61 int returnval = -1; 62 unsigned long buid, addr; 63 int ret; 64 65 if (!pdn) 66 return PCIBIOS_DEVICE_NOT_FOUND; 67 if (!config_access_valid(pdn, where)) 68 return PCIBIOS_BAD_REGISTER_NUMBER; 69 70 addr = rtas_config_addr(pdn->busno, pdn->devfn, where); 71 buid = pdn->phb->buid; 72 if (buid) { 73 ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval, 74 addr, BUID_HI(buid), BUID_LO(buid), size); 75 } else { 76 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); 77 } 78 *val = returnval; 79 80 if (ret) 81 return PCIBIOS_DEVICE_NOT_FOUND; 82 83 if (returnval == EEH_IO_ERROR_VALUE(size) && 84 eeh_dn_check_failure (pdn->node, NULL)) 85 return PCIBIOS_DEVICE_NOT_FOUND; 86 87 return PCIBIOS_SUCCESSFUL; 88} 89 90static int rtas_pci_read_config(struct pci_bus *bus, 91 unsigned int devfn, 92 int where, int size, u32 *val) 93{ 94 struct device_node *busdn, *dn; 95 96 busdn = pci_bus_to_OF_node(bus); 97 98 /* Search only direct children of the bus */ 99 for (dn = busdn->child; dn; dn = dn->sibling) { 100 struct pci_dn *pdn = PCI_DN(dn); 101 if (pdn && pdn->devfn == devfn 102 && of_device_is_available(dn)) 103 return rtas_read_config(pdn, where, size, val); 104 } 105 106 return PCIBIOS_DEVICE_NOT_FOUND; 107} 108 109int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val) 110{ 111 unsigned long buid, addr; 112 int ret; 113 114 if (!pdn) 115 return PCIBIOS_DEVICE_NOT_FOUND; 116 if (!config_access_valid(pdn, where)) 117 return PCIBIOS_BAD_REGISTER_NUMBER; 118 119 addr = rtas_config_addr(pdn->busno, pdn->devfn, where); 120 buid = pdn->phb->buid; 121 if (buid) { 122 ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, 123 BUID_HI(buid), BUID_LO(buid), size, (ulong) val); 124 } else { 125 ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val); 126 } 127 128 if (ret) 129 return PCIBIOS_DEVICE_NOT_FOUND; 130 131 return PCIBIOS_SUCCESSFUL; 132} 133 134static int rtas_pci_write_config(struct pci_bus *bus, 135 unsigned int devfn, 136 int where, int size, u32 val) 137{ 138 struct device_node *busdn, *dn; 139 140 busdn = pci_bus_to_OF_node(bus); 141 142 /* Search only direct children of the bus */ 143 for (dn = busdn->child; dn; dn = dn->sibling) { 144 struct pci_dn *pdn = PCI_DN(dn); 145 if (pdn && pdn->devfn == devfn 146 && of_device_is_available(dn)) 147 return rtas_write_config(pdn, where, size, val); 148 } 149 return PCIBIOS_DEVICE_NOT_FOUND; 150} 151 152static struct pci_ops rtas_pci_ops = { 153 .read = rtas_pci_read_config, 154 .write = rtas_pci_write_config, 155}; 156 157static int is_python(struct device_node *dev) 158{ 159 const char *model = of_get_property(dev, "model", NULL); 160 161 if (model && strstr(model, "Python")) 162 return 1; 163 164 return 0; 165} 166 167static void python_countermeasures(struct device_node *dev) 168{ 169 struct resource registers; 170 void __iomem *chip_regs; 171 volatile u32 val; 172 173 if (of_address_to_resource(dev, 0, ®isters)) { 174 printk(KERN_ERR "Can't get address for Python workarounds !\n"); 175 return; 176 } 177 178 /* Python's register file is 1 MB in size. */ 179 chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000); 180 181 /* 182 * Firmware doesn't always clear this bit which is critical 183 * for good performance - Anton 184 */ 185 186#define PRG_CL_RESET_VALID 0x00010000 187 188 val = in_be32(chip_regs + 0xf6030); 189 if (val & PRG_CL_RESET_VALID) { 190 printk(KERN_INFO "Python workaround: "); 191 val &= ~PRG_CL_RESET_VALID; 192 out_be32(chip_regs + 0xf6030, val); 193 /* 194 * We must read it back for changes to 195 * take effect 196 */ 197 val = in_be32(chip_regs + 0xf6030); 198 printk("reg0: %x\n", val); 199 } 200 201 iounmap(chip_regs); 202} 203 204void __init init_pci_config_tokens (void) 205{ 206 read_pci_config = rtas_token("read-pci-config"); 207 write_pci_config = rtas_token("write-pci-config"); 208 ibm_read_pci_config = rtas_token("ibm,read-pci-config"); 209 ibm_write_pci_config = rtas_token("ibm,write-pci-config"); 210} 211 212unsigned long __devinit get_phb_buid (struct device_node *phb) 213{ 214 struct resource r; 215 216 if (ibm_read_pci_config == -1) 217 return 0; 218 if (of_address_to_resource(phb, 0, &r)) 219 return 0; 220 return r.start; 221} 222 223static int phb_set_bus_ranges(struct device_node *dev, 224 struct pci_controller *phb) 225{ 226 const int *bus_range; 227 unsigned int len; 228 229 bus_range = of_get_property(dev, "bus-range", &len); 230 if (bus_range == NULL || len < 2 * sizeof(int)) { 231 return 1; 232 } 233 234 phb->first_busno = bus_range[0]; 235 phb->last_busno = bus_range[1]; 236 237 return 0; 238} 239 240int __devinit rtas_setup_phb(struct pci_controller *phb) 241{ 242 struct device_node *dev = phb->dn; 243 244 if (is_python(dev)) 245 python_countermeasures(dev); 246 247 if (phb_set_bus_ranges(dev, phb)) 248 return 1; 249 250 phb->ops = &rtas_pci_ops; 251 phb->buid = get_phb_buid(dev); 252 253 return 0; 254} 255 256void __init find_and_init_phbs(void) 257{ 258 struct device_node *node; 259 struct pci_controller *phb; 260 struct device_node *root = of_find_node_by_path("/"); 261 262 for_each_child_of_node(root, node) { 263 if (node->type == NULL || (strcmp(node->type, "pci") != 0 && 264 strcmp(node->type, "pciex") != 0)) 265 continue; 266 267 phb = pcibios_alloc_controller(node); 268 if (!phb) 269 continue; 270 rtas_setup_phb(phb); 271 pci_process_bridge_OF_ranges(phb, node, 0); 272 isa_bridge_find_early(phb); 273 } 274 275 of_node_put(root); 276 pci_devs_phb_init(); 277 278 /* 279 * pci_probe_only and pci_assign_all_buses can be set via properties 280 * in chosen. 281 */ 282 if (of_chosen) { 283 const int *prop; 284 285 prop = of_get_property(of_chosen, 286 "linux,pci-probe-only", NULL); 287 if (prop) 288 pci_probe_only = *prop; 289 290#ifdef CONFIG_PPC32 /* Will be made generic soon */ 291 prop = of_get_property(of_chosen, 292 "linux,pci-assign-all-buses", NULL); 293 if (prop && *prop) 294 ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; 295#endif /* CONFIG_PPC32 */ 296 } 297} 298