1/* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13#include <linux/string.h> 14#include <linux/sched.h> 15#include <linux/threads.h> 16#include <linux/init.h> 17#include <linux/module.h> 18 19#include <asm/oprofile_impl.h> 20#include <asm/cputable.h> 21#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22#include <asm/mmu.h> 23 24struct cpu_spec* cur_cpu_spec = NULL; 25EXPORT_SYMBOL(cur_cpu_spec); 26 27/* The platform string corresponding to the real PVR */ 28const char *powerpc_base_platform; 29 30/* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37#ifdef CONFIG_PPC32 38extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 39extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 40extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 41extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 42extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 43extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 44extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 45extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 46extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 47extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 48extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 49extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 50extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 51extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 52extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 53extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 54extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 55extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 56extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 57extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 58extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 59#endif /* CONFIG_PPC32 */ 60#ifdef CONFIG_PPC64 61extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 62extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 63extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 64extern void __restore_cpu_pa6t(void); 65extern void __restore_cpu_ppc970(void); 66extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 67extern void __restore_cpu_power7(void); 68#endif /* CONFIG_PPC64 */ 69 70/* This table only contains "desktop" CPUs, it need to be filled with embedded 71 * ones as well... 72 */ 73#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 74 PPC_FEATURE_HAS_MMU) 75#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 76#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 77#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 78 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 79#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 80 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 81#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 82 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 83 PPC_FEATURE_TRUE_LE | \ 84 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 85#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 86 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 87 PPC_FEATURE_TRUE_LE | \ 88 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 89#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 90 PPC_FEATURE_TRUE_LE | \ 91 PPC_FEATURE_HAS_ALTIVEC_COMP) 92#ifdef CONFIG_PPC_BOOK3E_64 93#define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 94#else 95#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 96 PPC_FEATURE_BOOKE) 97#endif 98 99static struct cpu_spec __initdata cpu_specs[] = { 100#ifdef CONFIG_PPC_BOOK3S_64 101 { /* Power3 */ 102 .pvr_mask = 0xffff0000, 103 .pvr_value = 0x00400000, 104 .cpu_name = "POWER3 (630)", 105 .cpu_features = CPU_FTRS_POWER3, 106 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 107 .mmu_features = MMU_FTR_HPTE_TABLE, 108 .icache_bsize = 128, 109 .dcache_bsize = 128, 110 .num_pmcs = 8, 111 .pmc_type = PPC_PMC_IBM, 112 .oprofile_cpu_type = "ppc64/power3", 113 .oprofile_type = PPC_OPROFILE_RS64, 114 .machine_check = machine_check_generic, 115 .platform = "power3", 116 }, 117 { /* Power3+ */ 118 .pvr_mask = 0xffff0000, 119 .pvr_value = 0x00410000, 120 .cpu_name = "POWER3 (630+)", 121 .cpu_features = CPU_FTRS_POWER3, 122 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 123 .mmu_features = MMU_FTR_HPTE_TABLE, 124 .icache_bsize = 128, 125 .dcache_bsize = 128, 126 .num_pmcs = 8, 127 .pmc_type = PPC_PMC_IBM, 128 .oprofile_cpu_type = "ppc64/power3", 129 .oprofile_type = PPC_OPROFILE_RS64, 130 .machine_check = machine_check_generic, 131 .platform = "power3", 132 }, 133 { /* Northstar */ 134 .pvr_mask = 0xffff0000, 135 .pvr_value = 0x00330000, 136 .cpu_name = "RS64-II (northstar)", 137 .cpu_features = CPU_FTRS_RS64, 138 .cpu_user_features = COMMON_USER_PPC64, 139 .mmu_features = MMU_FTR_HPTE_TABLE, 140 .icache_bsize = 128, 141 .dcache_bsize = 128, 142 .num_pmcs = 8, 143 .pmc_type = PPC_PMC_IBM, 144 .oprofile_cpu_type = "ppc64/rs64", 145 .oprofile_type = PPC_OPROFILE_RS64, 146 .machine_check = machine_check_generic, 147 .platform = "rs64", 148 }, 149 { /* Pulsar */ 150 .pvr_mask = 0xffff0000, 151 .pvr_value = 0x00340000, 152 .cpu_name = "RS64-III (pulsar)", 153 .cpu_features = CPU_FTRS_RS64, 154 .cpu_user_features = COMMON_USER_PPC64, 155 .mmu_features = MMU_FTR_HPTE_TABLE, 156 .icache_bsize = 128, 157 .dcache_bsize = 128, 158 .num_pmcs = 8, 159 .pmc_type = PPC_PMC_IBM, 160 .oprofile_cpu_type = "ppc64/rs64", 161 .oprofile_type = PPC_OPROFILE_RS64, 162 .machine_check = machine_check_generic, 163 .platform = "rs64", 164 }, 165 { /* I-star */ 166 .pvr_mask = 0xffff0000, 167 .pvr_value = 0x00360000, 168 .cpu_name = "RS64-III (icestar)", 169 .cpu_features = CPU_FTRS_RS64, 170 .cpu_user_features = COMMON_USER_PPC64, 171 .mmu_features = MMU_FTR_HPTE_TABLE, 172 .icache_bsize = 128, 173 .dcache_bsize = 128, 174 .num_pmcs = 8, 175 .pmc_type = PPC_PMC_IBM, 176 .oprofile_cpu_type = "ppc64/rs64", 177 .oprofile_type = PPC_OPROFILE_RS64, 178 .machine_check = machine_check_generic, 179 .platform = "rs64", 180 }, 181 { /* S-star */ 182 .pvr_mask = 0xffff0000, 183 .pvr_value = 0x00370000, 184 .cpu_name = "RS64-IV (sstar)", 185 .cpu_features = CPU_FTRS_RS64, 186 .cpu_user_features = COMMON_USER_PPC64, 187 .mmu_features = MMU_FTR_HPTE_TABLE, 188 .icache_bsize = 128, 189 .dcache_bsize = 128, 190 .num_pmcs = 8, 191 .pmc_type = PPC_PMC_IBM, 192 .oprofile_cpu_type = "ppc64/rs64", 193 .oprofile_type = PPC_OPROFILE_RS64, 194 .machine_check = machine_check_generic, 195 .platform = "rs64", 196 }, 197 { /* Power4 */ 198 .pvr_mask = 0xffff0000, 199 .pvr_value = 0x00350000, 200 .cpu_name = "POWER4 (gp)", 201 .cpu_features = CPU_FTRS_POWER4, 202 .cpu_user_features = COMMON_USER_POWER4, 203 .mmu_features = MMU_FTR_HPTE_TABLE, 204 .icache_bsize = 128, 205 .dcache_bsize = 128, 206 .num_pmcs = 8, 207 .pmc_type = PPC_PMC_IBM, 208 .oprofile_cpu_type = "ppc64/power4", 209 .oprofile_type = PPC_OPROFILE_POWER4, 210 .machine_check = machine_check_generic, 211 .platform = "power4", 212 }, 213 { /* Power4+ */ 214 .pvr_mask = 0xffff0000, 215 .pvr_value = 0x00380000, 216 .cpu_name = "POWER4+ (gq)", 217 .cpu_features = CPU_FTRS_POWER4, 218 .cpu_user_features = COMMON_USER_POWER4, 219 .mmu_features = MMU_FTR_HPTE_TABLE, 220 .icache_bsize = 128, 221 .dcache_bsize = 128, 222 .num_pmcs = 8, 223 .pmc_type = PPC_PMC_IBM, 224 .oprofile_cpu_type = "ppc64/power4", 225 .oprofile_type = PPC_OPROFILE_POWER4, 226 .machine_check = machine_check_generic, 227 .platform = "power4", 228 }, 229 { /* PPC970 */ 230 .pvr_mask = 0xffff0000, 231 .pvr_value = 0x00390000, 232 .cpu_name = "PPC970", 233 .cpu_features = CPU_FTRS_PPC970, 234 .cpu_user_features = COMMON_USER_POWER4 | 235 PPC_FEATURE_HAS_ALTIVEC_COMP, 236 .mmu_features = MMU_FTR_HPTE_TABLE, 237 .icache_bsize = 128, 238 .dcache_bsize = 128, 239 .num_pmcs = 8, 240 .pmc_type = PPC_PMC_IBM, 241 .cpu_setup = __setup_cpu_ppc970, 242 .cpu_restore = __restore_cpu_ppc970, 243 .oprofile_cpu_type = "ppc64/970", 244 .oprofile_type = PPC_OPROFILE_POWER4, 245 .machine_check = machine_check_generic, 246 .platform = "ppc970", 247 }, 248 { /* PPC970FX */ 249 .pvr_mask = 0xffff0000, 250 .pvr_value = 0x003c0000, 251 .cpu_name = "PPC970FX", 252 .cpu_features = CPU_FTRS_PPC970, 253 .cpu_user_features = COMMON_USER_POWER4 | 254 PPC_FEATURE_HAS_ALTIVEC_COMP, 255 .mmu_features = MMU_FTR_HPTE_TABLE, 256 .icache_bsize = 128, 257 .dcache_bsize = 128, 258 .num_pmcs = 8, 259 .pmc_type = PPC_PMC_IBM, 260 .cpu_setup = __setup_cpu_ppc970, 261 .cpu_restore = __restore_cpu_ppc970, 262 .oprofile_cpu_type = "ppc64/970", 263 .oprofile_type = PPC_OPROFILE_POWER4, 264 .machine_check = machine_check_generic, 265 .platform = "ppc970", 266 }, 267 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 268 .pvr_mask = 0xffffffff, 269 .pvr_value = 0x00440100, 270 .cpu_name = "PPC970MP", 271 .cpu_features = CPU_FTRS_PPC970, 272 .cpu_user_features = COMMON_USER_POWER4 | 273 PPC_FEATURE_HAS_ALTIVEC_COMP, 274 .mmu_features = MMU_FTR_HPTE_TABLE, 275 .icache_bsize = 128, 276 .dcache_bsize = 128, 277 .num_pmcs = 8, 278 .pmc_type = PPC_PMC_IBM, 279 .cpu_setup = __setup_cpu_ppc970, 280 .cpu_restore = __restore_cpu_ppc970, 281 .oprofile_cpu_type = "ppc64/970MP", 282 .oprofile_type = PPC_OPROFILE_POWER4, 283 .machine_check = machine_check_generic, 284 .platform = "ppc970", 285 }, 286 { /* PPC970MP */ 287 .pvr_mask = 0xffff0000, 288 .pvr_value = 0x00440000, 289 .cpu_name = "PPC970MP", 290 .cpu_features = CPU_FTRS_PPC970, 291 .cpu_user_features = COMMON_USER_POWER4 | 292 PPC_FEATURE_HAS_ALTIVEC_COMP, 293 .mmu_features = MMU_FTR_HPTE_TABLE, 294 .icache_bsize = 128, 295 .dcache_bsize = 128, 296 .num_pmcs = 8, 297 .pmc_type = PPC_PMC_IBM, 298 .cpu_setup = __setup_cpu_ppc970MP, 299 .cpu_restore = __restore_cpu_ppc970, 300 .oprofile_cpu_type = "ppc64/970MP", 301 .oprofile_type = PPC_OPROFILE_POWER4, 302 .machine_check = machine_check_generic, 303 .platform = "ppc970", 304 }, 305 { /* PPC970GX */ 306 .pvr_mask = 0xffff0000, 307 .pvr_value = 0x00450000, 308 .cpu_name = "PPC970GX", 309 .cpu_features = CPU_FTRS_PPC970, 310 .cpu_user_features = COMMON_USER_POWER4 | 311 PPC_FEATURE_HAS_ALTIVEC_COMP, 312 .mmu_features = MMU_FTR_HPTE_TABLE, 313 .icache_bsize = 128, 314 .dcache_bsize = 128, 315 .num_pmcs = 8, 316 .pmc_type = PPC_PMC_IBM, 317 .cpu_setup = __setup_cpu_ppc970, 318 .oprofile_cpu_type = "ppc64/970", 319 .oprofile_type = PPC_OPROFILE_POWER4, 320 .machine_check = machine_check_generic, 321 .platform = "ppc970", 322 }, 323 { /* Power5 GR */ 324 .pvr_mask = 0xffff0000, 325 .pvr_value = 0x003a0000, 326 .cpu_name = "POWER5 (gr)", 327 .cpu_features = CPU_FTRS_POWER5, 328 .cpu_user_features = COMMON_USER_POWER5, 329 .mmu_features = MMU_FTR_HPTE_TABLE, 330 .icache_bsize = 128, 331 .dcache_bsize = 128, 332 .num_pmcs = 6, 333 .pmc_type = PPC_PMC_IBM, 334 .oprofile_cpu_type = "ppc64/power5", 335 .oprofile_type = PPC_OPROFILE_POWER4, 336 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 337 * and above but only works on POWER5 and above 338 */ 339 .oprofile_mmcra_sihv = MMCRA_SIHV, 340 .oprofile_mmcra_sipr = MMCRA_SIPR, 341 .machine_check = machine_check_generic, 342 .platform = "power5", 343 }, 344 { /* Power5++ */ 345 .pvr_mask = 0xffffff00, 346 .pvr_value = 0x003b0300, 347 .cpu_name = "POWER5+ (gs)", 348 .cpu_features = CPU_FTRS_POWER5, 349 .cpu_user_features = COMMON_USER_POWER5_PLUS, 350 .mmu_features = MMU_FTR_HPTE_TABLE, 351 .icache_bsize = 128, 352 .dcache_bsize = 128, 353 .num_pmcs = 6, 354 .oprofile_cpu_type = "ppc64/power5++", 355 .oprofile_type = PPC_OPROFILE_POWER4, 356 .oprofile_mmcra_sihv = MMCRA_SIHV, 357 .oprofile_mmcra_sipr = MMCRA_SIPR, 358 .machine_check = machine_check_generic, 359 .platform = "power5+", 360 }, 361 { /* Power5 GS */ 362 .pvr_mask = 0xffff0000, 363 .pvr_value = 0x003b0000, 364 .cpu_name = "POWER5+ (gs)", 365 .cpu_features = CPU_FTRS_POWER5, 366 .cpu_user_features = COMMON_USER_POWER5_PLUS, 367 .mmu_features = MMU_FTR_HPTE_TABLE, 368 .icache_bsize = 128, 369 .dcache_bsize = 128, 370 .num_pmcs = 6, 371 .pmc_type = PPC_PMC_IBM, 372 .oprofile_cpu_type = "ppc64/power5+", 373 .oprofile_type = PPC_OPROFILE_POWER4, 374 .oprofile_mmcra_sihv = MMCRA_SIHV, 375 .oprofile_mmcra_sipr = MMCRA_SIPR, 376 .machine_check = machine_check_generic, 377 .platform = "power5+", 378 }, 379 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 380 .pvr_mask = 0xffffffff, 381 .pvr_value = 0x0f000001, 382 .cpu_name = "POWER5+", 383 .cpu_features = CPU_FTRS_POWER5, 384 .cpu_user_features = COMMON_USER_POWER5_PLUS, 385 .mmu_features = MMU_FTR_HPTE_TABLE, 386 .icache_bsize = 128, 387 .dcache_bsize = 128, 388 .machine_check = machine_check_generic, 389 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 390 .oprofile_type = PPC_OPROFILE_POWER4, 391 .platform = "power5+", 392 }, 393 { /* Power6 */ 394 .pvr_mask = 0xffff0000, 395 .pvr_value = 0x003e0000, 396 .cpu_name = "POWER6 (raw)", 397 .cpu_features = CPU_FTRS_POWER6, 398 .cpu_user_features = COMMON_USER_POWER6 | 399 PPC_FEATURE_POWER6_EXT, 400 .mmu_features = MMU_FTR_HPTE_TABLE, 401 .icache_bsize = 128, 402 .dcache_bsize = 128, 403 .num_pmcs = 6, 404 .pmc_type = PPC_PMC_IBM, 405 .oprofile_cpu_type = "ppc64/power6", 406 .oprofile_type = PPC_OPROFILE_POWER4, 407 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 408 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 409 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 410 POWER6_MMCRA_OTHER, 411 .machine_check = machine_check_generic, 412 .platform = "power6x", 413 }, 414 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 415 .pvr_mask = 0xffffffff, 416 .pvr_value = 0x0f000002, 417 .cpu_name = "POWER6 (architected)", 418 .cpu_features = CPU_FTRS_POWER6, 419 .cpu_user_features = COMMON_USER_POWER6, 420 .mmu_features = MMU_FTR_HPTE_TABLE, 421 .icache_bsize = 128, 422 .dcache_bsize = 128, 423 .machine_check = machine_check_generic, 424 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 425 .oprofile_type = PPC_OPROFILE_POWER4, 426 .platform = "power6", 427 }, 428 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 429 .pvr_mask = 0xffffffff, 430 .pvr_value = 0x0f000003, 431 .cpu_name = "POWER7 (architected)", 432 .cpu_features = CPU_FTRS_POWER7, 433 .cpu_user_features = COMMON_USER_POWER7, 434 .mmu_features = MMU_FTR_HPTE_TABLE | 435 MMU_FTR_TLBIE_206, 436 .icache_bsize = 128, 437 .dcache_bsize = 128, 438 .machine_check = machine_check_generic, 439 .oprofile_type = PPC_OPROFILE_POWER4, 440 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 441 .platform = "power7", 442 }, 443 { /* Power7 */ 444 .pvr_mask = 0xffff0000, 445 .pvr_value = 0x003f0000, 446 .cpu_name = "POWER7 (raw)", 447 .cpu_features = CPU_FTRS_POWER7, 448 .cpu_user_features = COMMON_USER_POWER7, 449 .mmu_features = MMU_FTR_HPTE_TABLE | 450 MMU_FTR_TLBIE_206, 451 .icache_bsize = 128, 452 .dcache_bsize = 128, 453 .num_pmcs = 6, 454 .pmc_type = PPC_PMC_IBM, 455 .cpu_setup = __setup_cpu_power7, 456 .cpu_restore = __restore_cpu_power7, 457 .oprofile_cpu_type = "ppc64/power7", 458 .oprofile_type = PPC_OPROFILE_POWER4, 459 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 460 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 461 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 462 POWER6_MMCRA_OTHER, 463 .platform = "power7", 464 }, 465 { /* Cell Broadband Engine */ 466 .pvr_mask = 0xffff0000, 467 .pvr_value = 0x00700000, 468 .cpu_name = "Cell Broadband Engine", 469 .cpu_features = CPU_FTRS_CELL, 470 .cpu_user_features = COMMON_USER_PPC64 | 471 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 472 PPC_FEATURE_SMT, 473 .mmu_features = MMU_FTR_HPTE_TABLE, 474 .icache_bsize = 128, 475 .dcache_bsize = 128, 476 .num_pmcs = 4, 477 .pmc_type = PPC_PMC_IBM, 478 .oprofile_cpu_type = "ppc64/cell-be", 479 .oprofile_type = PPC_OPROFILE_CELL, 480 .machine_check = machine_check_generic, 481 .platform = "ppc-cell-be", 482 }, 483 { /* PA Semi PA6T */ 484 .pvr_mask = 0x7fff0000, 485 .pvr_value = 0x00900000, 486 .cpu_name = "PA6T", 487 .cpu_features = CPU_FTRS_PA6T, 488 .cpu_user_features = COMMON_USER_PA6T, 489 .mmu_features = MMU_FTR_HPTE_TABLE, 490 .icache_bsize = 64, 491 .dcache_bsize = 64, 492 .num_pmcs = 6, 493 .pmc_type = PPC_PMC_PA6T, 494 .cpu_setup = __setup_cpu_pa6t, 495 .cpu_restore = __restore_cpu_pa6t, 496 .oprofile_cpu_type = "ppc64/pa6t", 497 .oprofile_type = PPC_OPROFILE_PA6T, 498 .machine_check = machine_check_generic, 499 .platform = "pa6t", 500 }, 501 { /* default match */ 502 .pvr_mask = 0x00000000, 503 .pvr_value = 0x00000000, 504 .cpu_name = "POWER4 (compatible)", 505 .cpu_features = CPU_FTRS_COMPATIBLE, 506 .cpu_user_features = COMMON_USER_PPC64, 507 .mmu_features = MMU_FTR_HPTE_TABLE, 508 .icache_bsize = 128, 509 .dcache_bsize = 128, 510 .num_pmcs = 6, 511 .pmc_type = PPC_PMC_IBM, 512 .machine_check = machine_check_generic, 513 .platform = "power4", 514 } 515#endif /* CONFIG_PPC_BOOK3S_64 */ 516 517#ifdef CONFIG_PPC32 518#if CLASSIC_PPC 519 { /* 601 */ 520 .pvr_mask = 0xffff0000, 521 .pvr_value = 0x00010000, 522 .cpu_name = "601", 523 .cpu_features = CPU_FTRS_PPC601, 524 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 525 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 526 .mmu_features = MMU_FTR_HPTE_TABLE, 527 .icache_bsize = 32, 528 .dcache_bsize = 32, 529 .machine_check = machine_check_generic, 530 .platform = "ppc601", 531 }, 532 { /* 603 */ 533 .pvr_mask = 0xffff0000, 534 .pvr_value = 0x00030000, 535 .cpu_name = "603", 536 .cpu_features = CPU_FTRS_603, 537 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 538 .mmu_features = 0, 539 .icache_bsize = 32, 540 .dcache_bsize = 32, 541 .cpu_setup = __setup_cpu_603, 542 .machine_check = machine_check_generic, 543 .platform = "ppc603", 544 }, 545 { /* 603e */ 546 .pvr_mask = 0xffff0000, 547 .pvr_value = 0x00060000, 548 .cpu_name = "603e", 549 .cpu_features = CPU_FTRS_603, 550 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 551 .mmu_features = 0, 552 .icache_bsize = 32, 553 .dcache_bsize = 32, 554 .cpu_setup = __setup_cpu_603, 555 .machine_check = machine_check_generic, 556 .platform = "ppc603", 557 }, 558 { /* 603ev */ 559 .pvr_mask = 0xffff0000, 560 .pvr_value = 0x00070000, 561 .cpu_name = "603ev", 562 .cpu_features = CPU_FTRS_603, 563 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 564 .mmu_features = 0, 565 .icache_bsize = 32, 566 .dcache_bsize = 32, 567 .cpu_setup = __setup_cpu_603, 568 .machine_check = machine_check_generic, 569 .platform = "ppc603", 570 }, 571 { /* 604 */ 572 .pvr_mask = 0xffff0000, 573 .pvr_value = 0x00040000, 574 .cpu_name = "604", 575 .cpu_features = CPU_FTRS_604, 576 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 577 .mmu_features = MMU_FTR_HPTE_TABLE, 578 .icache_bsize = 32, 579 .dcache_bsize = 32, 580 .num_pmcs = 2, 581 .cpu_setup = __setup_cpu_604, 582 .machine_check = machine_check_generic, 583 .platform = "ppc604", 584 }, 585 { /* 604e */ 586 .pvr_mask = 0xfffff000, 587 .pvr_value = 0x00090000, 588 .cpu_name = "604e", 589 .cpu_features = CPU_FTRS_604, 590 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 591 .mmu_features = MMU_FTR_HPTE_TABLE, 592 .icache_bsize = 32, 593 .dcache_bsize = 32, 594 .num_pmcs = 4, 595 .cpu_setup = __setup_cpu_604, 596 .machine_check = machine_check_generic, 597 .platform = "ppc604", 598 }, 599 { /* 604r */ 600 .pvr_mask = 0xffff0000, 601 .pvr_value = 0x00090000, 602 .cpu_name = "604r", 603 .cpu_features = CPU_FTRS_604, 604 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 605 .mmu_features = MMU_FTR_HPTE_TABLE, 606 .icache_bsize = 32, 607 .dcache_bsize = 32, 608 .num_pmcs = 4, 609 .cpu_setup = __setup_cpu_604, 610 .machine_check = machine_check_generic, 611 .platform = "ppc604", 612 }, 613 { /* 604ev */ 614 .pvr_mask = 0xffff0000, 615 .pvr_value = 0x000a0000, 616 .cpu_name = "604ev", 617 .cpu_features = CPU_FTRS_604, 618 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 619 .mmu_features = MMU_FTR_HPTE_TABLE, 620 .icache_bsize = 32, 621 .dcache_bsize = 32, 622 .num_pmcs = 4, 623 .cpu_setup = __setup_cpu_604, 624 .machine_check = machine_check_generic, 625 .platform = "ppc604", 626 }, 627 { /* 740/750 (0x4202, don't support TAU ?) */ 628 .pvr_mask = 0xffffffff, 629 .pvr_value = 0x00084202, 630 .cpu_name = "740/750", 631 .cpu_features = CPU_FTRS_740_NOTAU, 632 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 633 .mmu_features = MMU_FTR_HPTE_TABLE, 634 .icache_bsize = 32, 635 .dcache_bsize = 32, 636 .num_pmcs = 4, 637 .cpu_setup = __setup_cpu_750, 638 .machine_check = machine_check_generic, 639 .platform = "ppc750", 640 }, 641 { /* 750CX (80100 and 8010x?) */ 642 .pvr_mask = 0xfffffff0, 643 .pvr_value = 0x00080100, 644 .cpu_name = "750CX", 645 .cpu_features = CPU_FTRS_750, 646 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 647 .mmu_features = MMU_FTR_HPTE_TABLE, 648 .icache_bsize = 32, 649 .dcache_bsize = 32, 650 .num_pmcs = 4, 651 .cpu_setup = __setup_cpu_750cx, 652 .machine_check = machine_check_generic, 653 .platform = "ppc750", 654 }, 655 { /* 750CX (82201 and 82202) */ 656 .pvr_mask = 0xfffffff0, 657 .pvr_value = 0x00082200, 658 .cpu_name = "750CX", 659 .cpu_features = CPU_FTRS_750, 660 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 661 .mmu_features = MMU_FTR_HPTE_TABLE, 662 .icache_bsize = 32, 663 .dcache_bsize = 32, 664 .num_pmcs = 4, 665 .pmc_type = PPC_PMC_IBM, 666 .cpu_setup = __setup_cpu_750cx, 667 .machine_check = machine_check_generic, 668 .platform = "ppc750", 669 }, 670 { /* 750CXe (82214) */ 671 .pvr_mask = 0xfffffff0, 672 .pvr_value = 0x00082210, 673 .cpu_name = "750CXe", 674 .cpu_features = CPU_FTRS_750, 675 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 676 .mmu_features = MMU_FTR_HPTE_TABLE, 677 .icache_bsize = 32, 678 .dcache_bsize = 32, 679 .num_pmcs = 4, 680 .pmc_type = PPC_PMC_IBM, 681 .cpu_setup = __setup_cpu_750cx, 682 .machine_check = machine_check_generic, 683 .platform = "ppc750", 684 }, 685 { /* 750CXe "Gekko" (83214) */ 686 .pvr_mask = 0xffffffff, 687 .pvr_value = 0x00083214, 688 .cpu_name = "750CXe", 689 .cpu_features = CPU_FTRS_750, 690 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 691 .mmu_features = MMU_FTR_HPTE_TABLE, 692 .icache_bsize = 32, 693 .dcache_bsize = 32, 694 .num_pmcs = 4, 695 .pmc_type = PPC_PMC_IBM, 696 .cpu_setup = __setup_cpu_750cx, 697 .machine_check = machine_check_generic, 698 .platform = "ppc750", 699 }, 700 { /* 750CL (and "Broadway") */ 701 .pvr_mask = 0xfffff0e0, 702 .pvr_value = 0x00087000, 703 .cpu_name = "750CL", 704 .cpu_features = CPU_FTRS_750CL, 705 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 706 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 707 .icache_bsize = 32, 708 .dcache_bsize = 32, 709 .num_pmcs = 4, 710 .pmc_type = PPC_PMC_IBM, 711 .cpu_setup = __setup_cpu_750, 712 .machine_check = machine_check_generic, 713 .platform = "ppc750", 714 .oprofile_cpu_type = "ppc/750", 715 .oprofile_type = PPC_OPROFILE_G4, 716 }, 717 { /* 745/755 */ 718 .pvr_mask = 0xfffff000, 719 .pvr_value = 0x00083000, 720 .cpu_name = "745/755", 721 .cpu_features = CPU_FTRS_750, 722 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 723 .mmu_features = MMU_FTR_HPTE_TABLE, 724 .icache_bsize = 32, 725 .dcache_bsize = 32, 726 .num_pmcs = 4, 727 .pmc_type = PPC_PMC_IBM, 728 .cpu_setup = __setup_cpu_750, 729 .machine_check = machine_check_generic, 730 .platform = "ppc750", 731 }, 732 { /* 750FX rev 1.x */ 733 .pvr_mask = 0xffffff00, 734 .pvr_value = 0x70000100, 735 .cpu_name = "750FX", 736 .cpu_features = CPU_FTRS_750FX1, 737 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 738 .mmu_features = MMU_FTR_HPTE_TABLE, 739 .icache_bsize = 32, 740 .dcache_bsize = 32, 741 .num_pmcs = 4, 742 .pmc_type = PPC_PMC_IBM, 743 .cpu_setup = __setup_cpu_750, 744 .machine_check = machine_check_generic, 745 .platform = "ppc750", 746 .oprofile_cpu_type = "ppc/750", 747 .oprofile_type = PPC_OPROFILE_G4, 748 }, 749 { /* 750FX rev 2.0 must disable HID0[DPM] */ 750 .pvr_mask = 0xffffffff, 751 .pvr_value = 0x70000200, 752 .cpu_name = "750FX", 753 .cpu_features = CPU_FTRS_750FX2, 754 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 755 .mmu_features = MMU_FTR_HPTE_TABLE, 756 .icache_bsize = 32, 757 .dcache_bsize = 32, 758 .num_pmcs = 4, 759 .pmc_type = PPC_PMC_IBM, 760 .cpu_setup = __setup_cpu_750, 761 .machine_check = machine_check_generic, 762 .platform = "ppc750", 763 .oprofile_cpu_type = "ppc/750", 764 .oprofile_type = PPC_OPROFILE_G4, 765 }, 766 { /* 750FX (All revs except 2.0) */ 767 .pvr_mask = 0xffff0000, 768 .pvr_value = 0x70000000, 769 .cpu_name = "750FX", 770 .cpu_features = CPU_FTRS_750FX, 771 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 772 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 773 .icache_bsize = 32, 774 .dcache_bsize = 32, 775 .num_pmcs = 4, 776 .pmc_type = PPC_PMC_IBM, 777 .cpu_setup = __setup_cpu_750fx, 778 .machine_check = machine_check_generic, 779 .platform = "ppc750", 780 .oprofile_cpu_type = "ppc/750", 781 .oprofile_type = PPC_OPROFILE_G4, 782 }, 783 { /* 750GX */ 784 .pvr_mask = 0xffff0000, 785 .pvr_value = 0x70020000, 786 .cpu_name = "750GX", 787 .cpu_features = CPU_FTRS_750GX, 788 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 789 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 790 .icache_bsize = 32, 791 .dcache_bsize = 32, 792 .num_pmcs = 4, 793 .pmc_type = PPC_PMC_IBM, 794 .cpu_setup = __setup_cpu_750fx, 795 .machine_check = machine_check_generic, 796 .platform = "ppc750", 797 .oprofile_cpu_type = "ppc/750", 798 .oprofile_type = PPC_OPROFILE_G4, 799 }, 800 { /* 740/750 (L2CR bit need fixup for 740) */ 801 .pvr_mask = 0xffff0000, 802 .pvr_value = 0x00080000, 803 .cpu_name = "740/750", 804 .cpu_features = CPU_FTRS_740, 805 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 806 .mmu_features = MMU_FTR_HPTE_TABLE, 807 .icache_bsize = 32, 808 .dcache_bsize = 32, 809 .num_pmcs = 4, 810 .pmc_type = PPC_PMC_IBM, 811 .cpu_setup = __setup_cpu_750, 812 .machine_check = machine_check_generic, 813 .platform = "ppc750", 814 }, 815 { /* 7400 rev 1.1 ? (no TAU) */ 816 .pvr_mask = 0xffffffff, 817 .pvr_value = 0x000c1101, 818 .cpu_name = "7400 (1.1)", 819 .cpu_features = CPU_FTRS_7400_NOTAU, 820 .cpu_user_features = COMMON_USER | 821 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 822 .mmu_features = MMU_FTR_HPTE_TABLE, 823 .icache_bsize = 32, 824 .dcache_bsize = 32, 825 .num_pmcs = 4, 826 .pmc_type = PPC_PMC_G4, 827 .cpu_setup = __setup_cpu_7400, 828 .machine_check = machine_check_generic, 829 .platform = "ppc7400", 830 }, 831 { /* 7400 */ 832 .pvr_mask = 0xffff0000, 833 .pvr_value = 0x000c0000, 834 .cpu_name = "7400", 835 .cpu_features = CPU_FTRS_7400, 836 .cpu_user_features = COMMON_USER | 837 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 838 .mmu_features = MMU_FTR_HPTE_TABLE, 839 .icache_bsize = 32, 840 .dcache_bsize = 32, 841 .num_pmcs = 4, 842 .pmc_type = PPC_PMC_G4, 843 .cpu_setup = __setup_cpu_7400, 844 .machine_check = machine_check_generic, 845 .platform = "ppc7400", 846 }, 847 { /* 7410 */ 848 .pvr_mask = 0xffff0000, 849 .pvr_value = 0x800c0000, 850 .cpu_name = "7410", 851 .cpu_features = CPU_FTRS_7400, 852 .cpu_user_features = COMMON_USER | 853 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 854 .mmu_features = MMU_FTR_HPTE_TABLE, 855 .icache_bsize = 32, 856 .dcache_bsize = 32, 857 .num_pmcs = 4, 858 .pmc_type = PPC_PMC_G4, 859 .cpu_setup = __setup_cpu_7410, 860 .machine_check = machine_check_generic, 861 .platform = "ppc7400", 862 }, 863 { /* 7450 2.0 - no doze/nap */ 864 .pvr_mask = 0xffffffff, 865 .pvr_value = 0x80000200, 866 .cpu_name = "7450", 867 .cpu_features = CPU_FTRS_7450_20, 868 .cpu_user_features = COMMON_USER | 869 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 870 .mmu_features = MMU_FTR_HPTE_TABLE, 871 .icache_bsize = 32, 872 .dcache_bsize = 32, 873 .num_pmcs = 6, 874 .pmc_type = PPC_PMC_G4, 875 .cpu_setup = __setup_cpu_745x, 876 .oprofile_cpu_type = "ppc/7450", 877 .oprofile_type = PPC_OPROFILE_G4, 878 .machine_check = machine_check_generic, 879 .platform = "ppc7450", 880 }, 881 { /* 7450 2.1 */ 882 .pvr_mask = 0xffffffff, 883 .pvr_value = 0x80000201, 884 .cpu_name = "7450", 885 .cpu_features = CPU_FTRS_7450_21, 886 .cpu_user_features = COMMON_USER | 887 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 888 .mmu_features = MMU_FTR_HPTE_TABLE, 889 .icache_bsize = 32, 890 .dcache_bsize = 32, 891 .num_pmcs = 6, 892 .pmc_type = PPC_PMC_G4, 893 .cpu_setup = __setup_cpu_745x, 894 .oprofile_cpu_type = "ppc/7450", 895 .oprofile_type = PPC_OPROFILE_G4, 896 .machine_check = machine_check_generic, 897 .platform = "ppc7450", 898 }, 899 { /* 7450 2.3 and newer */ 900 .pvr_mask = 0xffff0000, 901 .pvr_value = 0x80000000, 902 .cpu_name = "7450", 903 .cpu_features = CPU_FTRS_7450_23, 904 .cpu_user_features = COMMON_USER | 905 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 906 .mmu_features = MMU_FTR_HPTE_TABLE, 907 .icache_bsize = 32, 908 .dcache_bsize = 32, 909 .num_pmcs = 6, 910 .pmc_type = PPC_PMC_G4, 911 .cpu_setup = __setup_cpu_745x, 912 .oprofile_cpu_type = "ppc/7450", 913 .oprofile_type = PPC_OPROFILE_G4, 914 .machine_check = machine_check_generic, 915 .platform = "ppc7450", 916 }, 917 { /* 7455 rev 1.x */ 918 .pvr_mask = 0xffffff00, 919 .pvr_value = 0x80010100, 920 .cpu_name = "7455", 921 .cpu_features = CPU_FTRS_7455_1, 922 .cpu_user_features = COMMON_USER | 923 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 924 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 925 .icache_bsize = 32, 926 .dcache_bsize = 32, 927 .num_pmcs = 6, 928 .pmc_type = PPC_PMC_G4, 929 .cpu_setup = __setup_cpu_745x, 930 .oprofile_cpu_type = "ppc/7450", 931 .oprofile_type = PPC_OPROFILE_G4, 932 .machine_check = machine_check_generic, 933 .platform = "ppc7450", 934 }, 935 { /* 7455 rev 2.0 */ 936 .pvr_mask = 0xffffffff, 937 .pvr_value = 0x80010200, 938 .cpu_name = "7455", 939 .cpu_features = CPU_FTRS_7455_20, 940 .cpu_user_features = COMMON_USER | 941 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 942 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 943 .icache_bsize = 32, 944 .dcache_bsize = 32, 945 .num_pmcs = 6, 946 .pmc_type = PPC_PMC_G4, 947 .cpu_setup = __setup_cpu_745x, 948 .oprofile_cpu_type = "ppc/7450", 949 .oprofile_type = PPC_OPROFILE_G4, 950 .machine_check = machine_check_generic, 951 .platform = "ppc7450", 952 }, 953 { /* 7455 others */ 954 .pvr_mask = 0xffff0000, 955 .pvr_value = 0x80010000, 956 .cpu_name = "7455", 957 .cpu_features = CPU_FTRS_7455, 958 .cpu_user_features = COMMON_USER | 959 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 960 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 961 .icache_bsize = 32, 962 .dcache_bsize = 32, 963 .num_pmcs = 6, 964 .pmc_type = PPC_PMC_G4, 965 .cpu_setup = __setup_cpu_745x, 966 .oprofile_cpu_type = "ppc/7450", 967 .oprofile_type = PPC_OPROFILE_G4, 968 .machine_check = machine_check_generic, 969 .platform = "ppc7450", 970 }, 971 { /* 7447/7457 Rev 1.0 */ 972 .pvr_mask = 0xffffffff, 973 .pvr_value = 0x80020100, 974 .cpu_name = "7447/7457", 975 .cpu_features = CPU_FTRS_7447_10, 976 .cpu_user_features = COMMON_USER | 977 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 978 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 979 .icache_bsize = 32, 980 .dcache_bsize = 32, 981 .num_pmcs = 6, 982 .pmc_type = PPC_PMC_G4, 983 .cpu_setup = __setup_cpu_745x, 984 .oprofile_cpu_type = "ppc/7450", 985 .oprofile_type = PPC_OPROFILE_G4, 986 .machine_check = machine_check_generic, 987 .platform = "ppc7450", 988 }, 989 { /* 7447/7457 Rev 1.1 */ 990 .pvr_mask = 0xffffffff, 991 .pvr_value = 0x80020101, 992 .cpu_name = "7447/7457", 993 .cpu_features = CPU_FTRS_7447_10, 994 .cpu_user_features = COMMON_USER | 995 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 996 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 997 .icache_bsize = 32, 998 .dcache_bsize = 32, 999 .num_pmcs = 6, 1000 .pmc_type = PPC_PMC_G4, 1001 .cpu_setup = __setup_cpu_745x, 1002 .oprofile_cpu_type = "ppc/7450", 1003 .oprofile_type = PPC_OPROFILE_G4, 1004 .machine_check = machine_check_generic, 1005 .platform = "ppc7450", 1006 }, 1007 { /* 7447/7457 Rev 1.2 and later */ 1008 .pvr_mask = 0xffff0000, 1009 .pvr_value = 0x80020000, 1010 .cpu_name = "7447/7457", 1011 .cpu_features = CPU_FTRS_7447, 1012 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1013 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1014 .icache_bsize = 32, 1015 .dcache_bsize = 32, 1016 .num_pmcs = 6, 1017 .pmc_type = PPC_PMC_G4, 1018 .cpu_setup = __setup_cpu_745x, 1019 .oprofile_cpu_type = "ppc/7450", 1020 .oprofile_type = PPC_OPROFILE_G4, 1021 .machine_check = machine_check_generic, 1022 .platform = "ppc7450", 1023 }, 1024 { /* 7447A */ 1025 .pvr_mask = 0xffff0000, 1026 .pvr_value = 0x80030000, 1027 .cpu_name = "7447A", 1028 .cpu_features = CPU_FTRS_7447A, 1029 .cpu_user_features = COMMON_USER | 1030 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1031 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1032 .icache_bsize = 32, 1033 .dcache_bsize = 32, 1034 .num_pmcs = 6, 1035 .pmc_type = PPC_PMC_G4, 1036 .cpu_setup = __setup_cpu_745x, 1037 .oprofile_cpu_type = "ppc/7450", 1038 .oprofile_type = PPC_OPROFILE_G4, 1039 .machine_check = machine_check_generic, 1040 .platform = "ppc7450", 1041 }, 1042 { /* 7448 */ 1043 .pvr_mask = 0xffff0000, 1044 .pvr_value = 0x80040000, 1045 .cpu_name = "7448", 1046 .cpu_features = CPU_FTRS_7448, 1047 .cpu_user_features = COMMON_USER | 1048 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1049 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1050 .icache_bsize = 32, 1051 .dcache_bsize = 32, 1052 .num_pmcs = 6, 1053 .pmc_type = PPC_PMC_G4, 1054 .cpu_setup = __setup_cpu_745x, 1055 .oprofile_cpu_type = "ppc/7450", 1056 .oprofile_type = PPC_OPROFILE_G4, 1057 .machine_check = machine_check_generic, 1058 .platform = "ppc7450", 1059 }, 1060 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1061 .pvr_mask = 0x7fff0000, 1062 .pvr_value = 0x00810000, 1063 .cpu_name = "82xx", 1064 .cpu_features = CPU_FTRS_82XX, 1065 .cpu_user_features = COMMON_USER, 1066 .mmu_features = 0, 1067 .icache_bsize = 32, 1068 .dcache_bsize = 32, 1069 .cpu_setup = __setup_cpu_603, 1070 .machine_check = machine_check_generic, 1071 .platform = "ppc603", 1072 }, 1073 { /* All G2_LE (603e core, plus some) have the same pvr */ 1074 .pvr_mask = 0x7fff0000, 1075 .pvr_value = 0x00820000, 1076 .cpu_name = "G2_LE", 1077 .cpu_features = CPU_FTRS_G2_LE, 1078 .cpu_user_features = COMMON_USER, 1079 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1080 .icache_bsize = 32, 1081 .dcache_bsize = 32, 1082 .cpu_setup = __setup_cpu_603, 1083 .machine_check = machine_check_generic, 1084 .platform = "ppc603", 1085 }, 1086 { /* e300c1 (a 603e core, plus some) on 83xx */ 1087 .pvr_mask = 0x7fff0000, 1088 .pvr_value = 0x00830000, 1089 .cpu_name = "e300c1", 1090 .cpu_features = CPU_FTRS_E300, 1091 .cpu_user_features = COMMON_USER, 1092 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1093 .icache_bsize = 32, 1094 .dcache_bsize = 32, 1095 .cpu_setup = __setup_cpu_603, 1096 .machine_check = machine_check_generic, 1097 .platform = "ppc603", 1098 }, 1099 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1100 .pvr_mask = 0x7fff0000, 1101 .pvr_value = 0x00840000, 1102 .cpu_name = "e300c2", 1103 .cpu_features = CPU_FTRS_E300C2, 1104 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1105 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1106 MMU_FTR_NEED_DTLB_SW_LRU, 1107 .icache_bsize = 32, 1108 .dcache_bsize = 32, 1109 .cpu_setup = __setup_cpu_603, 1110 .machine_check = machine_check_generic, 1111 .platform = "ppc603", 1112 }, 1113 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1114 .pvr_mask = 0x7fff0000, 1115 .pvr_value = 0x00850000, 1116 .cpu_name = "e300c3", 1117 .cpu_features = CPU_FTRS_E300, 1118 .cpu_user_features = COMMON_USER, 1119 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1120 MMU_FTR_NEED_DTLB_SW_LRU, 1121 .icache_bsize = 32, 1122 .dcache_bsize = 32, 1123 .cpu_setup = __setup_cpu_603, 1124 .num_pmcs = 4, 1125 .oprofile_cpu_type = "ppc/e300", 1126 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1127 .platform = "ppc603", 1128 }, 1129 { /* e300c4 (e300c1, plus one IU) */ 1130 .pvr_mask = 0x7fff0000, 1131 .pvr_value = 0x00860000, 1132 .cpu_name = "e300c4", 1133 .cpu_features = CPU_FTRS_E300, 1134 .cpu_user_features = COMMON_USER, 1135 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1136 MMU_FTR_NEED_DTLB_SW_LRU, 1137 .icache_bsize = 32, 1138 .dcache_bsize = 32, 1139 .cpu_setup = __setup_cpu_603, 1140 .machine_check = machine_check_generic, 1141 .num_pmcs = 4, 1142 .oprofile_cpu_type = "ppc/e300", 1143 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1144 .platform = "ppc603", 1145 }, 1146 { /* default match, we assume split I/D cache & TB (non-601)... */ 1147 .pvr_mask = 0x00000000, 1148 .pvr_value = 0x00000000, 1149 .cpu_name = "(generic PPC)", 1150 .cpu_features = CPU_FTRS_CLASSIC32, 1151 .cpu_user_features = COMMON_USER, 1152 .mmu_features = MMU_FTR_HPTE_TABLE, 1153 .icache_bsize = 32, 1154 .dcache_bsize = 32, 1155 .machine_check = machine_check_generic, 1156 .platform = "ppc603", 1157 }, 1158#endif /* CLASSIC_PPC */ 1159#ifdef CONFIG_8xx 1160 { /* 8xx */ 1161 .pvr_mask = 0xffff0000, 1162 .pvr_value = 0x00500000, 1163 .cpu_name = "8xx", 1164 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1165 * if the 8xx code is there.... */ 1166 .cpu_features = CPU_FTRS_8XX, 1167 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1168 .mmu_features = MMU_FTR_TYPE_8xx, 1169 .icache_bsize = 16, 1170 .dcache_bsize = 16, 1171 .platform = "ppc823", 1172 }, 1173#endif /* CONFIG_8xx */ 1174#ifdef CONFIG_40x 1175 { /* 403GC */ 1176 .pvr_mask = 0xffffff00, 1177 .pvr_value = 0x00200200, 1178 .cpu_name = "403GC", 1179 .cpu_features = CPU_FTRS_40X, 1180 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1181 .mmu_features = MMU_FTR_TYPE_40x, 1182 .icache_bsize = 16, 1183 .dcache_bsize = 16, 1184 .machine_check = machine_check_4xx, 1185 .platform = "ppc403", 1186 }, 1187 { /* 403GCX */ 1188 .pvr_mask = 0xffffff00, 1189 .pvr_value = 0x00201400, 1190 .cpu_name = "403GCX", 1191 .cpu_features = CPU_FTRS_40X, 1192 .cpu_user_features = PPC_FEATURE_32 | 1193 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1194 .mmu_features = MMU_FTR_TYPE_40x, 1195 .icache_bsize = 16, 1196 .dcache_bsize = 16, 1197 .machine_check = machine_check_4xx, 1198 .platform = "ppc403", 1199 }, 1200 { /* 403G ?? */ 1201 .pvr_mask = 0xffff0000, 1202 .pvr_value = 0x00200000, 1203 .cpu_name = "403G ??", 1204 .cpu_features = CPU_FTRS_40X, 1205 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1206 .mmu_features = MMU_FTR_TYPE_40x, 1207 .icache_bsize = 16, 1208 .dcache_bsize = 16, 1209 .machine_check = machine_check_4xx, 1210 .platform = "ppc403", 1211 }, 1212 { /* 405GP */ 1213 .pvr_mask = 0xffff0000, 1214 .pvr_value = 0x40110000, 1215 .cpu_name = "405GP", 1216 .cpu_features = CPU_FTRS_40X, 1217 .cpu_user_features = PPC_FEATURE_32 | 1218 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1219 .mmu_features = MMU_FTR_TYPE_40x, 1220 .icache_bsize = 32, 1221 .dcache_bsize = 32, 1222 .machine_check = machine_check_4xx, 1223 .platform = "ppc405", 1224 }, 1225 { /* STB 03xxx */ 1226 .pvr_mask = 0xffff0000, 1227 .pvr_value = 0x40130000, 1228 .cpu_name = "STB03xxx", 1229 .cpu_features = CPU_FTRS_40X, 1230 .cpu_user_features = PPC_FEATURE_32 | 1231 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1232 .mmu_features = MMU_FTR_TYPE_40x, 1233 .icache_bsize = 32, 1234 .dcache_bsize = 32, 1235 .machine_check = machine_check_4xx, 1236 .platform = "ppc405", 1237 }, 1238 { /* STB 04xxx */ 1239 .pvr_mask = 0xffff0000, 1240 .pvr_value = 0x41810000, 1241 .cpu_name = "STB04xxx", 1242 .cpu_features = CPU_FTRS_40X, 1243 .cpu_user_features = PPC_FEATURE_32 | 1244 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1245 .mmu_features = MMU_FTR_TYPE_40x, 1246 .icache_bsize = 32, 1247 .dcache_bsize = 32, 1248 .machine_check = machine_check_4xx, 1249 .platform = "ppc405", 1250 }, 1251 { /* NP405L */ 1252 .pvr_mask = 0xffff0000, 1253 .pvr_value = 0x41610000, 1254 .cpu_name = "NP405L", 1255 .cpu_features = CPU_FTRS_40X, 1256 .cpu_user_features = PPC_FEATURE_32 | 1257 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1258 .mmu_features = MMU_FTR_TYPE_40x, 1259 .icache_bsize = 32, 1260 .dcache_bsize = 32, 1261 .machine_check = machine_check_4xx, 1262 .platform = "ppc405", 1263 }, 1264 { /* NP4GS3 */ 1265 .pvr_mask = 0xffff0000, 1266 .pvr_value = 0x40B10000, 1267 .cpu_name = "NP4GS3", 1268 .cpu_features = CPU_FTRS_40X, 1269 .cpu_user_features = PPC_FEATURE_32 | 1270 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1271 .mmu_features = MMU_FTR_TYPE_40x, 1272 .icache_bsize = 32, 1273 .dcache_bsize = 32, 1274 .machine_check = machine_check_4xx, 1275 .platform = "ppc405", 1276 }, 1277 { /* NP405H */ 1278 .pvr_mask = 0xffff0000, 1279 .pvr_value = 0x41410000, 1280 .cpu_name = "NP405H", 1281 .cpu_features = CPU_FTRS_40X, 1282 .cpu_user_features = PPC_FEATURE_32 | 1283 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1284 .mmu_features = MMU_FTR_TYPE_40x, 1285 .icache_bsize = 32, 1286 .dcache_bsize = 32, 1287 .machine_check = machine_check_4xx, 1288 .platform = "ppc405", 1289 }, 1290 { /* 405GPr */ 1291 .pvr_mask = 0xffff0000, 1292 .pvr_value = 0x50910000, 1293 .cpu_name = "405GPr", 1294 .cpu_features = CPU_FTRS_40X, 1295 .cpu_user_features = PPC_FEATURE_32 | 1296 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1297 .mmu_features = MMU_FTR_TYPE_40x, 1298 .icache_bsize = 32, 1299 .dcache_bsize = 32, 1300 .machine_check = machine_check_4xx, 1301 .platform = "ppc405", 1302 }, 1303 { /* STBx25xx */ 1304 .pvr_mask = 0xffff0000, 1305 .pvr_value = 0x51510000, 1306 .cpu_name = "STBx25xx", 1307 .cpu_features = CPU_FTRS_40X, 1308 .cpu_user_features = PPC_FEATURE_32 | 1309 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1310 .mmu_features = MMU_FTR_TYPE_40x, 1311 .icache_bsize = 32, 1312 .dcache_bsize = 32, 1313 .machine_check = machine_check_4xx, 1314 .platform = "ppc405", 1315 }, 1316 { /* 405LP */ 1317 .pvr_mask = 0xffff0000, 1318 .pvr_value = 0x41F10000, 1319 .cpu_name = "405LP", 1320 .cpu_features = CPU_FTRS_40X, 1321 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1322 .mmu_features = MMU_FTR_TYPE_40x, 1323 .icache_bsize = 32, 1324 .dcache_bsize = 32, 1325 .machine_check = machine_check_4xx, 1326 .platform = "ppc405", 1327 }, 1328 { /* Xilinx Virtex-II Pro */ 1329 .pvr_mask = 0xfffff000, 1330 .pvr_value = 0x20010000, 1331 .cpu_name = "Virtex-II Pro", 1332 .cpu_features = CPU_FTRS_40X, 1333 .cpu_user_features = PPC_FEATURE_32 | 1334 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1335 .mmu_features = MMU_FTR_TYPE_40x, 1336 .icache_bsize = 32, 1337 .dcache_bsize = 32, 1338 .machine_check = machine_check_4xx, 1339 .platform = "ppc405", 1340 }, 1341 { /* Xilinx Virtex-4 FX */ 1342 .pvr_mask = 0xfffff000, 1343 .pvr_value = 0x20011000, 1344 .cpu_name = "Virtex-4 FX", 1345 .cpu_features = CPU_FTRS_40X, 1346 .cpu_user_features = PPC_FEATURE_32 | 1347 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1348 .mmu_features = MMU_FTR_TYPE_40x, 1349 .icache_bsize = 32, 1350 .dcache_bsize = 32, 1351 .machine_check = machine_check_4xx, 1352 .platform = "ppc405", 1353 }, 1354 { /* 405EP */ 1355 .pvr_mask = 0xffff0000, 1356 .pvr_value = 0x51210000, 1357 .cpu_name = "405EP", 1358 .cpu_features = CPU_FTRS_40X, 1359 .cpu_user_features = PPC_FEATURE_32 | 1360 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1361 .mmu_features = MMU_FTR_TYPE_40x, 1362 .icache_bsize = 32, 1363 .dcache_bsize = 32, 1364 .machine_check = machine_check_4xx, 1365 .platform = "ppc405", 1366 }, 1367 { /* 405EX Rev. A/B with Security */ 1368 .pvr_mask = 0xffff000f, 1369 .pvr_value = 0x12910007, 1370 .cpu_name = "405EX Rev. A/B", 1371 .cpu_features = CPU_FTRS_40X, 1372 .cpu_user_features = PPC_FEATURE_32 | 1373 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1374 .mmu_features = MMU_FTR_TYPE_40x, 1375 .icache_bsize = 32, 1376 .dcache_bsize = 32, 1377 .machine_check = machine_check_4xx, 1378 .platform = "ppc405", 1379 }, 1380 { /* 405EX Rev. C without Security */ 1381 .pvr_mask = 0xffff000f, 1382 .pvr_value = 0x1291000d, 1383 .cpu_name = "405EX Rev. C", 1384 .cpu_features = CPU_FTRS_40X, 1385 .cpu_user_features = PPC_FEATURE_32 | 1386 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1387 .mmu_features = MMU_FTR_TYPE_40x, 1388 .icache_bsize = 32, 1389 .dcache_bsize = 32, 1390 .machine_check = machine_check_4xx, 1391 .platform = "ppc405", 1392 }, 1393 { /* 405EX Rev. C with Security */ 1394 .pvr_mask = 0xffff000f, 1395 .pvr_value = 0x1291000f, 1396 .cpu_name = "405EX Rev. C", 1397 .cpu_features = CPU_FTRS_40X, 1398 .cpu_user_features = PPC_FEATURE_32 | 1399 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1400 .mmu_features = MMU_FTR_TYPE_40x, 1401 .icache_bsize = 32, 1402 .dcache_bsize = 32, 1403 .machine_check = machine_check_4xx, 1404 .platform = "ppc405", 1405 }, 1406 { /* 405EX Rev. D without Security */ 1407 .pvr_mask = 0xffff000f, 1408 .pvr_value = 0x12910003, 1409 .cpu_name = "405EX Rev. D", 1410 .cpu_features = CPU_FTRS_40X, 1411 .cpu_user_features = PPC_FEATURE_32 | 1412 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1413 .mmu_features = MMU_FTR_TYPE_40x, 1414 .icache_bsize = 32, 1415 .dcache_bsize = 32, 1416 .machine_check = machine_check_4xx, 1417 .platform = "ppc405", 1418 }, 1419 { /* 405EX Rev. D with Security */ 1420 .pvr_mask = 0xffff000f, 1421 .pvr_value = 0x12910005, 1422 .cpu_name = "405EX Rev. D", 1423 .cpu_features = CPU_FTRS_40X, 1424 .cpu_user_features = PPC_FEATURE_32 | 1425 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1426 .mmu_features = MMU_FTR_TYPE_40x, 1427 .icache_bsize = 32, 1428 .dcache_bsize = 32, 1429 .machine_check = machine_check_4xx, 1430 .platform = "ppc405", 1431 }, 1432 { /* 405EXr Rev. A/B without Security */ 1433 .pvr_mask = 0xffff000f, 1434 .pvr_value = 0x12910001, 1435 .cpu_name = "405EXr Rev. A/B", 1436 .cpu_features = CPU_FTRS_40X, 1437 .cpu_user_features = PPC_FEATURE_32 | 1438 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1439 .mmu_features = MMU_FTR_TYPE_40x, 1440 .icache_bsize = 32, 1441 .dcache_bsize = 32, 1442 .machine_check = machine_check_4xx, 1443 .platform = "ppc405", 1444 }, 1445 { /* 405EXr Rev. C without Security */ 1446 .pvr_mask = 0xffff000f, 1447 .pvr_value = 0x12910009, 1448 .cpu_name = "405EXr Rev. C", 1449 .cpu_features = CPU_FTRS_40X, 1450 .cpu_user_features = PPC_FEATURE_32 | 1451 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1452 .mmu_features = MMU_FTR_TYPE_40x, 1453 .icache_bsize = 32, 1454 .dcache_bsize = 32, 1455 .machine_check = machine_check_4xx, 1456 .platform = "ppc405", 1457 }, 1458 { /* 405EXr Rev. C with Security */ 1459 .pvr_mask = 0xffff000f, 1460 .pvr_value = 0x1291000b, 1461 .cpu_name = "405EXr Rev. C", 1462 .cpu_features = CPU_FTRS_40X, 1463 .cpu_user_features = PPC_FEATURE_32 | 1464 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1465 .mmu_features = MMU_FTR_TYPE_40x, 1466 .icache_bsize = 32, 1467 .dcache_bsize = 32, 1468 .machine_check = machine_check_4xx, 1469 .platform = "ppc405", 1470 }, 1471 { /* 405EXr Rev. D without Security */ 1472 .pvr_mask = 0xffff000f, 1473 .pvr_value = 0x12910000, 1474 .cpu_name = "405EXr Rev. D", 1475 .cpu_features = CPU_FTRS_40X, 1476 .cpu_user_features = PPC_FEATURE_32 | 1477 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1478 .mmu_features = MMU_FTR_TYPE_40x, 1479 .icache_bsize = 32, 1480 .dcache_bsize = 32, 1481 .machine_check = machine_check_4xx, 1482 .platform = "ppc405", 1483 }, 1484 { /* 405EXr Rev. D with Security */ 1485 .pvr_mask = 0xffff000f, 1486 .pvr_value = 0x12910002, 1487 .cpu_name = "405EXr Rev. D", 1488 .cpu_features = CPU_FTRS_40X, 1489 .cpu_user_features = PPC_FEATURE_32 | 1490 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1491 .mmu_features = MMU_FTR_TYPE_40x, 1492 .icache_bsize = 32, 1493 .dcache_bsize = 32, 1494 .machine_check = machine_check_4xx, 1495 .platform = "ppc405", 1496 }, 1497 { 1498 /* 405EZ */ 1499 .pvr_mask = 0xffff0000, 1500 .pvr_value = 0x41510000, 1501 .cpu_name = "405EZ", 1502 .cpu_features = CPU_FTRS_40X, 1503 .cpu_user_features = PPC_FEATURE_32 | 1504 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1505 .mmu_features = MMU_FTR_TYPE_40x, 1506 .icache_bsize = 32, 1507 .dcache_bsize = 32, 1508 .machine_check = machine_check_4xx, 1509 .platform = "ppc405", 1510 }, 1511 { /* default match */ 1512 .pvr_mask = 0x00000000, 1513 .pvr_value = 0x00000000, 1514 .cpu_name = "(generic 40x PPC)", 1515 .cpu_features = CPU_FTRS_40X, 1516 .cpu_user_features = PPC_FEATURE_32 | 1517 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1518 .mmu_features = MMU_FTR_TYPE_40x, 1519 .icache_bsize = 32, 1520 .dcache_bsize = 32, 1521 .machine_check = machine_check_4xx, 1522 .platform = "ppc405", 1523 } 1524 1525#endif /* CONFIG_40x */ 1526#ifdef CONFIG_44x 1527 { 1528 .pvr_mask = 0xf0000fff, 1529 .pvr_value = 0x40000850, 1530 .cpu_name = "440GR Rev. A", 1531 .cpu_features = CPU_FTRS_44X, 1532 .cpu_user_features = COMMON_USER_BOOKE, 1533 .mmu_features = MMU_FTR_TYPE_44x, 1534 .icache_bsize = 32, 1535 .dcache_bsize = 32, 1536 .machine_check = machine_check_4xx, 1537 .platform = "ppc440", 1538 }, 1539 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1540 .pvr_mask = 0xf0000fff, 1541 .pvr_value = 0x40000858, 1542 .cpu_name = "440EP Rev. A", 1543 .cpu_features = CPU_FTRS_44X, 1544 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1545 .mmu_features = MMU_FTR_TYPE_44x, 1546 .icache_bsize = 32, 1547 .dcache_bsize = 32, 1548 .cpu_setup = __setup_cpu_440ep, 1549 .machine_check = machine_check_4xx, 1550 .platform = "ppc440", 1551 }, 1552 { 1553 .pvr_mask = 0xf0000fff, 1554 .pvr_value = 0x400008d3, 1555 .cpu_name = "440GR Rev. B", 1556 .cpu_features = CPU_FTRS_44X, 1557 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1558 .mmu_features = MMU_FTR_TYPE_44x, 1559 .icache_bsize = 32, 1560 .dcache_bsize = 32, 1561 .machine_check = machine_check_4xx, 1562 .platform = "ppc440", 1563 }, 1564 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1565 .pvr_mask = 0xf0000ff7, 1566 .pvr_value = 0x400008d4, 1567 .cpu_name = "440EP Rev. C", 1568 .cpu_features = CPU_FTRS_44X, 1569 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1570 .mmu_features = MMU_FTR_TYPE_44x, 1571 .icache_bsize = 32, 1572 .dcache_bsize = 32, 1573 .cpu_setup = __setup_cpu_440ep, 1574 .machine_check = machine_check_4xx, 1575 .platform = "ppc440", 1576 }, 1577 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1578 .pvr_mask = 0xf0000fff, 1579 .pvr_value = 0x400008db, 1580 .cpu_name = "440EP Rev. B", 1581 .cpu_features = CPU_FTRS_44X, 1582 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1583 .mmu_features = MMU_FTR_TYPE_44x, 1584 .icache_bsize = 32, 1585 .dcache_bsize = 32, 1586 .cpu_setup = __setup_cpu_440ep, 1587 .machine_check = machine_check_4xx, 1588 .platform = "ppc440", 1589 }, 1590 { /* 440GRX */ 1591 .pvr_mask = 0xf0000ffb, 1592 .pvr_value = 0x200008D0, 1593 .cpu_name = "440GRX", 1594 .cpu_features = CPU_FTRS_44X, 1595 .cpu_user_features = COMMON_USER_BOOKE, 1596 .mmu_features = MMU_FTR_TYPE_44x, 1597 .icache_bsize = 32, 1598 .dcache_bsize = 32, 1599 .cpu_setup = __setup_cpu_440grx, 1600 .machine_check = machine_check_440A, 1601 .platform = "ppc440", 1602 }, 1603 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1604 .pvr_mask = 0xf0000ffb, 1605 .pvr_value = 0x200008D8, 1606 .cpu_name = "440EPX", 1607 .cpu_features = CPU_FTRS_44X, 1608 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1609 .mmu_features = MMU_FTR_TYPE_44x, 1610 .icache_bsize = 32, 1611 .dcache_bsize = 32, 1612 .cpu_setup = __setup_cpu_440epx, 1613 .machine_check = machine_check_440A, 1614 .platform = "ppc440", 1615 }, 1616 { /* 440GP Rev. B */ 1617 .pvr_mask = 0xf0000fff, 1618 .pvr_value = 0x40000440, 1619 .cpu_name = "440GP Rev. B", 1620 .cpu_features = CPU_FTRS_44X, 1621 .cpu_user_features = COMMON_USER_BOOKE, 1622 .mmu_features = MMU_FTR_TYPE_44x, 1623 .icache_bsize = 32, 1624 .dcache_bsize = 32, 1625 .machine_check = machine_check_4xx, 1626 .platform = "ppc440gp", 1627 }, 1628 { /* 440GP Rev. C */ 1629 .pvr_mask = 0xf0000fff, 1630 .pvr_value = 0x40000481, 1631 .cpu_name = "440GP Rev. C", 1632 .cpu_features = CPU_FTRS_44X, 1633 .cpu_user_features = COMMON_USER_BOOKE, 1634 .mmu_features = MMU_FTR_TYPE_44x, 1635 .icache_bsize = 32, 1636 .dcache_bsize = 32, 1637 .machine_check = machine_check_4xx, 1638 .platform = "ppc440gp", 1639 }, 1640 { /* 440GX Rev. A */ 1641 .pvr_mask = 0xf0000fff, 1642 .pvr_value = 0x50000850, 1643 .cpu_name = "440GX Rev. A", 1644 .cpu_features = CPU_FTRS_44X, 1645 .cpu_user_features = COMMON_USER_BOOKE, 1646 .mmu_features = MMU_FTR_TYPE_44x, 1647 .icache_bsize = 32, 1648 .dcache_bsize = 32, 1649 .cpu_setup = __setup_cpu_440gx, 1650 .machine_check = machine_check_440A, 1651 .platform = "ppc440", 1652 }, 1653 { /* 440GX Rev. B */ 1654 .pvr_mask = 0xf0000fff, 1655 .pvr_value = 0x50000851, 1656 .cpu_name = "440GX Rev. B", 1657 .cpu_features = CPU_FTRS_44X, 1658 .cpu_user_features = COMMON_USER_BOOKE, 1659 .mmu_features = MMU_FTR_TYPE_44x, 1660 .icache_bsize = 32, 1661 .dcache_bsize = 32, 1662 .cpu_setup = __setup_cpu_440gx, 1663 .machine_check = machine_check_440A, 1664 .platform = "ppc440", 1665 }, 1666 { /* 440GX Rev. C */ 1667 .pvr_mask = 0xf0000fff, 1668 .pvr_value = 0x50000892, 1669 .cpu_name = "440GX Rev. C", 1670 .cpu_features = CPU_FTRS_44X, 1671 .cpu_user_features = COMMON_USER_BOOKE, 1672 .mmu_features = MMU_FTR_TYPE_44x, 1673 .icache_bsize = 32, 1674 .dcache_bsize = 32, 1675 .cpu_setup = __setup_cpu_440gx, 1676 .machine_check = machine_check_440A, 1677 .platform = "ppc440", 1678 }, 1679 { /* 440GX Rev. F */ 1680 .pvr_mask = 0xf0000fff, 1681 .pvr_value = 0x50000894, 1682 .cpu_name = "440GX Rev. F", 1683 .cpu_features = CPU_FTRS_44X, 1684 .cpu_user_features = COMMON_USER_BOOKE, 1685 .mmu_features = MMU_FTR_TYPE_44x, 1686 .icache_bsize = 32, 1687 .dcache_bsize = 32, 1688 .cpu_setup = __setup_cpu_440gx, 1689 .machine_check = machine_check_440A, 1690 .platform = "ppc440", 1691 }, 1692 { /* 440SP Rev. A */ 1693 .pvr_mask = 0xfff00fff, 1694 .pvr_value = 0x53200891, 1695 .cpu_name = "440SP Rev. A", 1696 .cpu_features = CPU_FTRS_44X, 1697 .cpu_user_features = COMMON_USER_BOOKE, 1698 .mmu_features = MMU_FTR_TYPE_44x, 1699 .icache_bsize = 32, 1700 .dcache_bsize = 32, 1701 .machine_check = machine_check_4xx, 1702 .platform = "ppc440", 1703 }, 1704 { /* 440SPe Rev. A */ 1705 .pvr_mask = 0xfff00fff, 1706 .pvr_value = 0x53400890, 1707 .cpu_name = "440SPe Rev. A", 1708 .cpu_features = CPU_FTRS_44X, 1709 .cpu_user_features = COMMON_USER_BOOKE, 1710 .mmu_features = MMU_FTR_TYPE_44x, 1711 .icache_bsize = 32, 1712 .dcache_bsize = 32, 1713 .cpu_setup = __setup_cpu_440spe, 1714 .machine_check = machine_check_440A, 1715 .platform = "ppc440", 1716 }, 1717 { /* 440SPe Rev. B */ 1718 .pvr_mask = 0xfff00fff, 1719 .pvr_value = 0x53400891, 1720 .cpu_name = "440SPe Rev. B", 1721 .cpu_features = CPU_FTRS_44X, 1722 .cpu_user_features = COMMON_USER_BOOKE, 1723 .mmu_features = MMU_FTR_TYPE_44x, 1724 .icache_bsize = 32, 1725 .dcache_bsize = 32, 1726 .cpu_setup = __setup_cpu_440spe, 1727 .machine_check = machine_check_440A, 1728 .platform = "ppc440", 1729 }, 1730 { /* 440 in Xilinx Virtex-5 FXT */ 1731 .pvr_mask = 0xfffffff0, 1732 .pvr_value = 0x7ff21910, 1733 .cpu_name = "440 in Virtex-5 FXT", 1734 .cpu_features = CPU_FTRS_44X, 1735 .cpu_user_features = COMMON_USER_BOOKE, 1736 .mmu_features = MMU_FTR_TYPE_44x, 1737 .icache_bsize = 32, 1738 .dcache_bsize = 32, 1739 .cpu_setup = __setup_cpu_440x5, 1740 .machine_check = machine_check_440A, 1741 .platform = "ppc440", 1742 }, 1743 { /* 460EX */ 1744 .pvr_mask = 0xffff0006, 1745 .pvr_value = 0x13020002, 1746 .cpu_name = "460EX", 1747 .cpu_features = CPU_FTRS_440x6, 1748 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1749 .mmu_features = MMU_FTR_TYPE_44x, 1750 .icache_bsize = 32, 1751 .dcache_bsize = 32, 1752 .cpu_setup = __setup_cpu_460ex, 1753 .machine_check = machine_check_440A, 1754 .platform = "ppc440", 1755 }, 1756 { /* 460EX Rev B */ 1757 .pvr_mask = 0xffff0007, 1758 .pvr_value = 0x13020004, 1759 .cpu_name = "460EX Rev. B", 1760 .cpu_features = CPU_FTRS_440x6, 1761 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1762 .mmu_features = MMU_FTR_TYPE_44x, 1763 .icache_bsize = 32, 1764 .dcache_bsize = 32, 1765 .cpu_setup = __setup_cpu_460ex, 1766 .machine_check = machine_check_440A, 1767 .platform = "ppc440", 1768 }, 1769 { /* 460GT */ 1770 .pvr_mask = 0xffff0006, 1771 .pvr_value = 0x13020000, 1772 .cpu_name = "460GT", 1773 .cpu_features = CPU_FTRS_440x6, 1774 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1775 .mmu_features = MMU_FTR_TYPE_44x, 1776 .icache_bsize = 32, 1777 .dcache_bsize = 32, 1778 .cpu_setup = __setup_cpu_460gt, 1779 .machine_check = machine_check_440A, 1780 .platform = "ppc440", 1781 }, 1782 { /* 460GT Rev B */ 1783 .pvr_mask = 0xffff0007, 1784 .pvr_value = 0x13020005, 1785 .cpu_name = "460GT Rev. B", 1786 .cpu_features = CPU_FTRS_440x6, 1787 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1788 .mmu_features = MMU_FTR_TYPE_44x, 1789 .icache_bsize = 32, 1790 .dcache_bsize = 32, 1791 .cpu_setup = __setup_cpu_460gt, 1792 .machine_check = machine_check_440A, 1793 .platform = "ppc440", 1794 }, 1795 { /* 460SX */ 1796 .pvr_mask = 0xffffff00, 1797 .pvr_value = 0x13541800, 1798 .cpu_name = "460SX", 1799 .cpu_features = CPU_FTRS_44X, 1800 .cpu_user_features = COMMON_USER_BOOKE, 1801 .mmu_features = MMU_FTR_TYPE_44x, 1802 .icache_bsize = 32, 1803 .dcache_bsize = 32, 1804 .cpu_setup = __setup_cpu_460sx, 1805 .machine_check = machine_check_440A, 1806 .platform = "ppc440", 1807 }, 1808 { /* 476 core */ 1809 .pvr_mask = 0xffff0000, 1810 .pvr_value = 0x11a50000, 1811 .cpu_name = "476", 1812 .cpu_features = CPU_FTRS_47X, 1813 .cpu_user_features = COMMON_USER_BOOKE | 1814 PPC_FEATURE_HAS_FPU, 1815 .mmu_features = MMU_FTR_TYPE_47x | 1816 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1817 .icache_bsize = 32, 1818 .dcache_bsize = 128, 1819 .machine_check = machine_check_47x, 1820 .platform = "ppc470", 1821 }, 1822 { /* 476 iss */ 1823 .pvr_mask = 0xffff0000, 1824 .pvr_value = 0x00050000, 1825 .cpu_name = "476", 1826 .cpu_features = CPU_FTRS_47X, 1827 .cpu_user_features = COMMON_USER_BOOKE | 1828 PPC_FEATURE_HAS_FPU, 1829 .mmu_features = MMU_FTR_TYPE_47x | 1830 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1831 .icache_bsize = 32, 1832 .dcache_bsize = 128, 1833 .machine_check = machine_check_47x, 1834 .platform = "ppc470", 1835 }, 1836 { /* default match */ 1837 .pvr_mask = 0x00000000, 1838 .pvr_value = 0x00000000, 1839 .cpu_name = "(generic 44x PPC)", 1840 .cpu_features = CPU_FTRS_44X, 1841 .cpu_user_features = COMMON_USER_BOOKE, 1842 .mmu_features = MMU_FTR_TYPE_44x, 1843 .icache_bsize = 32, 1844 .dcache_bsize = 32, 1845 .machine_check = machine_check_4xx, 1846 .platform = "ppc440", 1847 } 1848#endif /* CONFIG_44x */ 1849#ifdef CONFIG_E200 1850 { /* e200z5 */ 1851 .pvr_mask = 0xfff00000, 1852 .pvr_value = 0x81000000, 1853 .cpu_name = "e200z5", 1854 .cpu_features = CPU_FTRS_E200, 1855 .cpu_user_features = COMMON_USER_BOOKE | 1856 PPC_FEATURE_HAS_EFP_SINGLE | 1857 PPC_FEATURE_UNIFIED_CACHE, 1858 .mmu_features = MMU_FTR_TYPE_FSL_E, 1859 .dcache_bsize = 32, 1860 .machine_check = machine_check_e200, 1861 .platform = "ppc5554", 1862 }, 1863 { /* e200z6 */ 1864 .pvr_mask = 0xfff00000, 1865 .pvr_value = 0x81100000, 1866 .cpu_name = "e200z6", 1867 .cpu_features = CPU_FTRS_E200, 1868 .cpu_user_features = COMMON_USER_BOOKE | 1869 PPC_FEATURE_HAS_SPE_COMP | 1870 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1871 PPC_FEATURE_UNIFIED_CACHE, 1872 .mmu_features = MMU_FTR_TYPE_FSL_E, 1873 .dcache_bsize = 32, 1874 .machine_check = machine_check_e200, 1875 .platform = "ppc5554", 1876 }, 1877 { /* default match */ 1878 .pvr_mask = 0x00000000, 1879 .pvr_value = 0x00000000, 1880 .cpu_name = "(generic E200 PPC)", 1881 .cpu_features = CPU_FTRS_E200, 1882 .cpu_user_features = COMMON_USER_BOOKE | 1883 PPC_FEATURE_HAS_EFP_SINGLE | 1884 PPC_FEATURE_UNIFIED_CACHE, 1885 .mmu_features = MMU_FTR_TYPE_FSL_E, 1886 .dcache_bsize = 32, 1887 .cpu_setup = __setup_cpu_e200, 1888 .machine_check = machine_check_e200, 1889 .platform = "ppc5554", 1890 } 1891#endif /* CONFIG_E200 */ 1892#ifdef CONFIG_E500 1893 { /* e500 */ 1894 .pvr_mask = 0xffff0000, 1895 .pvr_value = 0x80200000, 1896 .cpu_name = "e500", 1897 .cpu_features = CPU_FTRS_E500, 1898 .cpu_user_features = COMMON_USER_BOOKE | 1899 PPC_FEATURE_HAS_SPE_COMP | 1900 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1901 .mmu_features = MMU_FTR_TYPE_FSL_E, 1902 .icache_bsize = 32, 1903 .dcache_bsize = 32, 1904 .num_pmcs = 4, 1905 .oprofile_cpu_type = "ppc/e500", 1906 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1907 .cpu_setup = __setup_cpu_e500v1, 1908 .machine_check = machine_check_e500, 1909 .platform = "ppc8540", 1910 }, 1911 { /* e500v2 */ 1912 .pvr_mask = 0xffff0000, 1913 .pvr_value = 0x80210000, 1914 .cpu_name = "e500v2", 1915 .cpu_features = CPU_FTRS_E500_2, 1916 .cpu_user_features = COMMON_USER_BOOKE | 1917 PPC_FEATURE_HAS_SPE_COMP | 1918 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1919 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1920 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1921 .icache_bsize = 32, 1922 .dcache_bsize = 32, 1923 .num_pmcs = 4, 1924 .oprofile_cpu_type = "ppc/e500", 1925 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1926 .cpu_setup = __setup_cpu_e500v2, 1927 .machine_check = machine_check_e500, 1928 .platform = "ppc8548", 1929 }, 1930 { /* e500mc */ 1931 .pvr_mask = 0xffff0000, 1932 .pvr_value = 0x80230000, 1933 .cpu_name = "e500mc", 1934 .cpu_features = CPU_FTRS_E500MC, 1935 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1936 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1937 MMU_FTR_USE_TLBILX, 1938 .icache_bsize = 64, 1939 .dcache_bsize = 64, 1940 .num_pmcs = 4, 1941 .oprofile_cpu_type = "ppc/e500mc", 1942 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1943 .cpu_setup = __setup_cpu_e500mc, 1944 .machine_check = machine_check_e500mc, 1945 .platform = "ppce500mc", 1946 }, 1947 { /* default match */ 1948 .pvr_mask = 0x00000000, 1949 .pvr_value = 0x00000000, 1950 .cpu_name = "(generic E500 PPC)", 1951 .cpu_features = CPU_FTRS_E500, 1952 .cpu_user_features = COMMON_USER_BOOKE | 1953 PPC_FEATURE_HAS_SPE_COMP | 1954 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1955 .mmu_features = MMU_FTR_TYPE_FSL_E, 1956 .icache_bsize = 32, 1957 .dcache_bsize = 32, 1958 .machine_check = machine_check_e500, 1959 .platform = "powerpc", 1960 } 1961#endif /* CONFIG_E500 */ 1962#endif /* CONFIG_PPC32 */ 1963 1964#ifdef CONFIG_PPC_BOOK3E_64 1965 { /* This is a default entry to get going, to be replaced by 1966 * a real one at some stage 1967 */ 1968#define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \ 1969 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \ 1970 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) 1971 .pvr_mask = 0x00000000, 1972 .pvr_value = 0x00000000, 1973 .cpu_name = "Book3E", 1974 .cpu_features = CPU_FTRS_BASE_BOOK3E, 1975 .cpu_user_features = COMMON_USER_PPC64, 1976 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | 1977 MMU_FTR_USE_TLBIVAX_BCAST | 1978 MMU_FTR_LOCK_BCAST_INVAL, 1979 .icache_bsize = 64, 1980 .dcache_bsize = 64, 1981 .num_pmcs = 0, 1982 .machine_check = machine_check_generic, 1983 .platform = "power6", 1984 }, 1985#endif 1986}; 1987 1988static struct cpu_spec the_cpu_spec; 1989 1990static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s) 1991{ 1992 struct cpu_spec *t = &the_cpu_spec; 1993 struct cpu_spec old; 1994 1995 t = PTRRELOC(t); 1996 old = *t; 1997 1998 /* Copy everything, then do fixups */ 1999 *t = *s; 2000 2001 /* 2002 * If we are overriding a previous value derived from the real 2003 * PVR with a new value obtained using a logical PVR value, 2004 * don't modify the performance monitor fields. 2005 */ 2006 if (old.num_pmcs && !s->num_pmcs) { 2007 t->num_pmcs = old.num_pmcs; 2008 t->pmc_type = old.pmc_type; 2009 t->oprofile_type = old.oprofile_type; 2010 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2011 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2012 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2013 2014 /* 2015 * If we have passed through this logic once before and 2016 * have pulled the default case because the real PVR was 2017 * not found inside cpu_specs[], then we are possibly 2018 * running in compatibility mode. In that case, let the 2019 * oprofiler know which set of compatibility counters to 2020 * pull from by making sure the oprofile_cpu_type string 2021 * is set to that of compatibility mode. If the 2022 * oprofile_cpu_type already has a value, then we are 2023 * possibly overriding a real PVR with a logical one, 2024 * and, in that case, keep the current value for 2025 * oprofile_cpu_type. 2026 */ 2027 if (old.oprofile_cpu_type != NULL) { 2028 t->oprofile_cpu_type = old.oprofile_cpu_type; 2029 t->oprofile_type = old.oprofile_type; 2030 } 2031 } 2032 2033 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2034 2035 /* 2036 * Set the base platform string once; assumes 2037 * we're called with real pvr first. 2038 */ 2039 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2040 *PTRRELOC(&powerpc_base_platform) = t->platform; 2041 2042#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2043 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2044 * that processor. I will consolidate that at a later time, for now, 2045 * just use #ifdef. We also don't need to PTRRELOC the function 2046 * pointer on ppc64 and booke as we are running at 0 in real mode 2047 * on ppc64 and reloc_offset is always 0 on booke. 2048 */ 2049 if (s->cpu_setup) { 2050 s->cpu_setup(offset, s); 2051 } 2052#endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2053} 2054 2055struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2056{ 2057 struct cpu_spec *s = cpu_specs; 2058 int i; 2059 2060 s = PTRRELOC(s); 2061 2062 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2063 if ((pvr & s->pvr_mask) == s->pvr_value) { 2064 setup_cpu_spec(offset, s); 2065 return s; 2066 } 2067 } 2068 2069 BUG(); 2070 2071 return NULL; 2072} 2073