1/* 2 * This program is free software; you can redistribute it and/or modify it 3 * under the terms of the GNU General Public License as published by the 4 * Free Software Foundation; either version 2 of the License, or (at your 5 * option) any later version. 6 * 7 * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org) 8 */ 9#include <linux/kernel.h> 10#include <linux/mm.h> 11#include <linux/bootmem.h> 12#include <linux/init.h> 13#include <linux/types.h> 14#include <linux/pci.h> 15 16 17 18/* 19 * Indicate whether we respect the PCI setup left by the firmware. 20 * 21 * Make this long-lived so that we know when shutting down 22 * whether we probed only or not. 23 */ 24int pci_probe_only; 25 26#define PCI_ASSIGN_ALL_BUSSES 1 27 28unsigned int pci_probe = PCI_ASSIGN_ALL_BUSSES; 29 30/* 31 * The PCI controller list. 32 */ 33 34static struct pci_controller *hose_head, **hose_tail = &hose_head; 35 36unsigned long PCIBIOS_MIN_IO; 37unsigned long PCIBIOS_MIN_MEM; 38 39static int pci_initialized; 40 41/* 42 * We need to avoid collisions with `mirrored' VGA ports 43 * and other strange ISA hardware, so we always want the 44 * addresses to be allocated in the 0x000-0x0ff region 45 * modulo 0x400. 46 * 47 * Why? Because some silly external IO cards only decode 48 * the low 10 bits of the IO address. The 0x00-0xff region 49 * is reserved for motherboard devices that decode all 16 50 * bits, so it's ok to allocate at, say, 0x2800-0x28ff, 51 * but we want to try to avoid allocating at 0x2900-0x2bff 52 * which might have be mirrored at 0x0100-0x03ff.. 53 */ 54resource_size_t 55pcibios_align_resource(void *data, const struct resource *res, 56 resource_size_t size, resource_size_t align) 57{ 58 struct pci_dev *dev = data; 59 struct pci_controller *hose = dev->sysdata; 60 resource_size_t start = res->start; 61 62 if (res->flags & IORESOURCE_IO) { 63 /* Make sure we start at our min on all hoses */ 64 if (start < PCIBIOS_MIN_IO + hose->io_resource->start) 65 start = PCIBIOS_MIN_IO + hose->io_resource->start; 66 67 /* 68 * Put everything into 0x00-0xff region modulo 0x400 69 */ 70 if (start & 0x300) 71 start = (start + 0x3ff) & ~0x3ff; 72 } else if (res->flags & IORESOURCE_MEM) { 73 /* Make sure we start at our min on all hoses */ 74 if (start < PCIBIOS_MIN_MEM + hose->mem_resource->start) 75 start = PCIBIOS_MIN_MEM + hose->mem_resource->start; 76 } 77 78 return start; 79} 80 81static void __devinit pcibios_scanbus(struct pci_controller *hose) 82{ 83 static int next_busno; 84 static int need_domain_info; 85 struct pci_bus *bus; 86 87 if (!hose->iommu) 88 PCI_DMA_BUS_IS_PHYS = 1; 89 90 if (hose->get_busno && pci_probe_only) 91 next_busno = (*hose->get_busno)(); 92 93 bus = pci_scan_bus(next_busno, hose->pci_ops, hose); 94 hose->bus = bus; 95 96 need_domain_info = need_domain_info || hose->index; 97 hose->need_domain_info = need_domain_info; 98 if (bus) { 99 next_busno = bus->subordinate + 1; 100 /* Don't allow 8-bit bus number overflow inside the hose - 101 reserve some space for bridges. */ 102 if (next_busno > 224) { 103 next_busno = 0; 104 need_domain_info = 1; 105 } 106 107 if (!pci_probe_only) { 108 pci_bus_size_bridges(bus); 109 pci_bus_assign_resources(bus); 110 pci_enable_bridges(bus); 111 } 112 } 113} 114 115static DEFINE_MUTEX(pci_scan_mutex); 116 117void __devinit register_pci_controller(struct pci_controller *hose) 118{ 119 if (request_resource(&iomem_resource, hose->mem_resource) < 0) 120 goto out; 121 if (request_resource(&ioport_resource, hose->io_resource) < 0) { 122 release_resource(hose->mem_resource); 123 goto out; 124 } 125 126 *hose_tail = hose; 127 hose_tail = &hose->next; 128 129 /* 130 * Do not panic here but later - this might hapen before console init. 131 */ 132 if (!hose->io_map_base) { 133 printk(KERN_WARNING 134 "registering PCI controller with io_map_base unset\n"); 135 } 136 137 /* 138 * Scan the bus if it is register after the PCI subsystem 139 * initialization. 140 */ 141 if (pci_initialized) { 142 mutex_lock(&pci_scan_mutex); 143 pcibios_scanbus(hose); 144 mutex_unlock(&pci_scan_mutex); 145 } 146 147 return; 148 149out: 150 printk(KERN_WARNING 151 "Skipping PCI bus scan due to resource conflict\n"); 152} 153 154extern int __init pcibios_init(void); 155 156subsys_initcall(pcibios_init); 157 158 159/* 160 * If we set up a device for bus mastering, we need to check the latency 161 * timer as certain crappy BIOSes forget to set it properly. 162 */ 163static unsigned int pcibios_max_latency = 255; 164 165void pcibios_set_master(struct pci_dev *dev) 166{ 167 u8 lat; 168 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); 169 if (lat < 16) 170 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; 171 else if (lat > pcibios_max_latency) 172 lat = pcibios_max_latency; 173 else 174 return; 175 printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", 176 pci_name(dev), lat); 177 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); 178} 179 180unsigned int pcibios_assign_all_busses(void) 181{ 182 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0; 183} 184 185 186void __init 187pcibios_update_irq(struct pci_dev *dev, int irq) 188{ 189 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 190} 191 192void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 193 struct resource *res) 194{ 195 struct pci_controller *hose = (struct pci_controller *)dev->sysdata; 196 unsigned long offset = 0; 197 198 if (res->flags & IORESOURCE_IO) 199 offset = hose->io_offset; 200 else if (res->flags & IORESOURCE_MEM) 201 offset = hose->mem_offset; 202 203 region->start = res->start - offset; 204 region->end = res->end - offset; 205} 206 207void __devinit 208pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 209 struct pci_bus_region *region) 210{ 211 struct pci_controller *hose = (struct pci_controller *)dev->sysdata; 212 unsigned long offset = 0; 213 214 if (res->flags & IORESOURCE_IO) 215 offset = hose->io_offset; 216 else if (res->flags & IORESOURCE_MEM) 217 offset = hose->mem_offset; 218 219 res->start = region->start + offset; 220 res->end = region->end + offset; 221} 222 223#ifdef CONFIG_HOTPLUG 224EXPORT_SYMBOL(pcibios_resource_to_bus); 225EXPORT_SYMBOL(pcibios_bus_to_resource); 226EXPORT_SYMBOL(PCIBIOS_MIN_IO); 227EXPORT_SYMBOL(PCIBIOS_MIN_MEM); 228#endif 229 230int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 231 enum pci_mmap_state mmap_state, int write_combine) 232{ 233 unsigned long prot; 234 235 /* 236 * I/O space can be accessed via normal processor loads and stores on 237 * this platform but for now we elect not to do this and portable 238 * drivers should not do this anyway. 239 */ 240 if (mmap_state == pci_mmap_io) 241 return -EINVAL; 242 243 /* 244 * Ignore write-combine; for now only return uncached mappings. 245 */ 246 prot = pgprot_val(vma->vm_page_prot); 247 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED; 248 vma->vm_page_prot = __pgprot(prot); 249 250 return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, 251 vma->vm_end - vma->vm_start, vma->vm_page_prot); 252} 253 254char * (*pcibios_plat_setup)(char *str) __devinitdata; 255