1/* 2 * Douglas Leung, douglas@mips.com 3 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 4 * 5 * ######################################################################## 6 * 7 * This program is free software; you can distribute it and/or modify it 8 * under the terms of the GNU General Public License (Version 2) as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 * for more details. 15 * 16 * You should have received a copy of the GNU General Public License along 17 * with this program; if not, write to the Free Software Foundation, Inc., 18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 19 * 20 * ######################################################################## 21 * 22 * Defines for the SEAD3 interrupt controller. 23 * 24 */ 25#ifndef _MIPS_SEAD3INT_H 26#define _MIPS_SEAD3INT_H 27 28/* 29 * SEAD3 GIC's address space definitions 30 */ 31#define GIC_BASE_ADDR 0x1b1c0000 32#define GIC_ADDRSPACE_SZ (128 * 1024) 33 34/* GIC's Nomenclature for Core Interrupt Pins on the SEAD3 */ 35#define GIC_CPU_INT0 0 /* Core Interrupt 2 */ 36#define GIC_CPU_INT1 1 /* . */ 37#define GIC_CPU_INT2 2 /* . */ 38#define GIC_CPU_INT3 3 /* . */ 39#define GIC_CPU_INT4 4 /* . */ 40#define GIC_CPU_INT5 5 /* Core Interrupt 7 */ 41 42/* SEAD3 GIC local interrupts */ 43#define GIC_INT_TMR (GIC_CPU_INT5) 44#define GIC_INT_PERFCTR (GIC_CPU_INT5) 45 46/* SEAD3 GIC constants */ 47/* Add 2 to convert non-eic hw int # to eic vector # */ 48#define GIC_CPU_TO_VEC_OFFSET (2) 49 50/* GIC constants */ 51/* If we map an intr to pin X, GIC will actually generate vector X+1 */ 52#define GIC_PIN_TO_VEC_OFFSET (1) 53 54#define GIC_EXT_INTR(x) x 55 56/* Dummy data */ 57#define X 0xdead 58 59/* External Interrupts used for IPI */ 60/* Currently linux don't know about GIC => GIC base must be same as what Linux is using */ 61#define MIPS_GIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + 0) 62 63#ifndef __ASSEMBLY__ 64extern void sead3int_init(void); 65#endif 66 67#endif /* !(_MIPS_SEAD3INT_H) */ 68