1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994-1996 Linus Torvalds & authors 7 * 8 * Copied from i386; many of the especially older MIPS or ISA-based platforms 9 * are basically identical. Using this file probably implies i8259 PIC 10 * support in a system but the very least interrupt numbers 0 - 15 need to 11 * be put aside for legacy devices. 12 */ 13#ifndef __ASM_MACH_GENERIC_IDE_H 14#define __ASM_MACH_GENERIC_IDE_H 15 16#ifdef __KERNEL__ 17 18#include <linux/pci.h> 19#include <linux/stddef.h> 20#include <asm/processor.h> 21 22/* MIPS port and memory-mapped I/O string operations. */ 23static inline void __ide_flush_prologue(void) 24{ 25#ifdef CONFIG_SMP 26 if (cpu_has_dc_aliases) 27 preempt_disable(); 28#endif 29} 30 31static inline void __ide_flush_epilogue(void) 32{ 33#ifdef CONFIG_SMP 34 if (cpu_has_dc_aliases) 35 preempt_enable(); 36#endif 37} 38 39static inline void __ide_flush_dcache_range(unsigned long addr, unsigned long size) 40{ 41 if (cpu_has_dc_aliases) { 42 unsigned long end = addr + size; 43 44 while (addr < end) { 45 local_flush_data_cache_page((void *)addr); 46 addr += PAGE_SIZE; 47 } 48 } 49} 50 51static inline void __ide_insw(unsigned long port, void *addr, 52 unsigned int count) 53{ 54 __ide_flush_prologue(); 55 insw(port, addr, count); 56 __ide_flush_dcache_range((unsigned long)addr, count * 2); 57 __ide_flush_epilogue(); 58} 59 60static inline void __ide_insl(unsigned long port, void *addr, unsigned int count) 61{ 62 __ide_flush_prologue(); 63 insl(port, addr, count); 64 __ide_flush_dcache_range((unsigned long)addr, count * 4); 65 __ide_flush_epilogue(); 66} 67 68static inline void __ide_outsw(unsigned long port, const void *addr, 69 unsigned long count) 70{ 71 __ide_flush_prologue(); 72 outsw(port, addr, count); 73 __ide_flush_dcache_range((unsigned long)addr, count * 2); 74 __ide_flush_epilogue(); 75} 76 77static inline void __ide_outsl(unsigned long port, const void *addr, 78 unsigned long count) 79{ 80 __ide_flush_prologue(); 81 outsl(port, addr, count); 82 __ide_flush_dcache_range((unsigned long)addr, count * 4); 83 __ide_flush_epilogue(); 84} 85 86static inline void __ide_mm_insw(void __iomem *port, void *addr, u32 count) 87{ 88 __ide_flush_prologue(); 89 readsw(port, addr, count); 90 __ide_flush_dcache_range((unsigned long)addr, count * 2); 91 __ide_flush_epilogue(); 92} 93 94static inline void __ide_mm_insl(void __iomem *port, void *addr, u32 count) 95{ 96 __ide_flush_prologue(); 97 readsl(port, addr, count); 98 __ide_flush_dcache_range((unsigned long)addr, count * 4); 99 __ide_flush_epilogue(); 100} 101 102static inline void __ide_mm_outsw(void __iomem *port, void *addr, u32 count) 103{ 104 __ide_flush_prologue(); 105 writesw(port, addr, count); 106 __ide_flush_dcache_range((unsigned long)addr, count * 2); 107 __ide_flush_epilogue(); 108} 109 110static inline void __ide_mm_outsl(void __iomem * port, void *addr, u32 count) 111{ 112 __ide_flush_prologue(); 113 writesl(port, addr, count); 114 __ide_flush_dcache_range((unsigned long)addr, count * 4); 115 __ide_flush_epilogue(); 116} 117 118/* ide_insw calls insw, not __ide_insw. Why? */ 119#undef insw 120#undef insl 121#undef outsw 122#undef outsl 123#define insw(port, addr, count) __ide_insw(port, addr, count) 124#define insl(port, addr, count) __ide_insl(port, addr, count) 125#define outsw(port, addr, count) __ide_outsw(port, addr, count) 126#define outsl(port, addr, count) __ide_outsl(port, addr, count) 127 128#endif /* __KERNEL__ */ 129 130#endif /* __ASM_MACH_GENERIC_IDE_H */ 131