1/* 2 * This program is free software; you can distribute it and/or modify it 3 * under the terms of the GNU General Public License (Version 2) as 4 * published by the Free Software Foundation. 5 * 6 * This program is distributed in the hope it will be useful, but WITHOUT 7 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 8 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 9 * for more details. 10 * 11 * You should have received a copy of the GNU General Public License along 12 * with this program; if not, write to the Free Software Foundation, Inc., 13 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 14 * 15 * Further private data for which no space exists in mips_fpu_struct. 16 * This should be subsumed into the mips_fpu_struct structure as 17 * defined in processor.h as soon as the absurd wired absolute assembler 18 * offsets become dynamic at compile time. 19 * 20 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 21 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 22 */ 23#ifndef _ASM_FPU_EMULATOR_H 24#define _ASM_FPU_EMULATOR_H 25 26#include <asm/break.h> 27#include <asm/inst.h> 28#include <asm/local.h> 29 30#ifdef CONFIG_DEBUG_FS 31 32struct mips_fpu_emulator_stats { 33 local_t emulated; 34 local_t loads; 35 local_t stores; 36 local_t cp1ops; 37 local_t cp1xops; 38 local_t errors; 39}; 40 41DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats); 42 43#define MIPS_FPU_EMU_INC_STATS(M) \ 44do { \ 45 preempt_disable(); \ 46 __local_inc(&__get_cpu_var(fpuemustats).M); \ 47 preempt_enable(); \ 48} while (0) 49 50#else 51#define MIPS_FPU_EMU_INC_STATS(M) do { } while (0) 52#endif /* CONFIG_DEBUG_FS */ 53 54extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, 55 struct mips_fpu_struct *ctx, int has_fpu, 56 void *__user *fault_addr); 57int process_fpemu_return(int sig, void __user *fault_addr); 58 59extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir, 60 unsigned long cpc); 61extern int do_dsemulret(struct pt_regs *xcp); 62 63int mm_isBranchInstr(struct pt_regs *regs, struct decoded_instn dec_insn, 64 unsigned long *contpc); 65 66/* 67 * Instruction inserted following the badinst to further tag the sequence 68 */ 69#define BD_COOKIE 0x0000bd36 /* tne $0, $0 with baggage */ 70 71/* 72 * Break instruction with special math emu break code set 73 */ 74#define BREAK_MATH (0x0000000d | (BRK_MEMU << 16)) 75#define MM_BREAK_MATH (0x00000007 | (MM_BRK_MEMU << 16)) 76 77#endif /* _ASM_FPU_EMULATOR_H */ 78