1/* irq-mb93093.c: MB93093 FPGA interrupt handling 2 * 3 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. 4 * Written by David Howells (dhowells@redhat.com) 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12#include <linux/ptrace.h> 13#include <linux/errno.h> 14#include <linux/signal.h> 15#include <linux/sched.h> 16#include <linux/ioport.h> 17#include <linux/interrupt.h> 18#include <linux/init.h> 19#include <linux/irq.h> 20#include <linux/bitops.h> 21 22#include <asm/io.h> 23#include <asm/system.h> 24#include <asm/delay.h> 25#include <asm/irq.h> 26#include <asm/irc-regs.h> 27 28#define __reg16(ADDR) (*(volatile unsigned short *)(__region_CS2 + (ADDR))) 29 30#define __get_IMR() ({ __reg16(0x0a); }) 31#define __set_IMR(M) do { __reg16(0x0a) = (M); wmb(); } while(0) 32#define __get_IFR() ({ __reg16(0x02); }) 33#define __clr_IFR(M) do { __reg16(0x02) = ~(M); wmb(); } while(0) 34 35/* 36 * off-CPU FPGA PIC operations 37 */ 38static void frv_fpga_mask(unsigned int irq) 39{ 40 uint16_t imr = __get_IMR(); 41 42 imr |= 1 << (irq - IRQ_BASE_FPGA); 43 __set_IMR(imr); 44} 45 46static void frv_fpga_ack(unsigned int irq) 47{ 48 __clr_IFR(1 << (irq - IRQ_BASE_FPGA)); 49} 50 51static void frv_fpga_mask_ack(unsigned int irq) 52{ 53 uint16_t imr = __get_IMR(); 54 55 imr |= 1 << (irq - IRQ_BASE_FPGA); 56 __set_IMR(imr); 57 58 __clr_IFR(1 << (irq - IRQ_BASE_FPGA)); 59} 60 61static void frv_fpga_unmask(unsigned int irq) 62{ 63 uint16_t imr = __get_IMR(); 64 65 imr &= ~(1 << (irq - IRQ_BASE_FPGA)); 66 67 __set_IMR(imr); 68} 69 70static struct irq_chip frv_fpga_pic = { 71 .name = "mb93093", 72 .ack = frv_fpga_ack, 73 .mask = frv_fpga_mask, 74 .mask_ack = frv_fpga_mask_ack, 75 .unmask = frv_fpga_unmask, 76 .end = frv_fpga_end, 77}; 78 79/* 80 * FPGA PIC interrupt handler 81 */ 82static irqreturn_t fpga_interrupt(int irq, void *_mask) 83{ 84 uint16_t imr, mask = (unsigned long) _mask; 85 86 imr = __get_IMR(); 87 mask = mask & ~imr & __get_IFR(); 88 89 /* poll all the triggered IRQs */ 90 while (mask) { 91 int irq; 92 93 asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask)); 94 irq = 31 - irq; 95 mask &= ~(1 << irq); 96 97 generic_irq_handle(IRQ_BASE_FPGA + irq); 98 } 99 100 return IRQ_HANDLED; 101} 102 103/* 104 * define an interrupt action for each FPGA PIC output 105 * - use dev_id to indicate the FPGA PIC input to output mappings 106 */ 107static struct irqaction fpga_irq[1] = { 108 [0] = { 109 .handler = fpga_interrupt, 110 .flags = IRQF_DISABLED, 111 .name = "fpga.0", 112 .dev_id = (void *) 0x0700UL, 113 } 114}; 115 116/* 117 * initialise the motherboard FPGA's PIC 118 */ 119void __init fpga_init(void) 120{ 121 int irq; 122 123 /* all PIC inputs are all set to be edge triggered */ 124 __set_IMR(0x0700); 125 __clr_IFR(0x0000); 126 127 for (irq = IRQ_BASE_FPGA + 8; irq <= IRQ_BASE_FPGA + 10; irq++) 128 set_irq_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq); 129 130 /* the FPGA drives external IRQ input #2 on the CPU PIC */ 131 setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[0]); 132} 133