1/* head-uc-fr451.S: FR451 uc-linux specific bits of initialisation 2 * 3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. 4 * Written by David Howells (dhowells@redhat.com) 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12#include <linux/init.h> 13#include <linux/threads.h> 14#include <linux/linkage.h> 15#include <asm/ptrace.h> 16#include <asm/page.h> 17#include <asm/spr-regs.h> 18#include <asm/mb86943a.h> 19#include "head.inc" 20 21 22#define __400_DBR0 0xfe000e00 23#define __400_DBR1 0xfe000e08 24#define __400_DBR2 0xfe000e10 25#define __400_DBR3 0xfe000e18 26#define __400_DAM0 0xfe000f00 27#define __400_DAM1 0xfe000f08 28#define __400_DAM2 0xfe000f10 29#define __400_DAM3 0xfe000f18 30#define __400_LGCR 0xfe000010 31#define __400_LCR 0xfe000100 32#define __400_LSBR 0xfe000c00 33 34 __INIT 35 .balign 4 36 37############################################################################### 38# 39# set the protection map with the I/DAMPR registers 40# 41# ENTRY: EXIT: 42# GR25 SDRAM size [saved] 43# GR26 &__head_reference [saved] 44# GR30 LED address [saved] 45# 46############################################################################### 47 .globl __head_fr451_set_protection 48__head_fr451_set_protection: 49 movsg lr,gr27 50 51 movgs gr0,dampr10 52 movgs gr0,damlr10 53 movgs gr0,dampr9 54 movgs gr0,damlr9 55 movgs gr0,dampr8 56 movgs gr0,damlr8 57 58 # set the I/O region protection registers for FR401/3/5 59 sethi.p %hi(__region_IO),gr5 60 setlo %lo(__region_IO),gr5 61 sethi.p %hi(0x1fffffff),gr7 62 setlo %lo(0x1fffffff),gr7 63 ori gr5,#xAMPRx_SS_512Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr5 64 movgs gr5,dampr11 ; General I/O tile 65 movgs gr7,damlr11 66 67 # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible 68 # - start with the highest numbered registers 69 sethi.p %hi(__kernel_image_end),gr8 70 setlo %lo(__kernel_image_end),gr8 71 sethi.p %hi(32768),gr4 ; allow for a maximal allocator bitmap 72 setlo %lo(32768),gr4 73 add gr8,gr4,gr8 74 sethi.p %hi(1024*2048-1),gr4 ; round up to nearest 2MiB 75 setlo %lo(1024*2048-1),gr4 76 add.p gr8,gr4,gr8 77 not gr4,gr4 78 and gr8,gr4,gr8 79 80 sethi.p %hi(__page_offset),gr9 81 setlo %lo(__page_offset),gr9 82 add gr9,gr25,gr9 83 84 sethi.p %hi(0xffffc000),gr11 85 setlo %lo(0xffffc000),gr11 86 87 # GR8 = base of uncovered RAM 88 # GR9 = top of uncovered RAM 89 # GR11 = xAMLR mask 90 LEDS 0x3317 91 call __head_split_region 92 movgs gr4,iampr7 93 movgs gr6,iamlr7 94 movgs gr5,dampr7 95 movgs gr7,damlr7 96 97 LEDS 0x3316 98 call __head_split_region 99 movgs gr4,iampr6 100 movgs gr6,iamlr6 101 movgs gr5,dampr6 102 movgs gr7,damlr6 103 104 LEDS 0x3315 105 call __head_split_region 106 movgs gr4,iampr5 107 movgs gr6,iamlr5 108 movgs gr5,dampr5 109 movgs gr7,damlr5 110 111 LEDS 0x3314 112 call __head_split_region 113 movgs gr4,iampr4 114 movgs gr6,iamlr4 115 movgs gr5,dampr4 116 movgs gr7,damlr4 117 118 LEDS 0x3313 119 call __head_split_region 120 movgs gr4,iampr3 121 movgs gr6,iamlr3 122 movgs gr5,dampr3 123 movgs gr7,damlr3 124 125 LEDS 0x3312 126 call __head_split_region 127 movgs gr4,iampr2 128 movgs gr6,iamlr2 129 movgs gr5,dampr2 130 movgs gr7,damlr2 131 132 LEDS 0x3311 133 call __head_split_region 134 movgs gr4,iampr1 135 movgs gr6,iamlr1 136 movgs gr5,dampr1 137 movgs gr7,damlr1 138 139 # cover kernel core image with kernel-only segment 140 LEDS 0x3310 141 sethi.p %hi(__page_offset),gr8 142 setlo %lo(__page_offset),gr8 143 call __head_split_region 144 145#ifdef CONFIG_PROTECT_KERNEL 146 ori.p gr4,#xAMPRx_S_KERNEL,gr4 147 ori gr5,#xAMPRx_S_KERNEL,gr5 148#endif 149 150 movgs gr4,iampr0 151 movgs gr6,iamlr0 152 movgs gr5,dampr0 153 movgs gr7,damlr0 154 155 # start in TLB context 0 with no page tables 156 movgs gr0,cxnr 157 movgs gr0,ttbr 158 159 # the FR451 also has an extra trap base register 160 movsg tbr,gr4 161 movgs gr4,btbr 162 163 # turn on the timers as appropriate 164 movgs gr0,timerh 165 movgs gr0,timerl 166 movgs gr0,timerd 167 movsg hsr0,gr4 168 sethi.p %hi(HSR0_ETMI),gr5 169 setlo %lo(HSR0_ETMI),gr5 170 or gr4,gr5,gr4 171 movgs gr4,hsr0 172 173 LEDS 0x3300 174 jmpl @(gr27,gr0) 175