1/* 2 * misc.c 3 * 4 * This is a collection of several routines from gzip-1.0.3 5 * adapted for Linux. 6 * 7 * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994 8 * puts by Nick Holloway 1993, better puts by Martin Mares 1995 9 * adaptation for Linux/CRIS Axis Communications AB, 1999 10 * 11 */ 12 13/* where the piggybacked kernel image expects itself to live. 14 * it is the same address we use when we network load an uncompressed 15 * image into DRAM, and it is the address the kernel is linked to live 16 * at by vmlinux.lds.S 17 */ 18 19#define KERNEL_LOAD_ADR 0x40004000 20 21#include <linux/types.h> 22 23#ifdef CONFIG_ETRAX_ARCH_V32 24#include <hwregs/reg_rdwr.h> 25#include <hwregs/reg_map.h> 26#include <hwregs/ser_defs.h> 27#include <hwregs/pinmux_defs.h> 28#ifdef CONFIG_CRIS_MACH_ARTPEC3 29#include <hwregs/clkgen_defs.h> 30#endif 31#else 32#include <arch/svinto.h> 33#endif 34 35/* 36 * gzip declarations 37 */ 38 39#define OF(args) args 40#define STATIC static 41 42void *memset(void *s, int c, size_t n); 43void *memcpy(void *__dest, __const void *__src, size_t __n); 44 45#define memzero(s, n) memset((s), 0, (n)) 46 47typedef unsigned char uch; 48typedef unsigned short ush; 49typedef unsigned long ulg; 50 51#define WSIZE 0x8000 /* Window size must be at least 32k, */ 52 /* and a power of two */ 53 54static uch *inbuf; /* input buffer */ 55static uch window[WSIZE]; /* Sliding window buffer */ 56 57unsigned inptr = 0; /* index of next byte to be processed in inbuf 58 * After decompression it will contain the 59 * compressed size, and head.S will read it. 60 */ 61 62static unsigned outcnt = 0; /* bytes in output buffer */ 63 64/* gzip flag byte */ 65#define ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */ 66#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */ 67#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */ 68#define ORIG_NAME 0x08 /* bit 3 set: original file name present */ 69#define COMMENT 0x10 /* bit 4 set: file comment present */ 70#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */ 71#define RESERVED 0xC0 /* bit 6,7: reserved */ 72 73#define get_byte() (inbuf[inptr++]) 74 75/* Diagnostic functions */ 76#ifdef DEBUG 77# define Assert(cond, msg) do { \ 78 if (!(cond)) \ 79 error(msg); \ 80 } while (0) 81# define Trace(x) fprintf x 82# define Tracev(x) do { \ 83 if (verbose) \ 84 fprintf x; \ 85 } while (0) 86# define Tracevv(x) do { \ 87 if (verbose > 1) \ 88 fprintf x; \ 89 } while (0) 90# define Tracec(c, x) do { \ 91 if (verbose && (c)) \ 92 fprintf x; \ 93 } while (0) 94# define Tracecv(c, x) do { \ 95 if (verbose > 1 && (c)) \ 96 fprintf x; \ 97 } while (0) 98#else 99# define Assert(cond, msg) 100# define Trace(x) 101# define Tracev(x) 102# define Tracevv(x) 103# define Tracec(c, x) 104# define Tracecv(c, x) 105#endif 106 107static void flush_window(void); 108static void error(char *m); 109static void aputs(const char *s); 110 111extern char *input_data; /* lives in head.S */ 112 113static long bytes_out; 114static uch *output_data; 115static unsigned long output_ptr; 116 117/* the "heap" is put directly after the BSS ends, at end */ 118 119extern int _end; 120static long free_mem_ptr = (long)&_end; 121static long free_mem_end_ptr; 122 123#include "../../../../../lib/inflate.c" 124 125/* decompressor info and error messages to serial console */ 126 127#ifdef CONFIG_ETRAX_ARCH_V32 128static inline void serout(const char *s, reg_scope_instances regi_ser) 129{ 130 reg_ser_rs_stat_din rs; 131 reg_ser_rw_dout dout = {.data = *s}; 132 133 do { 134 rs = REG_RD(ser, regi_ser, rs_stat_din); 135 } 136 while (!rs.tr_rdy);/* Wait for transceiver. */ 137 138 REG_WR(ser, regi_ser, rw_dout, dout); 139} 140#define SEROUT(S, N) \ 141 do { \ 142 serout(S, regi_ser ## N); \ 143 s++; \ 144 } while (0) 145#else 146#define SEROUT(S, N) do { \ 147 while (!(*R_SERIAL ## N ## _STATUS & (1 << 5))) \ 148 ; \ 149 *R_SERIAL ## N ## _TR_DATA = *s++; \ 150 } while (0) 151#endif 152 153static void aputs(const char *s) 154{ 155#ifndef CONFIG_ETRAX_DEBUG_PORT_NULL 156 while (*s) { 157#ifdef CONFIG_ETRAX_DEBUG_PORT0 158 SEROUT(s, 0); 159#endif 160#ifdef CONFIG_ETRAX_DEBUG_PORT1 161 SEROUT(s, 1); 162#endif 163#ifdef CONFIG_ETRAX_DEBUG_PORT2 164 SEROUT(s, 2); 165#endif 166#ifdef CONFIG_ETRAX_DEBUG_PORT3 167 SEROUT(s, 3); 168#endif 169 } 170#endif /* CONFIG_ETRAX_DEBUG_PORT_NULL */ 171} 172 173void *memset(void *s, int c, size_t n) 174{ 175 int i; 176 char *ss = (char*)s; 177 178 for (i=0;i<n;i++) ss[i] = c; 179 180 return s; 181} 182 183void *memcpy(void *__dest, __const void *__src, size_t __n) 184{ 185 int i; 186 char *d = (char *)__dest, *s = (char *)__src; 187 188 for (i = 0; i < __n; i++) 189 d[i] = s[i]; 190 191 return __dest; 192} 193 194/* =========================================================================== 195 * Write the output window window[0..outcnt-1] and update crc and bytes_out. 196 * (Used for the decompressed data only.) 197 */ 198 199static void flush_window(void) 200{ 201 ulg c = crc; /* temporary variable */ 202 unsigned n; 203 uch *in, *out, ch; 204 205 in = window; 206 out = &output_data[output_ptr]; 207 for (n = 0; n < outcnt; n++) { 208 ch = *out = *in; 209 out++; 210 in++; 211 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8); 212 } 213 crc = c; 214 bytes_out += (ulg)outcnt; 215 output_ptr += (ulg)outcnt; 216 outcnt = 0; 217} 218 219static void error(char *x) 220{ 221 aputs("\n\n"); 222 aputs(x); 223 aputs("\n\n -- System halted\n"); 224 225 while(1); /* Halt */ 226} 227 228void setup_normal_output_buffer(void) 229{ 230 output_data = (char *)KERNEL_LOAD_ADR; 231} 232 233#ifdef CONFIG_ETRAX_ARCH_V32 234static inline void serial_setup(reg_scope_instances regi_ser) 235{ 236 reg_ser_rw_xoff xoff; 237 reg_ser_rw_tr_ctrl tr_ctrl; 238 reg_ser_rw_rec_ctrl rec_ctrl; 239 reg_ser_rw_tr_baud_div tr_baud; 240 reg_ser_rw_rec_baud_div rec_baud; 241 242 /* Turn off XOFF. */ 243 xoff = REG_RD(ser, regi_ser, rw_xoff); 244 245 xoff.chr = 0; 246 xoff.automatic = regk_ser_no; 247 248 REG_WR(ser, regi_ser, rw_xoff, xoff); 249 250 /* Set baudrate and stopbits. */ 251 tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl); 252 rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl); 253 tr_baud = REG_RD(ser, regi_ser, rw_tr_baud_div); 254 rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div); 255 256 tr_ctrl.stop_bits = 1; /* 2 stop bits. */ 257 tr_ctrl.en = 1; /* enable transmitter */ 258 rec_ctrl.en = 1; /* enabler receiver */ 259 260 /* 261 * The baudrate setup used to be a bit fishy, but now transmitter and 262 * receiver are both set to the intended baud rate, 115200. 263 * The magic value is 29.493 MHz. 264 */ 265 tr_ctrl.base_freq = regk_ser_f29_493; 266 rec_ctrl.base_freq = regk_ser_f29_493; 267 tr_baud.div = (29493000 / 8) / 115200; 268 rec_baud.div = (29493000 / 8) / 115200; 269 270 REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl); 271 REG_WR(ser, regi_ser, rw_tr_baud_div, tr_baud); 272 REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl); 273 REG_WR(ser, regi_ser, rw_rec_baud_div, rec_baud); 274} 275#endif 276 277void decompress_kernel(void) 278{ 279 char revision; 280 char compile_rev; 281 282#ifdef CONFIG_ETRAX_ARCH_V32 283 /* Need at least a CRISv32 to run. */ 284 compile_rev = 32; 285#if defined(CONFIG_ETRAX_DEBUG_PORT1) || defined(CONFIG_ETRAX_DEBUG_PORT2) || \ 286 defined(CONFIG_ETRAX_DEBUG_PORT3) 287 reg_pinmux_rw_hwprot hwprot; 288 289#ifdef CONFIG_CRIS_MACH_ARTPEC3 290 reg_clkgen_rw_clk_ctrl clk_ctrl; 291 292 /* Enable corresponding clock region when serial 1..3 selected */ 293 294 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); 295 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes; 296 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl); 297#endif 298 299 /* pinmux setup for ports 1..3 */ 300 hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot); 301#endif 302 303 304#ifdef CONFIG_ETRAX_DEBUG_PORT0 305 serial_setup(regi_ser0); 306#endif 307#ifdef CONFIG_ETRAX_DEBUG_PORT1 308 hwprot.ser1 = regk_pinmux_yes; 309 serial_setup(regi_ser1); 310#endif 311#ifdef CONFIG_ETRAX_DEBUG_PORT2 312 hwprot.ser2 = regk_pinmux_yes; 313 serial_setup(regi_ser2); 314#endif 315#ifdef CONFIG_ETRAX_DEBUG_PORT3 316 hwprot.ser3 = regk_pinmux_yes; 317 serial_setup(regi_ser3); 318#endif 319#if defined(CONFIG_ETRAX_DEBUG_PORT1) || defined(CONFIG_ETRAX_DEBUG_PORT2) || \ 320 defined(CONFIG_ETRAX_DEBUG_PORT3) 321 REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot); 322#endif 323 324 /* input_data is set in head.S */ 325 inbuf = input_data; 326#else /* CRISv10 */ 327 /* Need at least a crisv10 to run. */ 328 compile_rev = 10; 329 330 /* input_data is set in head.S */ 331 inbuf = input_data; 332 333#ifdef CONFIG_ETRAX_DEBUG_PORT0 334 *R_SERIAL0_XOFF = 0; 335 *R_SERIAL0_BAUD = 0x99; 336 *R_SERIAL0_TR_CTRL = 0x40; 337#endif 338#ifdef CONFIG_ETRAX_DEBUG_PORT1 339 *R_SERIAL1_XOFF = 0; 340 *R_SERIAL1_BAUD = 0x99; 341 *R_SERIAL1_TR_CTRL = 0x40; 342#endif 343#ifdef CONFIG_ETRAX_DEBUG_PORT2 344 *R_GEN_CONFIG = 0x08; 345 *R_SERIAL2_XOFF = 0; 346 *R_SERIAL2_BAUD = 0x99; 347 *R_SERIAL2_TR_CTRL = 0x40; 348#endif 349#ifdef CONFIG_ETRAX_DEBUG_PORT3 350 *R_GEN_CONFIG = 0x100; 351 *R_SERIAL3_XOFF = 0; 352 *R_SERIAL3_BAUD = 0x99; 353 *R_SERIAL3_TR_CTRL = 0x40; 354#endif 355#endif 356 357 setup_normal_output_buffer(); 358 359 makecrc(); 360 361 __asm__ volatile ("move $vr,%0" : "=rm" (revision)); 362 if (revision < compile_rev) { 363#ifdef CONFIG_ETRAX_ARCH_V32 364 aputs("You need at least ETRAX FS to run Linux 2.6/crisv32\n"); 365#else 366 aputs("You need an ETRAX 100LX to run linux 2.6/crisv10\n"); 367#endif 368 while(1); 369 } 370 371 aputs("Uncompressing Linux...\n"); 372 gunzip(); 373 aputs("Done. Now booting the kernel\n"); 374} 375