1/* 2 * Copyright 2004-2009 Analog Devices Inc. 3 * 2008-2009 Bluetechnix 4 * 2005 National ICT Australia (NICTA) 5 * Aidan Williams <aidan@nicta.com.au> 6 * 7 * Licensed under the GPL-2 or later. 8 */ 9 10#include <linux/device.h> 11#include <linux/platform_device.h> 12#include <linux/mtd/mtd.h> 13#include <linux/mtd/partitions.h> 14#include <linux/mtd/physmap.h> 15#include <linux/spi/spi.h> 16#include <linux/spi/flash.h> 17#include <linux/etherdevice.h> 18#include <linux/i2c.h> 19#include <linux/irq.h> 20#include <linux/interrupt.h> 21#include <linux/usb/musb.h> 22#include <asm/dma.h> 23#include <asm/bfin5xx_spi.h> 24#include <asm/reboot.h> 25#include <asm/nand.h> 26#include <asm/portmux.h> 27#include <asm/dpmc.h> 28#include <linux/spi/ad7877.h> 29 30/* 31 * Name the Board for the /proc/cpuinfo 32 */ 33const char bfin_board_name[] = "Bluetechnix CM-BF527"; 34 35/* 36 * Driver needs to know address, irq and flag pin. 37 */ 38 39#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) 40#include <linux/usb/isp1760.h> 41static struct resource bfin_isp1760_resources[] = { 42 [0] = { 43 .start = 0x203C0000, 44 .end = 0x203C0000 + 0x000fffff, 45 .flags = IORESOURCE_MEM, 46 }, 47 [1] = { 48 .start = IRQ_PF7, 49 .end = IRQ_PF7, 50 .flags = IORESOURCE_IRQ, 51 }, 52}; 53 54static struct isp1760_platform_data isp1760_priv = { 55 .is_isp1761 = 0, 56 .bus_width_16 = 1, 57 .port1_otg = 0, 58 .analog_oc = 0, 59 .dack_polarity_high = 0, 60 .dreq_polarity_high = 0, 61}; 62 63static struct platform_device bfin_isp1760_device = { 64 .name = "isp1760", 65 .id = 0, 66 .dev = { 67 .platform_data = &isp1760_priv, 68 }, 69 .num_resources = ARRAY_SIZE(bfin_isp1760_resources), 70 .resource = bfin_isp1760_resources, 71}; 72#endif 73 74#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) 75static struct resource musb_resources[] = { 76 [0] = { 77 .start = 0xffc03800, 78 .end = 0xffc03cff, 79 .flags = IORESOURCE_MEM, 80 }, 81 [1] = { /* general IRQ */ 82 .start = IRQ_USB_INT0, 83 .end = IRQ_USB_INT0, 84 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 85 }, 86 [2] = { /* DMA IRQ */ 87 .start = IRQ_USB_DMA, 88 .end = IRQ_USB_DMA, 89 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 90 }, 91}; 92 93static struct musb_hdrc_config musb_config = { 94 .multipoint = 0, 95 .dyn_fifo = 0, 96 .soft_con = 1, 97 .dma = 1, 98 .num_eps = 8, 99 .dma_channels = 8, 100 .gpio_vrsel = GPIO_PF11, 101 /* Some custom boards need to be active low, just set it to "0" 102 * if it is the case. 103 */ 104 .gpio_vrsel_active = 1, 105}; 106 107static struct musb_hdrc_platform_data musb_plat = { 108#if defined(CONFIG_USB_MUSB_OTG) 109 .mode = MUSB_OTG, 110#elif defined(CONFIG_USB_MUSB_HDRC_HCD) 111 .mode = MUSB_HOST, 112#elif defined(CONFIG_USB_GADGET_MUSB_HDRC) 113 .mode = MUSB_PERIPHERAL, 114#endif 115 .config = &musb_config, 116}; 117 118static u64 musb_dmamask = ~(u32)0; 119 120static struct platform_device musb_device = { 121 .name = "musb_hdrc", 122 .id = 0, 123 .dev = { 124 .dma_mask = &musb_dmamask, 125 .coherent_dma_mask = 0xffffffff, 126 .platform_data = &musb_plat, 127 }, 128 .num_resources = ARRAY_SIZE(musb_resources), 129 .resource = musb_resources, 130}; 131#endif 132 133#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 134static struct mtd_partition partition_info[] = { 135 { 136 .name = "linux kernel(nand)", 137 .offset = 0, 138 .size = 4 * 1024 * 1024, 139 }, 140 { 141 .name = "file system(nand)", 142 .offset = MTDPART_OFS_APPEND, 143 .size = MTDPART_SIZ_FULL, 144 }, 145}; 146 147static struct bf5xx_nand_platform bf5xx_nand_platform = { 148 .data_width = NFC_NWIDTH_8, 149 .partitions = partition_info, 150 .nr_partitions = ARRAY_SIZE(partition_info), 151 .rd_dly = 3, 152 .wr_dly = 3, 153}; 154 155static struct resource bf5xx_nand_resources[] = { 156 { 157 .start = NFC_CTL, 158 .end = NFC_DATA_RD + 2, 159 .flags = IORESOURCE_MEM, 160 }, 161 { 162 .start = CH_NFC, 163 .end = CH_NFC, 164 .flags = IORESOURCE_IRQ, 165 }, 166}; 167 168static struct platform_device bf5xx_nand_device = { 169 .name = "bf5xx-nand", 170 .id = 0, 171 .num_resources = ARRAY_SIZE(bf5xx_nand_resources), 172 .resource = bf5xx_nand_resources, 173 .dev = { 174 .platform_data = &bf5xx_nand_platform, 175 }, 176}; 177#endif 178 179#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 180static struct resource bfin_pcmcia_cf_resources[] = { 181 { 182 .start = 0x20310000, /* IO PORT */ 183 .end = 0x20312000, 184 .flags = IORESOURCE_MEM, 185 }, { 186 .start = 0x20311000, /* Attribute Memory */ 187 .end = 0x20311FFF, 188 .flags = IORESOURCE_MEM, 189 }, { 190 .start = IRQ_PF4, 191 .end = IRQ_PF4, 192 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, 193 }, { 194 .start = 6, /* Card Detect PF6 */ 195 .end = 6, 196 .flags = IORESOURCE_IRQ, 197 }, 198}; 199 200static struct platform_device bfin_pcmcia_cf_device = { 201 .name = "bfin_cf_pcmcia", 202 .id = -1, 203 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), 204 .resource = bfin_pcmcia_cf_resources, 205}; 206#endif 207 208#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 209static struct platform_device rtc_device = { 210 .name = "rtc-bfin", 211 .id = -1, 212}; 213#endif 214 215#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 216#include <linux/smc91x.h> 217 218static struct smc91x_platdata smc91x_info = { 219 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 220 .leda = RPC_LED_100_10, 221 .ledb = RPC_LED_TX_RX, 222}; 223 224static struct resource smc91x_resources[] = { 225 { 226 .name = "smc91x-regs", 227 .start = 0x20300300, 228 .end = 0x20300300 + 16, 229 .flags = IORESOURCE_MEM, 230 }, { 231 232 .start = IRQ_PF7, 233 .end = IRQ_PF7, 234 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 235 }, 236}; 237static struct platform_device smc91x_device = { 238 .name = "smc91x", 239 .id = 0, 240 .num_resources = ARRAY_SIZE(smc91x_resources), 241 .resource = smc91x_resources, 242 .dev = { 243 .platform_data = &smc91x_info, 244 }, 245}; 246#endif 247 248#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) 249static struct resource dm9000_resources[] = { 250 [0] = { 251 .start = 0x203FB800, 252 .end = 0x203FB800 + 1, 253 .flags = IORESOURCE_MEM, 254 }, 255 [1] = { 256 .start = 0x203FB804, 257 .end = 0x203FB804 + 1, 258 .flags = IORESOURCE_MEM, 259 }, 260 [2] = { 261 .start = IRQ_PF9, 262 .end = IRQ_PF9, 263 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), 264 }, 265}; 266 267static struct platform_device dm9000_device = { 268 .name = "dm9000", 269 .id = -1, 270 .num_resources = ARRAY_SIZE(dm9000_resources), 271 .resource = dm9000_resources, 272}; 273#endif 274 275#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 276static struct platform_device bfin_mii_bus = { 277 .name = "bfin_mii_bus", 278}; 279 280static struct platform_device bfin_mac_device = { 281 .name = "bfin_mac", 282 .dev.platform_data = &bfin_mii_bus, 283}; 284#endif 285 286#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) 287static struct resource net2272_bfin_resources[] = { 288 { 289 .start = 0x20300000, 290 .end = 0x20300000 + 0x100, 291 .flags = IORESOURCE_MEM, 292 }, { 293 .start = IRQ_PF7, 294 .end = IRQ_PF7, 295 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 296 }, 297}; 298 299static struct platform_device net2272_bfin_device = { 300 .name = "net2272", 301 .id = -1, 302 .num_resources = ARRAY_SIZE(net2272_bfin_resources), 303 .resource = net2272_bfin_resources, 304}; 305#endif 306 307#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 308static struct mtd_partition bfin_spi_flash_partitions[] = { 309 { 310 .name = "bootloader(spi)", 311 .size = 0x00040000, 312 .offset = 0, 313 .mask_flags = MTD_CAP_ROM 314 }, { 315 .name = "linux kernel(spi)", 316 .size = MTDPART_SIZ_FULL, 317 .offset = MTDPART_OFS_APPEND, 318 } 319}; 320 321static struct flash_platform_data bfin_spi_flash_data = { 322 .name = "m25p80", 323 .parts = bfin_spi_flash_partitions, 324 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), 325 .type = "m25p16", 326}; 327 328/* SPI flash chip (m25p64) */ 329static struct bfin5xx_spi_chip spi_flash_chip_info = { 330 .enable_dma = 0, /* use dma transfer with this chip*/ 331 .bits_per_word = 8, 332}; 333#endif 334 335#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) 336/* SPI ADC chip */ 337static struct bfin5xx_spi_chip spi_adc_chip_info = { 338 .enable_dma = 1, /* use dma transfer with this chip*/ 339 .bits_per_word = 16, 340}; 341#endif 342 343#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE) 344static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 345 .enable_dma = 0, 346 .bits_per_word = 16, 347}; 348#endif 349 350#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 351static struct bfin5xx_spi_chip mmc_spi_chip_info = { 352 .enable_dma = 0, 353 .bits_per_word = 8, 354}; 355#endif 356 357#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 358static struct bfin5xx_spi_chip spi_ad7877_chip_info = { 359 .enable_dma = 0, 360 .bits_per_word = 16, 361}; 362 363static const struct ad7877_platform_data bfin_ad7877_ts_info = { 364 .model = 7877, 365 .vref_delay_usecs = 50, /* internal, no capacitor */ 366 .x_plate_ohms = 419, 367 .y_plate_ohms = 486, 368 .pressure_max = 1000, 369 .pressure_min = 0, 370 .stopacq_polarity = 1, 371 .first_conversion_delay = 3, 372 .acquisition_time = 1, 373 .averaging = 1, 374 .pen_down_acc_interval = 1, 375}; 376#endif 377 378#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) && \ 379 defined(CONFIG_SND_SOC_WM8731_SPI) 380static struct bfin5xx_spi_chip spi_wm8731_chip_info = { 381 .enable_dma = 0, 382 .bits_per_word = 16, 383}; 384#endif 385 386#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 387static struct bfin5xx_spi_chip spidev_chip_info = { 388 .enable_dma = 0, 389 .bits_per_word = 8, 390}; 391#endif 392 393static struct spi_board_info bfin_spi_board_info[] __initdata = { 394#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 395 { 396 /* the modalias must be the same as spi device driver name */ 397 .modalias = "m25p80", /* Name of spi_driver for this device */ 398 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 399 .bus_num = 0, /* Framework bus number */ 400 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ 401 .platform_data = &bfin_spi_flash_data, 402 .controller_data = &spi_flash_chip_info, 403 .mode = SPI_MODE_3, 404 }, 405#endif 406 407#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) 408 { 409 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 410 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 411 .bus_num = 0, /* Framework bus number */ 412 .chip_select = 1, /* Framework chip select. */ 413 .platform_data = NULL, /* No spi_driver specific config */ 414 .controller_data = &spi_adc_chip_info, 415 }, 416#endif 417 418#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE) 419 { 420 .modalias = "ad1836", 421 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 422 .bus_num = 0, 423 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 424 .controller_data = &ad1836_spi_chip_info, 425 }, 426#endif 427#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 428 { 429 .modalias = "mmc_spi", 430 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 431 .bus_num = 0, 432 .chip_select = 5, 433 .controller_data = &mmc_spi_chip_info, 434 .mode = SPI_MODE_3, 435 }, 436#endif 437#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 438 { 439 .modalias = "ad7877", 440 .platform_data = &bfin_ad7877_ts_info, 441 .irq = IRQ_PF8, 442 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 443 .bus_num = 0, 444 .chip_select = 2, 445 .controller_data = &spi_ad7877_chip_info, 446 }, 447#endif 448#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) && \ 449 defined(CONFIG_SND_SOC_WM8731_SPI) 450 { 451 .modalias = "wm8731", 452 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 453 .bus_num = 0, 454 .chip_select = 5, 455 .controller_data = &spi_wm8731_chip_info, 456 .mode = SPI_MODE_0, 457 }, 458#endif 459#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 460 { 461 .modalias = "spidev", 462 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 463 .bus_num = 0, 464 .chip_select = 1, 465 .controller_data = &spidev_chip_info, 466 }, 467#endif 468}; 469 470#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 471/* SPI controller data */ 472static struct bfin5xx_spi_master bfin_spi0_info = { 473 .num_chipselect = 8, 474 .enable_dma = 1, /* master has the ability to do dma transfer */ 475 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, 476}; 477 478/* SPI (0) */ 479static struct resource bfin_spi0_resource[] = { 480 [0] = { 481 .start = SPI0_REGBASE, 482 .end = SPI0_REGBASE + 0xFF, 483 .flags = IORESOURCE_MEM, 484 }, 485 [1] = { 486 .start = CH_SPI, 487 .end = CH_SPI, 488 .flags = IORESOURCE_DMA, 489 }, 490 [2] = { 491 .start = IRQ_SPI, 492 .end = IRQ_SPI, 493 .flags = IORESOURCE_IRQ, 494 }, 495}; 496 497static struct platform_device bfin_spi0_device = { 498 .name = "bfin-spi", 499 .id = 0, /* Bus number */ 500 .num_resources = ARRAY_SIZE(bfin_spi0_resource), 501 .resource = bfin_spi0_resource, 502 .dev = { 503 .platform_data = &bfin_spi0_info, /* Passed to driver */ 504 }, 505}; 506#endif /* spi master and devices */ 507 508#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE) 509static struct mtd_partition cm_partitions[] = { 510 { 511 .name = "bootloader(nor)", 512 .size = 0x40000, 513 .offset = 0, 514 }, { 515 .name = "linux kernel(nor)", 516 .size = 0x100000, 517 .offset = MTDPART_OFS_APPEND, 518 }, { 519 .name = "file system(nor)", 520 .size = MTDPART_SIZ_FULL, 521 .offset = MTDPART_OFS_APPEND, 522 } 523}; 524 525static struct physmap_flash_data cm_flash_data = { 526 .width = 2, 527 .parts = cm_partitions, 528 .nr_parts = ARRAY_SIZE(cm_partitions), 529}; 530 531static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 }; 532 533static struct resource cm_flash_resource[] = { 534 { 535 .name = "cfi_probe", 536 .start = 0x20000000, 537 .end = 0x201fffff, 538 .flags = IORESOURCE_MEM, 539 }, { 540 .start = (unsigned long)cm_flash_gpios, 541 .end = ARRAY_SIZE(cm_flash_gpios), 542 .flags = IORESOURCE_IRQ, 543 } 544}; 545 546static struct platform_device cm_flash_device = { 547 .name = "gpio-addr-flash", 548 .id = 0, 549 .dev = { 550 .platform_data = &cm_flash_data, 551 }, 552 .num_resources = ARRAY_SIZE(cm_flash_resource), 553 .resource = cm_flash_resource, 554}; 555#endif 556 557#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 558#ifdef CONFIG_SERIAL_BFIN_UART0 559static struct resource bfin_uart0_resources[] = { 560 { 561 .start = UART0_THR, 562 .end = UART0_GCTL+2, 563 .flags = IORESOURCE_MEM, 564 }, 565 { 566 .start = IRQ_UART0_RX, 567 .end = IRQ_UART0_RX+1, 568 .flags = IORESOURCE_IRQ, 569 }, 570 { 571 .start = IRQ_UART0_ERROR, 572 .end = IRQ_UART0_ERROR, 573 .flags = IORESOURCE_IRQ, 574 }, 575 { 576 .start = CH_UART0_TX, 577 .end = CH_UART0_TX, 578 .flags = IORESOURCE_DMA, 579 }, 580 { 581 .start = CH_UART0_RX, 582 .end = CH_UART0_RX, 583 .flags = IORESOURCE_DMA, 584 }, 585}; 586 587unsigned short bfin_uart0_peripherals[] = { 588 P_UART0_TX, P_UART0_RX, 0 589}; 590 591static struct platform_device bfin_uart0_device = { 592 .name = "bfin-uart", 593 .id = 0, 594 .num_resources = ARRAY_SIZE(bfin_uart0_resources), 595 .resource = bfin_uart0_resources, 596 .dev = { 597 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ 598 }, 599}; 600#endif 601#ifdef CONFIG_SERIAL_BFIN_UART1 602static struct resource bfin_uart1_resources[] = { 603 { 604 .start = UART1_THR, 605 .end = UART1_GCTL+2, 606 .flags = IORESOURCE_MEM, 607 }, 608 { 609 .start = IRQ_UART1_RX, 610 .end = IRQ_UART1_RX+1, 611 .flags = IORESOURCE_IRQ, 612 }, 613 { 614 .start = IRQ_UART1_ERROR, 615 .end = IRQ_UART1_ERROR, 616 .flags = IORESOURCE_IRQ, 617 }, 618 { 619 .start = CH_UART1_TX, 620 .end = CH_UART1_TX, 621 .flags = IORESOURCE_DMA, 622 }, 623 { 624 .start = CH_UART1_RX, 625 .end = CH_UART1_RX, 626 .flags = IORESOURCE_DMA, 627 }, 628#ifdef CONFIG_BFIN_UART1_CTSRTS 629 { /* CTS pin */ 630 .start = GPIO_PF9, 631 .end = GPIO_PF9, 632 .flags = IORESOURCE_IO, 633 }, 634 { /* RTS pin */ 635 .start = GPIO_PF10, 636 .end = GPIO_PF10, 637 .flags = IORESOURCE_IO, 638 }, 639#endif 640}; 641 642unsigned short bfin_uart1_peripherals[] = { 643 P_UART1_TX, P_UART1_RX, 0 644}; 645 646static struct platform_device bfin_uart1_device = { 647 .name = "bfin-uart", 648 .id = 1, 649 .num_resources = ARRAY_SIZE(bfin_uart1_resources), 650 .resource = bfin_uart1_resources, 651 .dev = { 652 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */ 653 }, 654}; 655#endif 656#endif 657 658#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 659#ifdef CONFIG_BFIN_SIR0 660static struct resource bfin_sir0_resources[] = { 661 { 662 .start = 0xFFC00400, 663 .end = 0xFFC004FF, 664 .flags = IORESOURCE_MEM, 665 }, 666 { 667 .start = IRQ_UART0_RX, 668 .end = IRQ_UART0_RX+1, 669 .flags = IORESOURCE_IRQ, 670 }, 671 { 672 .start = CH_UART0_RX, 673 .end = CH_UART0_RX+1, 674 .flags = IORESOURCE_DMA, 675 }, 676}; 677 678static struct platform_device bfin_sir0_device = { 679 .name = "bfin_sir", 680 .id = 0, 681 .num_resources = ARRAY_SIZE(bfin_sir0_resources), 682 .resource = bfin_sir0_resources, 683}; 684#endif 685#ifdef CONFIG_BFIN_SIR1 686static struct resource bfin_sir1_resources[] = { 687 { 688 .start = 0xFFC02000, 689 .end = 0xFFC020FF, 690 .flags = IORESOURCE_MEM, 691 }, 692 { 693 .start = IRQ_UART1_RX, 694 .end = IRQ_UART1_RX+1, 695 .flags = IORESOURCE_IRQ, 696 }, 697 { 698 .start = CH_UART1_RX, 699 .end = CH_UART1_RX+1, 700 .flags = IORESOURCE_DMA, 701 }, 702}; 703 704static struct platform_device bfin_sir1_device = { 705 .name = "bfin_sir", 706 .id = 1, 707 .num_resources = ARRAY_SIZE(bfin_sir1_resources), 708 .resource = bfin_sir1_resources, 709}; 710#endif 711#endif 712 713#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 714static struct resource bfin_twi0_resource[] = { 715 [0] = { 716 .start = TWI0_REGBASE, 717 .end = TWI0_REGBASE, 718 .flags = IORESOURCE_MEM, 719 }, 720 [1] = { 721 .start = IRQ_TWI, 722 .end = IRQ_TWI, 723 .flags = IORESOURCE_IRQ, 724 }, 725}; 726 727static struct platform_device i2c_bfin_twi_device = { 728 .name = "i2c-bfin-twi", 729 .id = 0, 730 .num_resources = ARRAY_SIZE(bfin_twi0_resource), 731 .resource = bfin_twi0_resource, 732}; 733#endif 734 735static struct i2c_board_info __initdata bfin_i2c_board_info[] = { 736#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE) 737 { 738 I2C_BOARD_INFO("pcf8574_lcd", 0x22), 739 }, 740#endif 741#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE) 742 { 743 I2C_BOARD_INFO("pcf8574_keypad", 0x27), 744 .irq = IRQ_PF8, 745 }, 746#endif 747#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) 748 { 749 I2C_BOARD_INFO("bfin-adv7393", 0x2B), 750 }, 751#endif 752}; 753 754#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 755#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 756static struct resource bfin_sport0_uart_resources[] = { 757 { 758 .start = SPORT0_TCR1, 759 .end = SPORT0_MRCS3+4, 760 .flags = IORESOURCE_MEM, 761 }, 762 { 763 .start = IRQ_SPORT0_RX, 764 .end = IRQ_SPORT0_RX+1, 765 .flags = IORESOURCE_IRQ, 766 }, 767 { 768 .start = IRQ_SPORT0_ERROR, 769 .end = IRQ_SPORT0_ERROR, 770 .flags = IORESOURCE_IRQ, 771 }, 772}; 773 774unsigned short bfin_sport0_peripherals[] = { 775 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, 776 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0 777}; 778 779static struct platform_device bfin_sport0_uart_device = { 780 .name = "bfin-sport-uart", 781 .id = 0, 782 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources), 783 .resource = bfin_sport0_uart_resources, 784 .dev = { 785 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */ 786 }, 787}; 788#endif 789#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 790static struct resource bfin_sport1_uart_resources[] = { 791 { 792 .start = SPORT1_TCR1, 793 .end = SPORT1_MRCS3+4, 794 .flags = IORESOURCE_MEM, 795 }, 796 { 797 .start = IRQ_SPORT1_RX, 798 .end = IRQ_SPORT1_RX+1, 799 .flags = IORESOURCE_IRQ, 800 }, 801 { 802 .start = IRQ_SPORT1_ERROR, 803 .end = IRQ_SPORT1_ERROR, 804 .flags = IORESOURCE_IRQ, 805 }, 806}; 807 808unsigned short bfin_sport1_peripherals[] = { 809 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, 810 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0 811}; 812 813static struct platform_device bfin_sport1_uart_device = { 814 .name = "bfin-sport-uart", 815 .id = 1, 816 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources), 817 .resource = bfin_sport1_uart_resources, 818 .dev = { 819 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */ 820 }, 821}; 822#endif 823#endif 824 825#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 826#include <linux/input.h> 827#include <linux/gpio_keys.h> 828 829static struct gpio_keys_button bfin_gpio_keys_table[] = { 830 {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"}, 831}; 832 833static struct gpio_keys_platform_data bfin_gpio_keys_data = { 834 .buttons = bfin_gpio_keys_table, 835 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), 836}; 837 838static struct platform_device bfin_device_gpiokeys = { 839 .name = "gpio-keys", 840 .dev = { 841 .platform_data = &bfin_gpio_keys_data, 842 }, 843}; 844#endif 845 846static const unsigned int cclk_vlev_datasheet[] = 847{ 848 VRPAIR(VLEV_100, 400000000), 849 VRPAIR(VLEV_105, 426000000), 850 VRPAIR(VLEV_110, 500000000), 851 VRPAIR(VLEV_115, 533000000), 852 VRPAIR(VLEV_120, 600000000), 853}; 854 855static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { 856 .tuple_tab = cclk_vlev_datasheet, 857 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), 858 .vr_settling_time = 25 /* us */, 859}; 860 861static struct platform_device bfin_dpmc = { 862 .name = "bfin dpmc", 863 .dev = { 864 .platform_data = &bfin_dmpc_vreg_data, 865 }, 866}; 867 868static struct platform_device *cmbf527_devices[] __initdata = { 869 870 &bfin_dpmc, 871 872#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 873 &bf5xx_nand_device, 874#endif 875 876#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 877 &bfin_pcmcia_cf_device, 878#endif 879 880#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 881 &rtc_device, 882#endif 883 884#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) 885 &bfin_isp1760_device, 886#endif 887 888#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) 889 &musb_device, 890#endif 891 892#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 893 &smc91x_device, 894#endif 895 896#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) 897 &dm9000_device, 898#endif 899 900#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 901 &bfin_mii_bus, 902 &bfin_mac_device, 903#endif 904 905#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) 906 &net2272_bfin_device, 907#endif 908 909#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 910 &bfin_spi0_device, 911#endif 912 913#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 914#ifdef CONFIG_SERIAL_BFIN_UART0 915 &bfin_uart0_device, 916#endif 917#ifdef CONFIG_SERIAL_BFIN_UART1 918 &bfin_uart1_device, 919#endif 920#endif 921 922#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 923#ifdef CONFIG_BFIN_SIR0 924 &bfin_sir0_device, 925#endif 926#ifdef CONFIG_BFIN_SIR1 927 &bfin_sir1_device, 928#endif 929#endif 930 931#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 932 &i2c_bfin_twi_device, 933#endif 934 935#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 936#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 937 &bfin_sport0_uart_device, 938#endif 939#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 940 &bfin_sport1_uart_device, 941#endif 942#endif 943 944#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 945 &bfin_device_gpiokeys, 946#endif 947 948#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE) 949 &cm_flash_device, 950#endif 951}; 952 953static int __init cm_init(void) 954{ 955 printk(KERN_INFO "%s(): registering device resources\n", __func__); 956 i2c_register_board_info(0, bfin_i2c_board_info, 957 ARRAY_SIZE(bfin_i2c_board_info)); 958 platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices)); 959 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 960 return 0; 961} 962 963arch_initcall(cm_init); 964 965static struct platform_device *cmbf527_early_devices[] __initdata = { 966#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) 967#ifdef CONFIG_SERIAL_BFIN_UART0 968 &bfin_uart0_device, 969#endif 970#ifdef CONFIG_SERIAL_BFIN_UART1 971 &bfin_uart1_device, 972#endif 973#endif 974 975#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE) 976#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 977 &bfin_sport0_uart_device, 978#endif 979#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 980 &bfin_sport1_uart_device, 981#endif 982#endif 983}; 984 985void __init native_machine_early_platform_add_devices(void) 986{ 987 printk(KERN_INFO "register early platform devices\n"); 988 early_platform_add_devices(cmbf527_early_devices, 989 ARRAY_SIZE(cmbf527_early_devices)); 990} 991 992void native_machine_restart(char *cmd) 993{ 994 if ((bfin_read_SYSCR() & 0x7) == 0x3) 995 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 996} 997 998void bfin_get_ether_addr(char *addr) 999{ 1000 random_ether_addr(addr); 1001 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__); 1002} 1003EXPORT_SYMBOL(bfin_get_ether_addr); 1004