1/* 2 * Based on arch/arm/plat-omap/clock.c 3 * 4 * Copyright (C) 2004 - 2005 Nokia corporation 5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> 6 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> 7 * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. 8 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * as published by the Free Software Foundation; either version 2 13 * of the License, or (at your option) any later version. 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 22 * MA 02110-1301, USA. 23 */ 24 25/* #define DEBUG */ 26 27#include <linux/clk.h> 28#include <linux/err.h> 29#include <linux/errno.h> 30#include <linux/init.h> 31#include <linux/io.h> 32#include <linux/kernel.h> 33#include <linux/list.h> 34#include <linux/module.h> 35#include <linux/mutex.h> 36#include <linux/platform_device.h> 37#include <linux/proc_fs.h> 38#include <linux/semaphore.h> 39#include <linux/string.h> 40 41#include <mach/clock.h> 42#include <mach/hardware.h> 43 44static LIST_HEAD(clocks); 45static DEFINE_MUTEX(clocks_mutex); 46 47/*------------------------------------------------------------------------- 48 * Standard clock functions defined in include/linux/clk.h 49 *-------------------------------------------------------------------------*/ 50 51static void __clk_disable(struct clk *clk) 52{ 53 if (clk == NULL || IS_ERR(clk)) 54 return; 55 WARN_ON(!clk->usecount); 56 57 if (!(--clk->usecount)) { 58 if (clk->disable) 59 clk->disable(clk); 60 __clk_disable(clk->parent); 61 __clk_disable(clk->secondary); 62 } 63} 64 65static int __clk_enable(struct clk *clk) 66{ 67 if (clk == NULL || IS_ERR(clk)) 68 return -EINVAL; 69 70 if (clk->usecount++ == 0) { 71 __clk_enable(clk->parent); 72 __clk_enable(clk->secondary); 73 74 if (clk->enable) 75 clk->enable(clk); 76 } 77 return 0; 78} 79 80/* This function increments the reference count on the clock and enables the 81 * clock if not already enabled. The parent clock tree is recursively enabled 82 */ 83int clk_enable(struct clk *clk) 84{ 85 int ret = 0; 86 87 if (clk == NULL || IS_ERR(clk)) 88 return -EINVAL; 89 90 mutex_lock(&clocks_mutex); 91 ret = __clk_enable(clk); 92 mutex_unlock(&clocks_mutex); 93 94 return ret; 95} 96EXPORT_SYMBOL(clk_enable); 97 98/* This function decrements the reference count on the clock and disables 99 * the clock when reference count is 0. The parent clock tree is 100 * recursively disabled 101 */ 102void clk_disable(struct clk *clk) 103{ 104 if (clk == NULL || IS_ERR(clk)) 105 return; 106 107 mutex_lock(&clocks_mutex); 108 __clk_disable(clk); 109 mutex_unlock(&clocks_mutex); 110} 111EXPORT_SYMBOL(clk_disable); 112 113/* Retrieve the *current* clock rate. If the clock itself 114 * does not provide a special calculation routine, ask 115 * its parent and so on, until one is able to return 116 * a valid clock rate 117 */ 118unsigned long clk_get_rate(struct clk *clk) 119{ 120 if (clk == NULL || IS_ERR(clk)) 121 return 0UL; 122 123 if (clk->get_rate) 124 return clk->get_rate(clk); 125 126 return clk_get_rate(clk->parent); 127} 128EXPORT_SYMBOL(clk_get_rate); 129 130/* Round the requested clock rate to the nearest supported 131 * rate that is less than or equal to the requested rate. 132 * This is dependent on the clock's current parent. 133 */ 134long clk_round_rate(struct clk *clk, unsigned long rate) 135{ 136 if (clk == NULL || IS_ERR(clk) || !clk->round_rate) 137 return 0; 138 139 return clk->round_rate(clk, rate); 140} 141EXPORT_SYMBOL(clk_round_rate); 142 143/* Set the clock to the requested clock rate. The rate must 144 * match a supported rate exactly based on what clk_round_rate returns 145 */ 146int clk_set_rate(struct clk *clk, unsigned long rate) 147{ 148 int ret = -EINVAL; 149 150 if (clk == NULL || IS_ERR(clk) || clk->set_rate == NULL || rate == 0) 151 return ret; 152 153 mutex_lock(&clocks_mutex); 154 ret = clk->set_rate(clk, rate); 155 mutex_unlock(&clocks_mutex); 156 157 return ret; 158} 159EXPORT_SYMBOL(clk_set_rate); 160 161/* Set the clock's parent to another clock source */ 162int clk_set_parent(struct clk *clk, struct clk *parent) 163{ 164 int ret = -EINVAL; 165 struct clk *old; 166 167 if (clk == NULL || IS_ERR(clk) || parent == NULL || 168 IS_ERR(parent) || clk->set_parent == NULL) 169 return ret; 170 171 if (clk->usecount) 172 clk_enable(parent); 173 174 mutex_lock(&clocks_mutex); 175 ret = clk->set_parent(clk, parent); 176 if (ret == 0) { 177 old = clk->parent; 178 clk->parent = parent; 179 } else { 180 old = parent; 181 } 182 mutex_unlock(&clocks_mutex); 183 184 if (clk->usecount) 185 clk_disable(old); 186 187 return ret; 188} 189EXPORT_SYMBOL(clk_set_parent); 190 191/* Retrieve the clock's parent clock source */ 192struct clk *clk_get_parent(struct clk *clk) 193{ 194 struct clk *ret = NULL; 195 196 if (clk == NULL || IS_ERR(clk)) 197 return ret; 198 199 return clk->parent; 200} 201EXPORT_SYMBOL(clk_get_parent); 202 203/* 204 * Get the resulting clock rate from a PLL register value and the input 205 * frequency. PLLs with this register layout can at least be found on 206 * MX1, MX21, MX27 and MX31 207 * 208 * mfi + mfn / (mfd + 1) 209 * f = 2 * f_ref * -------------------- 210 * pd + 1 211 */ 212unsigned long mxc_decode_pll(unsigned int reg_val, u32 freq) 213{ 214 long long ll; 215 int mfn_abs; 216 unsigned int mfi, mfn, mfd, pd; 217 218 mfi = (reg_val >> 10) & 0xf; 219 mfn = reg_val & 0x3ff; 220 mfd = (reg_val >> 16) & 0x3ff; 221 pd = (reg_val >> 26) & 0xf; 222 223 mfi = mfi <= 5 ? 5 : mfi; 224 225 mfn_abs = mfn; 226 227 /* On all i.MXs except i.MX1 and i.MX21 mfn is a 10bit 228 * 2's complements number 229 */ 230 if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) 231 mfn_abs = 0x400 - mfn; 232 233 freq *= 2; 234 freq /= pd + 1; 235 236 ll = (unsigned long long)freq * mfn_abs; 237 238 do_div(ll, mfd + 1); 239 240 if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) 241 ll = -ll; 242 243 ll = (freq * mfi) + ll; 244 245 return ll; 246} 247