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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s5pv210/
1/* linux/arch/arm/mach-s5pv210/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 *	Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13#include <linux/gpio.h>
14
15#include <mach/dma.h>
16#include <mach/map.h>
17#include <mach/irqs.h>
18#include <mach/spi-clocks.h>
19
20#include <plat/s3c64xx-spi.h>
21#include <plat/gpio-cfg.h>
22
23static char *spi_src_clks[] = {
24	[S5PV210_SPI_SRCCLK_PCLK] = "pclk",
25	[S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi",
26};
27
28/* SPI Controller platform_devices */
29
30/* Since we emulate multi-cs capability, we do not touch the CS.
31 * The emulated CS is toggled by board specific mechanism, as it can
32 * be either some immediate GPIO or some signal out of some other
33 * chip in between ... or some yet another way.
34 * We simply do not assume anything about CS.
35 */
36static int s5pv210_spi_cfg_gpio(struct platform_device *pdev)
37{
38	switch (pdev->id) {
39	case 0:
40		s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2));
41		s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(2));
42		s3c_gpio_cfgpin(S5PV210_GPB(2), S3C_GPIO_SFN(2));
43		s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP);
44		s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP);
45		s3c_gpio_setpull(S5PV210_GPB(2), S3C_GPIO_PULL_UP);
46		break;
47
48	case 1:
49		s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2));
50		s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(2));
51		s3c_gpio_cfgpin(S5PV210_GPB(6), S3C_GPIO_SFN(2));
52		s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP);
53		s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP);
54		s3c_gpio_setpull(S5PV210_GPB(6), S3C_GPIO_PULL_UP);
55		break;
56
57	default:
58		dev_err(&pdev->dev, "Invalid SPI Controller number!");
59		return -EINVAL;
60	}
61
62	return 0;
63}
64
65static struct resource s5pv210_spi0_resource[] = {
66	[0] = {
67		.start = S5PV210_PA_SPI0,
68		.end   = S5PV210_PA_SPI0 + 0x100 - 1,
69		.flags = IORESOURCE_MEM,
70	},
71	[1] = {
72		.start = DMACH_SPI0_TX,
73		.end   = DMACH_SPI0_TX,
74		.flags = IORESOURCE_DMA,
75	},
76	[2] = {
77		.start = DMACH_SPI0_RX,
78		.end   = DMACH_SPI0_RX,
79		.flags = IORESOURCE_DMA,
80	},
81	[3] = {
82		.start = IRQ_SPI0,
83		.end   = IRQ_SPI0,
84		.flags = IORESOURCE_IRQ,
85	},
86};
87
88static struct s3c64xx_spi_info s5pv210_spi0_pdata = {
89	.cfg_gpio = s5pv210_spi_cfg_gpio,
90	.fifo_lvl_mask = 0x1ff,
91	.rx_lvl_offset = 15,
92	.high_speed = 1,
93};
94
95static u64 spi_dmamask = DMA_BIT_MASK(32);
96
97struct platform_device s5pv210_device_spi0 = {
98	.name		  = "s3c64xx-spi",
99	.id		  = 0,
100	.num_resources	  = ARRAY_SIZE(s5pv210_spi0_resource),
101	.resource	  = s5pv210_spi0_resource,
102	.dev = {
103		.dma_mask		= &spi_dmamask,
104		.coherent_dma_mask	= DMA_BIT_MASK(32),
105		.platform_data = &s5pv210_spi0_pdata,
106	},
107};
108
109static struct resource s5pv210_spi1_resource[] = {
110	[0] = {
111		.start = S5PV210_PA_SPI1,
112		.end   = S5PV210_PA_SPI1 + 0x100 - 1,
113		.flags = IORESOURCE_MEM,
114	},
115	[1] = {
116		.start = DMACH_SPI1_TX,
117		.end   = DMACH_SPI1_TX,
118		.flags = IORESOURCE_DMA,
119	},
120	[2] = {
121		.start = DMACH_SPI1_RX,
122		.end   = DMACH_SPI1_RX,
123		.flags = IORESOURCE_DMA,
124	},
125	[3] = {
126		.start = IRQ_SPI1,
127		.end   = IRQ_SPI1,
128		.flags = IORESOURCE_IRQ,
129	},
130};
131
132static struct s3c64xx_spi_info s5pv210_spi1_pdata = {
133	.cfg_gpio = s5pv210_spi_cfg_gpio,
134	.fifo_lvl_mask = 0x7f,
135	.rx_lvl_offset = 15,
136	.high_speed = 1,
137};
138
139struct platform_device s5pv210_device_spi1 = {
140	.name		  = "s3c64xx-spi",
141	.id		  = 1,
142	.num_resources	  = ARRAY_SIZE(s5pv210_spi1_resource),
143	.resource	  = s5pv210_spi1_resource,
144	.dev = {
145		.dma_mask		= &spi_dmamask,
146		.coherent_dma_mask	= DMA_BIT_MASK(32),
147		.platform_data = &s5pv210_spi1_pdata,
148	},
149};
150
151void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
152{
153	struct s3c64xx_spi_info *pd;
154
155	/* Reject invalid configuration */
156	if (!num_cs || src_clk_nr < 0
157			|| src_clk_nr > S5PV210_SPI_SRCCLK_SCLK) {
158		printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
159		return;
160	}
161
162	switch (cntrlr) {
163	case 0:
164		pd = &s5pv210_spi0_pdata;
165		break;
166	case 1:
167		pd = &s5pv210_spi1_pdata;
168		break;
169	default:
170		printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
171							__func__, cntrlr);
172		return;
173	}
174
175	pd->num_cs = num_cs;
176	pd->src_clk_nr = src_clk_nr;
177	pd->src_clk_name = spi_src_clks[src_clk_nr];
178}
179