1/* 2 * arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c 3 * 4 * Marvell Orion-1-90 AP GE Reference Design Setup 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without any 8 * warranty of any kind, whether express or implied. 9 */ 10 11#include <linux/kernel.h> 12#include <linux/init.h> 13#include <linux/platform_device.h> 14#include <linux/pci.h> 15#include <linux/irq.h> 16#include <linux/mtd/physmap.h> 17#include <linux/mv643xx_eth.h> 18#include <linux/spi/spi.h> 19#include <linux/spi/orion_spi.h> 20#include <linux/spi/flash.h> 21#include <linux/ethtool.h> 22#include <net/dsa.h> 23#include <asm/mach-types.h> 24#include <asm/gpio.h> 25#include <asm/leds.h> 26#include <asm/mach/arch.h> 27#include <asm/mach/pci.h> 28#include <mach/orion5x.h> 29#include "common.h" 30#include "mpp.h" 31 32static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = { 33 .phy_addr = -1, 34 .speed = SPEED_1000, 35 .duplex = DUPLEX_FULL, 36}; 37 38static struct dsa_chip_data rd88f6183ap_ge_switch_chip_data = { 39 .port_names[0] = "lan1", 40 .port_names[1] = "lan2", 41 .port_names[2] = "lan3", 42 .port_names[3] = "lan4", 43 .port_names[4] = "wan", 44 .port_names[5] = "cpu", 45}; 46 47static struct dsa_platform_data rd88f6183ap_ge_switch_plat_data = { 48 .nr_chips = 1, 49 .chip = &rd88f6183ap_ge_switch_chip_data, 50}; 51 52static struct mtd_partition rd88f6183ap_ge_partitions[] = { 53 { 54 .name = "kernel", 55 .offset = 0x00000000, 56 .size = 0x00200000, 57 }, { 58 .name = "rootfs", 59 .offset = 0x00200000, 60 .size = 0x00500000, 61 }, { 62 .name = "nvram", 63 .offset = 0x00700000, 64 .size = 0x00080000, 65 }, 66}; 67 68static struct flash_platform_data rd88f6183ap_ge_spi_slave_data = { 69 .type = "m25p64", 70 .nr_parts = ARRAY_SIZE(rd88f6183ap_ge_partitions), 71 .parts = rd88f6183ap_ge_partitions, 72}; 73 74static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = { 75 { 76 .modalias = "m25p80", 77 .platform_data = &rd88f6183ap_ge_spi_slave_data, 78 .irq = NO_IRQ, 79 .max_speed_hz = 20000000, 80 .bus_num = 0, 81 .chip_select = 0, 82 }, 83}; 84 85static void __init rd88f6183ap_ge_init(void) 86{ 87 /* 88 * Setup basic Orion functions. Need to be called early. 89 */ 90 orion5x_init(); 91 92 /* 93 * Configure peripherals. 94 */ 95 orion5x_ehci0_init(); 96 orion5x_eth_init(&rd88f6183ap_ge_eth_data); 97 orion5x_eth_switch_init(&rd88f6183ap_ge_switch_plat_data, 98 gpio_to_irq(3)); 99 spi_register_board_info(rd88f6183ap_ge_spi_slave_info, 100 ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info)); 101 orion5x_spi_init(); 102 orion5x_uart0_init(); 103} 104 105static struct hw_pci rd88f6183ap_ge_pci __initdata = { 106 .nr_controllers = 2, 107 .swizzle = pci_std_swizzle, 108 .setup = orion5x_pci_sys_setup, 109 .scan = orion5x_pci_sys_scan_bus, 110 .map_irq = orion5x_pci_map_irq, 111}; 112 113static int __init rd88f6183ap_ge_pci_init(void) 114{ 115 if (machine_is_rd88f6183ap_ge()) { 116 orion5x_pci_disable(); 117 pci_common_init(&rd88f6183ap_ge_pci); 118 } 119 120 return 0; 121} 122subsys_initcall(rd88f6183ap_ge_pci_init); 123 124MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design") 125 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ 126 .phys_io = ORION5X_REGS_PHYS_BASE, 127 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, 128 .boot_params = 0x00000100, 129 .init_machine = rd88f6183ap_ge_init, 130 .map_io = orion5x_map_io, 131 .init_irq = orion5x_init_irq, 132 .timer = &orion5x_timer, 133 .fixup = tag_fixup_mem32, 134MACHINE_END 135