1/* 2 * board-sdp-flash.c 3 * Modified from mach-omap2/board-3430sdp-flash.c 4 * 5 * Copyright (C) 2009 Nokia Corporation 6 * Copyright (C) 2009 Texas Instruments 7 * 8 * Vimal Singh <vimalsingh@ti.com> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15#include <linux/kernel.h> 16#include <linux/platform_device.h> 17#include <linux/mtd/physmap.h> 18#include <linux/io.h> 19 20#include <plat/gpmc.h> 21#include <plat/nand.h> 22#include <plat/onenand.h> 23#include <plat/tc.h> 24#include <mach/board-flash.h> 25 26#define REG_FPGA_REV 0x10 27#define REG_FPGA_DIP_SWITCH_INPUT2 0x60 28#define MAX_SUPPORTED_GPMC_CONFIG 3 29 30#define DEBUG_BASE 0x08000000 /* debug board */ 31 32/* various memory sizes */ 33#define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */ 34#define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */ 35 36static struct physmap_flash_data board_nor_data = { 37 .width = 2, 38}; 39 40static struct resource board_nor_resource = { 41 .flags = IORESOURCE_MEM, 42}; 43 44static struct platform_device board_nor_device = { 45 .name = "physmap-flash", 46 .id = 0, 47 .dev = { 48 .platform_data = &board_nor_data, 49 }, 50 .num_resources = 1, 51 .resource = &board_nor_resource, 52}; 53 54static void 55__init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs) 56{ 57 int err; 58 59 board_nor_data.parts = nor_parts; 60 board_nor_data.nr_parts = nr_parts; 61 62 /* Configure start address and size of NOR device */ 63 if (omap_rev() >= OMAP3430_REV_ES1_0) { 64 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1, 65 (unsigned long *)&board_nor_resource.start); 66 board_nor_resource.end = board_nor_resource.start 67 + FLASH_SIZE_SDPV2 - 1; 68 } else { 69 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1, 70 (unsigned long *)&board_nor_resource.start); 71 board_nor_resource.end = board_nor_resource.start 72 + FLASH_SIZE_SDPV1 - 1; 73 } 74 if (err < 0) { 75 printk(KERN_ERR "NOR: Can't request GPMC CS\n"); 76 return; 77 } 78 if (platform_device_register(&board_nor_device) < 0) 79 printk(KERN_ERR "Unable to register NOR device\n"); 80} 81 82#if defined(CONFIG_MTD_ONENAND_OMAP2) || defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) 83static struct omap_onenand_platform_data board_onenand_data = { 84 .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */ 85}; 86 87static void 88__init board_onenand_init(struct mtd_partition *onenand_parts, 89 u8 nr_parts, u8 cs) 90{ 91 board_onenand_data.cs = cs; 92 board_onenand_data.parts = onenand_parts; 93 board_onenand_data.nr_parts = nr_parts; 94 95 gpmc_onenand_init(&board_onenand_data); 96} 97#else 98static void 99__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs) 100{ 101} 102#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */ 103 104#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) 105 106/* Note that all values in this struct are in nanoseconds */ 107static struct gpmc_timings nand_timings = { 108 109 .sync_clk = 0, 110 111 .cs_on = 0, 112 .cs_rd_off = 36, 113 .cs_wr_off = 36, 114 115 .adv_on = 6, 116 .adv_rd_off = 24, 117 .adv_wr_off = 36, 118 119 .we_off = 30, 120 .oe_off = 48, 121 122 .access = 54, 123 .rd_cycle = 72, 124 .wr_cycle = 72, 125 126 .wr_access = 30, 127 .wr_data_mux_bus = 0, 128}; 129 130static struct omap_nand_platform_data board_nand_data = { 131 .nand_setup = NULL, 132 .gpmc_t = &nand_timings, 133 .dma_channel = -1, /* disable DMA in OMAP NAND driver */ 134 .dev_ready = NULL, 135 .devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */ 136}; 137 138void 139__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs) 140{ 141 board_nand_data.cs = cs; 142 board_nand_data.parts = nand_parts; 143 board_nand_data.nr_parts = nr_parts; 144 145 gpmc_nand_init(&board_nand_data); 146} 147#else 148void 149__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs) 150{ 151} 152#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ 153 154/** 155 * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get 156 * the various cs values. 157 */ 158static u8 get_gpmc0_type(void) 159{ 160 u8 cs = 0; 161 void __iomem *fpga_map_addr; 162 163 fpga_map_addr = ioremap(DEBUG_BASE, 4096); 164 if (!fpga_map_addr) 165 return -ENOMEM; 166 167 if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV))) 168 /* we dont have an DEBUG FPGA??? */ 169 /* Depend on #defines!! default to strata boot return param */ 170 goto unmap; 171 172 /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */ 173 cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf; 174 175 /* ES2.0 SDP's onwards 4 dip switches are provided for CS */ 176 if (omap_rev() >= OMAP3430_REV_ES1_0) 177 /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */ 178 cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) | 179 ((cs & 2) << 1) | ((cs & 1) << 3); 180 else 181 /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */ 182 cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2); 183unmap: 184 iounmap(fpga_map_addr); 185 return cs; 186} 187 188/** 189 * sdp3430_flash_init - Identify devices connected to GPMC and register. 190 * 191 * @return - void. 192 */ 193void board_flash_init(struct flash_partitions partition_info[], 194 char chip_sel_board[][GPMC_CS_NUM]) 195{ 196 u8 cs = 0; 197 u8 norcs = GPMC_CS_NUM + 1; 198 u8 nandcs = GPMC_CS_NUM + 1; 199 u8 onenandcs = GPMC_CS_NUM + 1; 200 u8 idx; 201 unsigned char *config_sel = NULL; 202 203 /* REVISIT: Is this return correct idx for 2430 SDP? 204 * for which cs configuration matches for 2430 SDP? 205 */ 206 idx = get_gpmc0_type(); 207 if (idx >= MAX_SUPPORTED_GPMC_CONFIG) { 208 printk(KERN_ERR "%s: Invalid chip select: %d\n", __func__, cs); 209 return; 210 } 211 config_sel = (unsigned char *)(chip_sel_board[idx]); 212 213 while (cs < GPMC_CS_NUM) { 214 switch (config_sel[cs]) { 215 case PDC_NOR: 216 if (norcs > GPMC_CS_NUM) 217 norcs = cs; 218 break; 219 case PDC_NAND: 220 if (nandcs > GPMC_CS_NUM) 221 nandcs = cs; 222 break; 223 case PDC_ONENAND: 224 if (onenandcs > GPMC_CS_NUM) 225 onenandcs = cs; 226 break; 227 }; 228 cs++; 229 } 230 231 if (norcs > GPMC_CS_NUM) 232 printk(KERN_INFO "NOR: Unable to find configuration " 233 "in GPMC\n"); 234 else 235 board_nor_init(partition_info[0].parts, 236 partition_info[0].nr_parts, norcs); 237 238 if (onenandcs > GPMC_CS_NUM) 239 printk(KERN_INFO "OneNAND: Unable to find configuration " 240 "in GPMC\n"); 241 else 242 board_onenand_init(partition_info[1].parts, 243 partition_info[1].nr_parts, onenandcs); 244 245 if (nandcs > GPMC_CS_NUM) 246 printk(KERN_INFO "NAND: Unable to find configuration " 247 "in GPMC\n"); 248 else 249 board_nand_init(partition_info[2].parts, 250 partition_info[2].nr_parts, nandcs); 251} 252