1/* 2 * board-cm-t35.c (CompuLab CM-T35 module) 3 * 4 * Copyright (C) 2009 CompuLab, Ltd. 5 * Author: Mike Rapoport <mike@compulab.co.il> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * version 2 as published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 19 * 02110-1301 USA 20 * 21 */ 22 23#include <linux/kernel.h> 24#include <linux/init.h> 25#include <linux/platform_device.h> 26#include <linux/input.h> 27#include <linux/input/matrix_keypad.h> 28#include <linux/delay.h> 29#include <linux/gpio.h> 30 31#include <linux/i2c/at24.h> 32#include <linux/i2c/twl.h> 33#include <linux/regulator/machine.h> 34 35#include <linux/spi/spi.h> 36#include <linux/spi/tdo24m.h> 37 38#include <asm/mach-types.h> 39#include <asm/mach/arch.h> 40#include <asm/mach/map.h> 41 42#include <plat/board.h> 43#include <plat/common.h> 44#include <plat/nand.h> 45#include <plat/gpmc.h> 46#include <plat/usb.h> 47#include <plat/display.h> 48#include <plat/mcspi.h> 49 50#include <mach/hardware.h> 51 52#include "mux.h" 53#include "sdram-micron-mt46h32m32lf-6.h" 54#include "hsmmc.h" 55 56#define CM_T35_GPIO_PENDOWN 57 57 58#define CM_T35_SMSC911X_CS 5 59#define CM_T35_SMSC911X_GPIO 163 60#define SB_T35_SMSC911X_CS 4 61#define SB_T35_SMSC911X_GPIO 65 62 63#define NAND_BLOCK_SIZE SZ_128K 64 65#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) 66#include <linux/smsc911x.h> 67 68static struct smsc911x_platform_config cm_t35_smsc911x_config = { 69 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 70 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, 71 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, 72 .phy_interface = PHY_INTERFACE_MODE_MII, 73}; 74 75static struct resource cm_t35_smsc911x_resources[] = { 76 { 77 .flags = IORESOURCE_MEM, 78 }, 79 { 80 .start = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO), 81 .end = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO), 82 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, 83 }, 84}; 85 86static struct platform_device cm_t35_smsc911x_device = { 87 .name = "smsc911x", 88 .id = 0, 89 .num_resources = ARRAY_SIZE(cm_t35_smsc911x_resources), 90 .resource = cm_t35_smsc911x_resources, 91 .dev = { 92 .platform_data = &cm_t35_smsc911x_config, 93 }, 94}; 95 96static struct resource sb_t35_smsc911x_resources[] = { 97 { 98 .flags = IORESOURCE_MEM, 99 }, 100 { 101 .start = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO), 102 .end = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO), 103 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, 104 }, 105}; 106 107static struct platform_device sb_t35_smsc911x_device = { 108 .name = "smsc911x", 109 .id = 1, 110 .num_resources = ARRAY_SIZE(sb_t35_smsc911x_resources), 111 .resource = sb_t35_smsc911x_resources, 112 .dev = { 113 .platform_data = &cm_t35_smsc911x_config, 114 }, 115}; 116 117static void __init cm_t35_init_smsc911x(struct platform_device *dev, 118 int cs, int irq_gpio) 119{ 120 unsigned long cs_mem_base; 121 122 if (gpmc_cs_request(cs, SZ_16M, &cs_mem_base) < 0) { 123 pr_err("CM-T35: Failed request for GPMC mem for smsc911x\n"); 124 return; 125 } 126 127 dev->resource[0].start = cs_mem_base + 0x0; 128 dev->resource[0].end = cs_mem_base + 0xff; 129 130 if ((gpio_request(irq_gpio, "ETH IRQ") == 0) && 131 (gpio_direction_input(irq_gpio) == 0)) { 132 gpio_export(irq_gpio, 0); 133 } else { 134 pr_err("CM-T35: could not obtain gpio for SMSC911X IRQ\n"); 135 return; 136 } 137 138 platform_device_register(dev); 139} 140 141static void __init cm_t35_init_ethernet(void) 142{ 143 cm_t35_init_smsc911x(&cm_t35_smsc911x_device, 144 CM_T35_SMSC911X_CS, CM_T35_SMSC911X_GPIO); 145 cm_t35_init_smsc911x(&sb_t35_smsc911x_device, 146 SB_T35_SMSC911X_CS, SB_T35_SMSC911X_GPIO); 147} 148#else 149static inline void __init cm_t35_init_ethernet(void) { return; } 150#endif 151 152#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) 153#include <linux/leds.h> 154 155static struct gpio_led cm_t35_leds[] = { 156 [0] = { 157 .gpio = 186, 158 .name = "cm-t35:green", 159 .default_trigger = "heartbeat", 160 .active_low = 0, 161 }, 162}; 163 164static struct gpio_led_platform_data cm_t35_led_pdata = { 165 .num_leds = ARRAY_SIZE(cm_t35_leds), 166 .leds = cm_t35_leds, 167}; 168 169static struct platform_device cm_t35_led_device = { 170 .name = "leds-gpio", 171 .id = -1, 172 .dev = { 173 .platform_data = &cm_t35_led_pdata, 174 }, 175}; 176 177static void __init cm_t35_init_led(void) 178{ 179 platform_device_register(&cm_t35_led_device); 180} 181#else 182static inline void cm_t35_init_led(void) {} 183#endif 184 185#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) 186#include <linux/mtd/mtd.h> 187#include <linux/mtd/nand.h> 188#include <linux/mtd/partitions.h> 189 190static struct mtd_partition cm_t35_nand_partitions[] = { 191 { 192 .name = "xloader", 193 .offset = 0, /* Offset = 0x00000 */ 194 .size = 4 * NAND_BLOCK_SIZE, 195 .mask_flags = MTD_WRITEABLE 196 }, 197 { 198 .name = "uboot", 199 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ 200 .size = 15 * NAND_BLOCK_SIZE, 201 }, 202 { 203 .name = "uboot environment", 204 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ 205 .size = 2 * NAND_BLOCK_SIZE, 206 }, 207 { 208 .name = "linux", 209 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ 210 .size = 32 * NAND_BLOCK_SIZE, 211 }, 212 { 213 .name = "rootfs", 214 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ 215 .size = MTDPART_SIZ_FULL, 216 }, 217}; 218 219static struct omap_nand_platform_data cm_t35_nand_data = { 220 .parts = cm_t35_nand_partitions, 221 .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions), 222 .dma_channel = -1, /* disable DMA in OMAP NAND driver */ 223 .cs = 0, 224 225}; 226 227static void __init cm_t35_init_nand(void) 228{ 229 if (gpmc_nand_init(&cm_t35_nand_data) < 0) 230 pr_err("CM-T35: Unable to register NAND device\n"); 231} 232#else 233static inline void cm_t35_init_nand(void) {} 234#endif 235 236#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) 237#include <linux/spi/ads7846.h> 238 239#include <plat/mcspi.h> 240 241static struct omap2_mcspi_device_config ads7846_mcspi_config = { 242 .turbo_mode = 0, 243 .single_channel = 1, /* 0: slave, 1: master */ 244}; 245 246static int ads7846_get_pendown_state(void) 247{ 248 return !gpio_get_value(CM_T35_GPIO_PENDOWN); 249} 250 251static struct ads7846_platform_data ads7846_config = { 252 .x_max = 0x0fff, 253 .y_max = 0x0fff, 254 .x_plate_ohms = 180, 255 .pressure_max = 255, 256 .debounce_max = 10, 257 .debounce_tol = 3, 258 .debounce_rep = 1, 259 .get_pendown_state = ads7846_get_pendown_state, 260 .keep_vref_on = 1, 261}; 262 263static struct spi_board_info cm_t35_spi_board_info[] __initdata = { 264 { 265 .modalias = "ads7846", 266 .bus_num = 1, 267 .chip_select = 0, 268 .max_speed_hz = 1500000, 269 .controller_data = &ads7846_mcspi_config, 270 .irq = OMAP_GPIO_IRQ(CM_T35_GPIO_PENDOWN), 271 .platform_data = &ads7846_config, 272 }, 273}; 274 275static void __init cm_t35_init_ads7846(void) 276{ 277 if ((gpio_request(CM_T35_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) && 278 (gpio_direction_input(CM_T35_GPIO_PENDOWN) == 0)) { 279 gpio_export(CM_T35_GPIO_PENDOWN, 0); 280 } else { 281 pr_err("CM-T35: could not obtain gpio for ADS7846_PENDOWN\n"); 282 return; 283 } 284 285 spi_register_board_info(cm_t35_spi_board_info, 286 ARRAY_SIZE(cm_t35_spi_board_info)); 287} 288#else 289static inline void cm_t35_init_ads7846(void) {} 290#endif 291 292#define CM_T35_LCD_EN_GPIO 157 293#define CM_T35_LCD_BL_GPIO 58 294#define CM_T35_DVI_EN_GPIO 54 295 296static int lcd_bl_gpio; 297static int lcd_en_gpio; 298static int dvi_en_gpio; 299 300static int lcd_enabled; 301static int dvi_enabled; 302 303static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev) 304{ 305 if (dvi_enabled) { 306 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); 307 return -EINVAL; 308 } 309 310 gpio_set_value(lcd_en_gpio, 1); 311 gpio_set_value(lcd_bl_gpio, 1); 312 313 lcd_enabled = 1; 314 315 return 0; 316} 317 318static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev) 319{ 320 lcd_enabled = 0; 321 322 gpio_set_value(lcd_bl_gpio, 0); 323 gpio_set_value(lcd_en_gpio, 0); 324} 325 326static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev) 327{ 328 if (lcd_enabled) { 329 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); 330 return -EINVAL; 331 } 332 333 gpio_set_value(dvi_en_gpio, 0); 334 dvi_enabled = 1; 335 336 return 0; 337} 338 339static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev) 340{ 341 gpio_set_value(dvi_en_gpio, 1); 342 dvi_enabled = 0; 343} 344 345static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev) 346{ 347 return 0; 348} 349 350static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev) 351{ 352} 353 354static struct omap_dss_device cm_t35_lcd_device = { 355 .name = "lcd", 356 .driver_name = "toppoly_tdo35s_panel", 357 .type = OMAP_DISPLAY_TYPE_DPI, 358 .phy.dpi.data_lines = 18, 359 .platform_enable = cm_t35_panel_enable_lcd, 360 .platform_disable = cm_t35_panel_disable_lcd, 361}; 362 363static struct omap_dss_device cm_t35_dvi_device = { 364 .name = "dvi", 365 .driver_name = "generic_panel", 366 .type = OMAP_DISPLAY_TYPE_DPI, 367 .phy.dpi.data_lines = 24, 368 .platform_enable = cm_t35_panel_enable_dvi, 369 .platform_disable = cm_t35_panel_disable_dvi, 370}; 371 372static struct omap_dss_device cm_t35_tv_device = { 373 .name = "tv", 374 .driver_name = "venc", 375 .type = OMAP_DISPLAY_TYPE_VENC, 376 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, 377 .platform_enable = cm_t35_panel_enable_tv, 378 .platform_disable = cm_t35_panel_disable_tv, 379}; 380 381static struct omap_dss_device *cm_t35_dss_devices[] = { 382 &cm_t35_lcd_device, 383 &cm_t35_dvi_device, 384 &cm_t35_tv_device, 385}; 386 387static struct omap_dss_board_info cm_t35_dss_data = { 388 .num_devices = ARRAY_SIZE(cm_t35_dss_devices), 389 .devices = cm_t35_dss_devices, 390 .default_device = &cm_t35_dvi_device, 391}; 392 393static struct platform_device cm_t35_dss_device = { 394 .name = "omapdss", 395 .id = -1, 396 .dev = { 397 .platform_data = &cm_t35_dss_data, 398 }, 399}; 400 401static struct omap2_mcspi_device_config tdo24m_mcspi_config = { 402 .turbo_mode = 0, 403 .single_channel = 1, /* 0: slave, 1: master */ 404}; 405 406static struct tdo24m_platform_data tdo24m_config = { 407 .model = TDO35S, 408}; 409 410static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = { 411 { 412 .modalias = "tdo24m", 413 .bus_num = 4, 414 .chip_select = 0, 415 .max_speed_hz = 1000000, 416 .controller_data = &tdo24m_mcspi_config, 417 .platform_data = &tdo24m_config, 418 }, 419}; 420 421static void __init cm_t35_init_display(void) 422{ 423 int err; 424 425 lcd_en_gpio = CM_T35_LCD_EN_GPIO; 426 lcd_bl_gpio = CM_T35_LCD_BL_GPIO; 427 dvi_en_gpio = CM_T35_DVI_EN_GPIO; 428 429 spi_register_board_info(cm_t35_lcd_spi_board_info, 430 ARRAY_SIZE(cm_t35_lcd_spi_board_info)); 431 432 err = gpio_request(lcd_en_gpio, "LCD RST"); 433 if (err) { 434 pr_err("CM-T35: failed to get LCD reset GPIO\n"); 435 goto out; 436 } 437 438 err = gpio_request(lcd_bl_gpio, "LCD BL"); 439 if (err) { 440 pr_err("CM-T35: failed to get LCD backlight control GPIO\n"); 441 goto err_lcd_bl; 442 } 443 444 err = gpio_request(dvi_en_gpio, "DVI EN"); 445 if (err) { 446 pr_err("CM-T35: failed to get DVI reset GPIO\n"); 447 goto err_dvi_en; 448 } 449 450 gpio_export(lcd_en_gpio, 0); 451 gpio_export(lcd_bl_gpio, 0); 452 gpio_export(dvi_en_gpio, 0); 453 gpio_direction_output(lcd_en_gpio, 0); 454 gpio_direction_output(lcd_bl_gpio, 0); 455 gpio_direction_output(dvi_en_gpio, 1); 456 457 msleep(50); 458 gpio_set_value(lcd_en_gpio, 1); 459 460 err = platform_device_register(&cm_t35_dss_device); 461 if (err) { 462 pr_err("CM-T35: failed to register DSS device\n"); 463 goto err_dev_reg; 464 } 465 466 return; 467 468err_dev_reg: 469 gpio_free(dvi_en_gpio); 470err_dvi_en: 471 gpio_free(lcd_bl_gpio); 472err_lcd_bl: 473 gpio_free(lcd_en_gpio); 474out: 475 476 return; 477} 478 479static struct regulator_consumer_supply cm_t35_vmmc1_supply = { 480 .supply = "vmmc", 481}; 482 483static struct regulator_consumer_supply cm_t35_vsim_supply = { 484 .supply = "vmmc_aux", 485}; 486 487static struct regulator_consumer_supply cm_t35_vdac_supply = { 488 .supply = "vdda_dac", 489 .dev = &cm_t35_dss_device.dev, 490}; 491 492static struct regulator_consumer_supply cm_t35_vdvi_supply = { 493 .supply = "vdvi", 494 .dev = &cm_t35_dss_device.dev, 495}; 496 497/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ 498static struct regulator_init_data cm_t35_vmmc1 = { 499 .constraints = { 500 .min_uV = 1850000, 501 .max_uV = 3150000, 502 .valid_modes_mask = REGULATOR_MODE_NORMAL 503 | REGULATOR_MODE_STANDBY, 504 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE 505 | REGULATOR_CHANGE_MODE 506 | REGULATOR_CHANGE_STATUS, 507 }, 508 .num_consumer_supplies = 1, 509 .consumer_supplies = &cm_t35_vmmc1_supply, 510}; 511 512/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ 513static struct regulator_init_data cm_t35_vsim = { 514 .constraints = { 515 .min_uV = 1800000, 516 .max_uV = 3000000, 517 .valid_modes_mask = REGULATOR_MODE_NORMAL 518 | REGULATOR_MODE_STANDBY, 519 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE 520 | REGULATOR_CHANGE_MODE 521 | REGULATOR_CHANGE_STATUS, 522 }, 523 .num_consumer_supplies = 1, 524 .consumer_supplies = &cm_t35_vsim_supply, 525}; 526 527/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ 528static struct regulator_init_data cm_t35_vdac = { 529 .constraints = { 530 .min_uV = 1800000, 531 .max_uV = 1800000, 532 .valid_modes_mask = REGULATOR_MODE_NORMAL 533 | REGULATOR_MODE_STANDBY, 534 .valid_ops_mask = REGULATOR_CHANGE_MODE 535 | REGULATOR_CHANGE_STATUS, 536 }, 537 .num_consumer_supplies = 1, 538 .consumer_supplies = &cm_t35_vdac_supply, 539}; 540 541/* VPLL2 for digital video outputs */ 542static struct regulator_init_data cm_t35_vpll2 = { 543 .constraints = { 544 .name = "VDVI", 545 .min_uV = 1800000, 546 .max_uV = 1800000, 547 .valid_modes_mask = REGULATOR_MODE_NORMAL 548 | REGULATOR_MODE_STANDBY, 549 .valid_ops_mask = REGULATOR_CHANGE_MODE 550 | REGULATOR_CHANGE_STATUS, 551 }, 552 .num_consumer_supplies = 1, 553 .consumer_supplies = &cm_t35_vdvi_supply, 554}; 555 556static struct twl4030_usb_data cm_t35_usb_data = { 557 .usb_mode = T2_USB_MODE_ULPI, 558}; 559 560static int cm_t35_keymap[] = { 561 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), 562 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), 563 KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D), 564}; 565 566static struct matrix_keymap_data cm_t35_keymap_data = { 567 .keymap = cm_t35_keymap, 568 .keymap_size = ARRAY_SIZE(cm_t35_keymap), 569}; 570 571static struct twl4030_keypad_data cm_t35_kp_data = { 572 .keymap_data = &cm_t35_keymap_data, 573 .rows = 3, 574 .cols = 3, 575 .rep = 1, 576}; 577 578static struct omap2_hsmmc_info mmc[] = { 579 { 580 .mmc = 1, 581 .wires = 4, 582 .gpio_cd = -EINVAL, 583 .gpio_wp = -EINVAL, 584 585 }, 586 { 587 .mmc = 2, 588 .wires = 4, 589 .transceiver = 1, 590 .gpio_cd = -EINVAL, 591 .gpio_wp = -EINVAL, 592 .ocr_mask = 0x00100000, /* 3.3V */ 593 }, 594 {} /* Terminator */ 595}; 596 597static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = { 598 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 599 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 600 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 601 602 .phy_reset = true, 603 .reset_gpio_port[0] = -EINVAL, 604 .reset_gpio_port[1] = -EINVAL, 605 .reset_gpio_port[2] = -EINVAL 606}; 607 608static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, 609 unsigned ngpio) 610{ 611 int wlan_rst = gpio + 2; 612 613 if ((gpio_request(wlan_rst, "WLAN RST") == 0) && 614 (gpio_direction_output(wlan_rst, 1) == 0)) { 615 gpio_export(wlan_rst, 0); 616 617 udelay(10); 618 gpio_set_value(wlan_rst, 0); 619 udelay(10); 620 gpio_set_value(wlan_rst, 1); 621 } else { 622 pr_err("CM-T35: could not obtain gpio for WiFi reset\n"); 623 } 624 625 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 626 mmc[0].gpio_cd = gpio + 0; 627 omap2_hsmmc_init(mmc); 628 629 /* link regulators to MMC adapters */ 630 cm_t35_vmmc1_supply.dev = mmc[0].dev; 631 cm_t35_vsim_supply.dev = mmc[0].dev; 632 633 /* setup USB with proper PHY reset GPIOs */ 634 ehci_pdata.reset_gpio_port[0] = gpio + 6; 635 ehci_pdata.reset_gpio_port[1] = gpio + 7; 636 637 usb_ehci_init(&ehci_pdata); 638 639 return 0; 640} 641 642static struct twl4030_gpio_platform_data cm_t35_gpio_data = { 643 .gpio_base = OMAP_MAX_GPIO_LINES, 644 .irq_base = TWL4030_GPIO_IRQ_BASE, 645 .irq_end = TWL4030_GPIO_IRQ_END, 646 .setup = cm_t35_twl_gpio_setup, 647}; 648 649static struct twl4030_platform_data cm_t35_twldata = { 650 .irq_base = TWL4030_IRQ_BASE, 651 .irq_end = TWL4030_IRQ_END, 652 653 /* platform_data for children goes here */ 654 .keypad = &cm_t35_kp_data, 655 .usb = &cm_t35_usb_data, 656 .gpio = &cm_t35_gpio_data, 657 .vmmc1 = &cm_t35_vmmc1, 658 .vsim = &cm_t35_vsim, 659 .vdac = &cm_t35_vdac, 660 .vpll2 = &cm_t35_vpll2, 661}; 662 663static struct i2c_board_info __initdata cm_t35_i2c_boardinfo[] = { 664 { 665 I2C_BOARD_INFO("tps65930", 0x48), 666 .flags = I2C_CLIENT_WAKE, 667 .irq = INT_34XX_SYS_NIRQ, 668 .platform_data = &cm_t35_twldata, 669 }, 670}; 671 672static void __init cm_t35_init_i2c(void) 673{ 674 omap_register_i2c_bus(1, 2600, cm_t35_i2c_boardinfo, 675 ARRAY_SIZE(cm_t35_i2c_boardinfo)); 676} 677 678static struct omap_board_config_kernel cm_t35_config[] __initdata = { 679}; 680 681static void __init cm_t35_init_irq(void) 682{ 683 omap_board_config = cm_t35_config; 684 omap_board_config_size = ARRAY_SIZE(cm_t35_config); 685 686 omap2_init_common_hw(mt46h32m32lf6_sdrc_params, 687 mt46h32m32lf6_sdrc_params); 688 omap_init_irq(); 689 omap_gpio_init(); 690} 691 692static struct omap_board_mux board_mux[] __initdata = { 693 /* nCS and IRQ for CM-T35 ethernet */ 694 OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0), 695 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), 696 697 /* nCS and IRQ for SB-T35 ethernet */ 698 OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0), 699 OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), 700 701 /* PENDOWN GPIO */ 702 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), 703 704 /* mUSB */ 705 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 706 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 707 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 708 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 709 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 710 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 711 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 712 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 713 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 714 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 715 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 716 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 717 718 /* MMC 2 */ 719 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), 720 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), 721 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), 722 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), 723 724 /* McSPI 1 */ 725 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 726 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 727 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 728 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), 729 730 /* McSPI 4 */ 731 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), 732 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), 733 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), 734 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP), 735 736 /* McBSP 2 */ 737 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 738 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 739 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 740 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 741 742 /* serial ports */ 743 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), 744 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), 745 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 746 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 747 748 /* DSS */ 749 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 750 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 751 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 752 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 753 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 754 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 755 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 756 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 757 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 758 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 759 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 760 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 761 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 762 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 763 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 764 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 765 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 766 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 767 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 768 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 769 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 770 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 771 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 772 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 773 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 774 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 775 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 776 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), 777 778 /* display controls */ 779 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), 780 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), 781 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), 782 783 /* TPS IRQ */ 784 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \ 785 OMAP_PIN_INPUT_PULLUP), 786 787 { .reg_offset = OMAP_MUX_TERMINATOR }, 788}; 789 790static struct omap_musb_board_data musb_board_data = { 791 .interface_type = MUSB_INTERFACE_ULPI, 792 .mode = MUSB_OTG, 793 .power = 100, 794}; 795 796static void __init cm_t35_init(void) 797{ 798 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); 799 omap_serial_init(); 800 cm_t35_init_i2c(); 801 cm_t35_init_nand(); 802 cm_t35_init_ads7846(); 803 cm_t35_init_ethernet(); 804 cm_t35_init_led(); 805 cm_t35_init_display(); 806 807 usb_musb_init(&musb_board_data); 808} 809 810MACHINE_START(CM_T35, "Compulab CM-T35") 811 .phys_io = 0x48000000, 812 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, 813 .boot_params = 0x80000100, 814 .map_io = omap3_map_io, 815 .reserve = omap_reserve, 816 .init_irq = cm_t35_init_irq, 817 .init_machine = cm_t35_init, 818 .timer = &omap_timer, 819MACHINE_END 820