1/* 2 * linux/arch/arm/mach-omap2/board-3430sdp.c 3 * 4 * Copyright (C) 2007 Texas Instruments 5 * 6 * Modified from mach-omap2/board-generic.c 7 * 8 * Initial code: Syed Mohammed Khasim 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15#include <linux/kernel.h> 16#include <linux/init.h> 17#include <linux/platform_device.h> 18#include <linux/delay.h> 19#include <linux/input.h> 20#include <linux/input/matrix_keypad.h> 21#include <linux/spi/spi.h> 22#include <linux/spi/ads7846.h> 23#include <linux/i2c/twl.h> 24#include <linux/regulator/machine.h> 25#include <linux/io.h> 26#include <linux/gpio.h> 27 28#include <mach/hardware.h> 29#include <asm/mach-types.h> 30#include <asm/mach/arch.h> 31#include <asm/mach/map.h> 32 33#include <plat/mcspi.h> 34#include <plat/board.h> 35#include <plat/usb.h> 36#include <plat/common.h> 37#include <plat/dma.h> 38#include <plat/gpmc.h> 39#include <plat/display.h> 40 41#include <plat/control.h> 42#include <plat/gpmc-smc91x.h> 43 44#include <mach/board-flash.h> 45 46#include "mux.h" 47#include "sdram-qimonda-hyb18m512160af-6.h" 48#include "hsmmc.h" 49#include "pm.h" 50 51#define CONFIG_DISABLE_HFCLK 1 52 53#define SDP3430_TS_GPIO_IRQ_SDPV1 3 54#define SDP3430_TS_GPIO_IRQ_SDPV2 2 55 56#define ENABLE_VAUX3_DEDICATED 0x03 57#define ENABLE_VAUX3_DEV_GRP 0x20 58 59#define TWL4030_MSECURE_GPIO 22 60 61static struct cpuidle_params omap3_cpuidle_params_table[] = { 62 /* C1 */ 63 {1, 2, 2, 5}, 64 /* C2 */ 65 {1, 10, 10, 30}, 66 /* C3 */ 67 {1, 50, 50, 300}, 68 /* C4 */ 69 {1, 1500, 1800, 4000}, 70 /* C5 */ 71 {1, 2500, 7500, 12000}, 72 /* C6 */ 73 {1, 3000, 8500, 15000}, 74 /* C7 */ 75 {1, 10000, 30000, 300000}, 76}; 77 78static int board_keymap[] = { 79 KEY(0, 0, KEY_LEFT), 80 KEY(0, 1, KEY_RIGHT), 81 KEY(0, 2, KEY_A), 82 KEY(0, 3, KEY_B), 83 KEY(0, 4, KEY_C), 84 KEY(1, 0, KEY_DOWN), 85 KEY(1, 1, KEY_UP), 86 KEY(1, 2, KEY_E), 87 KEY(1, 3, KEY_F), 88 KEY(1, 4, KEY_G), 89 KEY(2, 0, KEY_ENTER), 90 KEY(2, 1, KEY_I), 91 KEY(2, 2, KEY_J), 92 KEY(2, 3, KEY_K), 93 KEY(2, 4, KEY_3), 94 KEY(3, 0, KEY_M), 95 KEY(3, 1, KEY_N), 96 KEY(3, 2, KEY_O), 97 KEY(3, 3, KEY_P), 98 KEY(3, 4, KEY_Q), 99 KEY(4, 0, KEY_R), 100 KEY(4, 1, KEY_4), 101 KEY(4, 2, KEY_T), 102 KEY(4, 3, KEY_U), 103 KEY(4, 4, KEY_D), 104 KEY(5, 0, KEY_V), 105 KEY(5, 1, KEY_W), 106 KEY(5, 2, KEY_L), 107 KEY(5, 3, KEY_S), 108 KEY(5, 4, KEY_H), 109 0 110}; 111 112static struct matrix_keymap_data board_map_data = { 113 .keymap = board_keymap, 114 .keymap_size = ARRAY_SIZE(board_keymap), 115}; 116 117static struct twl4030_keypad_data sdp3430_kp_data = { 118 .keymap_data = &board_map_data, 119 .rows = 5, 120 .cols = 6, 121 .rep = 1, 122}; 123 124static int ts_gpio; /* Needed for ads7846_get_pendown_state */ 125 126/** 127 * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq 128 * 129 * @return - void. If request gpio fails then Flag KERN_ERR. 130 */ 131static void ads7846_dev_init(void) 132{ 133 if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) { 134 printk(KERN_ERR "can't get ads746 pen down GPIO\n"); 135 return; 136 } 137 138 gpio_direction_input(ts_gpio); 139 gpio_set_debounce(ts_gpio, 310); 140} 141 142static int ads7846_get_pendown_state(void) 143{ 144 return !gpio_get_value(ts_gpio); 145} 146 147static struct ads7846_platform_data tsc2046_config __initdata = { 148 .get_pendown_state = ads7846_get_pendown_state, 149 .keep_vref_on = 1, 150 .wakeup = true, 151}; 152 153 154static struct omap2_mcspi_device_config tsc2046_mcspi_config = { 155 .turbo_mode = 0, 156 .single_channel = 1, /* 0: slave, 1: master */ 157}; 158 159static struct spi_board_info sdp3430_spi_board_info[] __initdata = { 160 [0] = { 161 /* 162 * TSC2046 operates at a max freqency of 2MHz, so 163 * operate slightly below at 1.5MHz 164 */ 165 .modalias = "ads7846", 166 .bus_num = 1, 167 .chip_select = 0, 168 .max_speed_hz = 1500000, 169 .controller_data = &tsc2046_mcspi_config, 170 .irq = 0, 171 .platform_data = &tsc2046_config, 172 }, 173}; 174 175 176#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8 177#define SDP3430_LCD_PANEL_ENABLE_GPIO 5 178 179static unsigned backlight_gpio; 180static unsigned enable_gpio; 181static int lcd_enabled; 182static int dvi_enabled; 183 184static void __init sdp3430_display_init(void) 185{ 186 int r; 187 188 enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO; 189 backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO; 190 191 r = gpio_request(enable_gpio, "LCD reset"); 192 if (r) { 193 printk(KERN_ERR "failed to get LCD reset GPIO\n"); 194 goto err0; 195 } 196 197 r = gpio_request(backlight_gpio, "LCD Backlight"); 198 if (r) { 199 printk(KERN_ERR "failed to get LCD backlight GPIO\n"); 200 goto err1; 201 } 202 203 gpio_direction_output(enable_gpio, 0); 204 gpio_direction_output(backlight_gpio, 0); 205 206 return; 207err1: 208 gpio_free(enable_gpio); 209err0: 210 return; 211} 212 213static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev) 214{ 215 if (dvi_enabled) { 216 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); 217 return -EINVAL; 218 } 219 220 gpio_direction_output(enable_gpio, 1); 221 gpio_direction_output(backlight_gpio, 1); 222 223 lcd_enabled = 1; 224 225 return 0; 226} 227 228static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev) 229{ 230 lcd_enabled = 0; 231 232 gpio_direction_output(enable_gpio, 0); 233 gpio_direction_output(backlight_gpio, 0); 234} 235 236static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev) 237{ 238 if (lcd_enabled) { 239 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); 240 return -EINVAL; 241 } 242 243 dvi_enabled = 1; 244 245 return 0; 246} 247 248static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev) 249{ 250 dvi_enabled = 0; 251} 252 253static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev) 254{ 255 return 0; 256} 257 258static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev) 259{ 260} 261 262 263static struct omap_dss_device sdp3430_lcd_device = { 264 .name = "lcd", 265 .driver_name = "sharp_ls_panel", 266 .type = OMAP_DISPLAY_TYPE_DPI, 267 .phy.dpi.data_lines = 16, 268 .platform_enable = sdp3430_panel_enable_lcd, 269 .platform_disable = sdp3430_panel_disable_lcd, 270}; 271 272static struct omap_dss_device sdp3430_dvi_device = { 273 .name = "dvi", 274 .driver_name = "generic_panel", 275 .type = OMAP_DISPLAY_TYPE_DPI, 276 .phy.dpi.data_lines = 24, 277 .platform_enable = sdp3430_panel_enable_dvi, 278 .platform_disable = sdp3430_panel_disable_dvi, 279}; 280 281static struct omap_dss_device sdp3430_tv_device = { 282 .name = "tv", 283 .driver_name = "venc", 284 .type = OMAP_DISPLAY_TYPE_VENC, 285 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, 286 .platform_enable = sdp3430_panel_enable_tv, 287 .platform_disable = sdp3430_panel_disable_tv, 288}; 289 290 291static struct omap_dss_device *sdp3430_dss_devices[] = { 292 &sdp3430_lcd_device, 293 &sdp3430_dvi_device, 294 &sdp3430_tv_device, 295}; 296 297static struct omap_dss_board_info sdp3430_dss_data = { 298 .num_devices = ARRAY_SIZE(sdp3430_dss_devices), 299 .devices = sdp3430_dss_devices, 300 .default_device = &sdp3430_lcd_device, 301}; 302 303static struct platform_device sdp3430_dss_device = { 304 .name = "omapdss", 305 .id = -1, 306 .dev = { 307 .platform_data = &sdp3430_dss_data, 308 }, 309}; 310 311static struct regulator_consumer_supply sdp3430_vdda_dac_supply = { 312 .supply = "vdda_dac", 313 .dev = &sdp3430_dss_device.dev, 314}; 315 316static struct platform_device *sdp3430_devices[] __initdata = { 317 &sdp3430_dss_device, 318}; 319 320static struct omap_board_config_kernel sdp3430_config[] __initdata = { 321}; 322 323static void __init omap_3430sdp_init_irq(void) 324{ 325 omap_board_config = sdp3430_config; 326 omap_board_config_size = ARRAY_SIZE(sdp3430_config); 327 omap3_pm_init_cpuidle(omap3_cpuidle_params_table); 328 omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL); 329 omap_init_irq(); 330 omap_gpio_init(); 331} 332 333static int sdp3430_batt_table[] = { 334/* 0 C*/ 33530800, 29500, 28300, 27100, 33626000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, 33717200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, 33811600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, 3398020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, 3405640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, 3414040, 3910, 3790, 3670, 3550 342}; 343 344static struct twl4030_bci_platform_data sdp3430_bci_data = { 345 .battery_tmp_tbl = sdp3430_batt_table, 346 .tblsize = ARRAY_SIZE(sdp3430_batt_table), 347}; 348 349static struct omap2_hsmmc_info mmc[] = { 350 { 351 .mmc = 1, 352 /* 8 bits (default) requires S6.3 == ON, 353 * so the SIM card isn't used; else 4 bits. 354 */ 355 .wires = 8, 356 .gpio_wp = 4, 357 }, 358 { 359 .mmc = 2, 360 .wires = 8, 361 .gpio_wp = 7, 362 }, 363 {} /* Terminator */ 364}; 365 366static struct regulator_consumer_supply sdp3430_vmmc1_supply = { 367 .supply = "vmmc", 368}; 369 370static struct regulator_consumer_supply sdp3430_vsim_supply = { 371 .supply = "vmmc_aux", 372}; 373 374static struct regulator_consumer_supply sdp3430_vmmc2_supply = { 375 .supply = "vmmc", 376}; 377 378static int sdp3430_twl_gpio_setup(struct device *dev, 379 unsigned gpio, unsigned ngpio) 380{ 381 /* gpio + 0 is "mmc0_cd" (input/IRQ), 382 * gpio + 1 is "mmc1_cd" (input/IRQ) 383 */ 384 mmc[0].gpio_cd = gpio + 0; 385 mmc[1].gpio_cd = gpio + 1; 386 omap2_hsmmc_init(mmc); 387 388 /* link regulators to MMC adapters ... we "know" the 389 * regulators will be set up only *after* we return. 390 */ 391 sdp3430_vmmc1_supply.dev = mmc[0].dev; 392 sdp3430_vsim_supply.dev = mmc[0].dev; 393 sdp3430_vmmc2_supply.dev = mmc[1].dev; 394 395 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */ 396 gpio_request(gpio + 7, "sub_lcd_en_bkl"); 397 gpio_direction_output(gpio + 7, 0); 398 399 /* gpio + 15 is "sub_lcd_nRST" (output) */ 400 gpio_request(gpio + 15, "sub_lcd_nRST"); 401 gpio_direction_output(gpio + 15, 0); 402 403 return 0; 404} 405 406static struct twl4030_gpio_platform_data sdp3430_gpio_data = { 407 .gpio_base = OMAP_MAX_GPIO_LINES, 408 .irq_base = TWL4030_GPIO_IRQ_BASE, 409 .irq_end = TWL4030_GPIO_IRQ_END, 410 .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13) 411 | BIT(16) | BIT(17), 412 .setup = sdp3430_twl_gpio_setup, 413}; 414 415static struct twl4030_usb_data sdp3430_usb_data = { 416 .usb_mode = T2_USB_MODE_ULPI, 417}; 418 419static struct twl4030_madc_platform_data sdp3430_madc_data = { 420 .irq_line = 1, 421}; 422 423/* 424 * Apply all the fixed voltages since most versions of U-Boot 425 * don't bother with that initialization. 426 */ 427 428/* VAUX1 for mainboard (irda and sub-lcd) */ 429static struct regulator_init_data sdp3430_vaux1 = { 430 .constraints = { 431 .min_uV = 2800000, 432 .max_uV = 2800000, 433 .apply_uV = true, 434 .valid_modes_mask = REGULATOR_MODE_NORMAL 435 | REGULATOR_MODE_STANDBY, 436 .valid_ops_mask = REGULATOR_CHANGE_MODE 437 | REGULATOR_CHANGE_STATUS, 438 }, 439}; 440 441/* VAUX2 for camera module */ 442static struct regulator_init_data sdp3430_vaux2 = { 443 .constraints = { 444 .min_uV = 2800000, 445 .max_uV = 2800000, 446 .apply_uV = true, 447 .valid_modes_mask = REGULATOR_MODE_NORMAL 448 | REGULATOR_MODE_STANDBY, 449 .valid_ops_mask = REGULATOR_CHANGE_MODE 450 | REGULATOR_CHANGE_STATUS, 451 }, 452}; 453 454/* VAUX3 for LCD board */ 455static struct regulator_init_data sdp3430_vaux3 = { 456 .constraints = { 457 .min_uV = 2800000, 458 .max_uV = 2800000, 459 .apply_uV = true, 460 .valid_modes_mask = REGULATOR_MODE_NORMAL 461 | REGULATOR_MODE_STANDBY, 462 .valid_ops_mask = REGULATOR_CHANGE_MODE 463 | REGULATOR_CHANGE_STATUS, 464 }, 465}; 466 467/* VAUX4 for OMAP VDD_CSI2 (camera) */ 468static struct regulator_init_data sdp3430_vaux4 = { 469 .constraints = { 470 .min_uV = 1800000, 471 .max_uV = 1800000, 472 .apply_uV = true, 473 .valid_modes_mask = REGULATOR_MODE_NORMAL 474 | REGULATOR_MODE_STANDBY, 475 .valid_ops_mask = REGULATOR_CHANGE_MODE 476 | REGULATOR_CHANGE_STATUS, 477 }, 478}; 479 480/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ 481static struct regulator_init_data sdp3430_vmmc1 = { 482 .constraints = { 483 .min_uV = 1850000, 484 .max_uV = 3150000, 485 .valid_modes_mask = REGULATOR_MODE_NORMAL 486 | REGULATOR_MODE_STANDBY, 487 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE 488 | REGULATOR_CHANGE_MODE 489 | REGULATOR_CHANGE_STATUS, 490 }, 491 .num_consumer_supplies = 1, 492 .consumer_supplies = &sdp3430_vmmc1_supply, 493}; 494 495/* VMMC2 for MMC2 card */ 496static struct regulator_init_data sdp3430_vmmc2 = { 497 .constraints = { 498 .min_uV = 1850000, 499 .max_uV = 1850000, 500 .apply_uV = true, 501 .valid_modes_mask = REGULATOR_MODE_NORMAL 502 | REGULATOR_MODE_STANDBY, 503 .valid_ops_mask = REGULATOR_CHANGE_MODE 504 | REGULATOR_CHANGE_STATUS, 505 }, 506 .num_consumer_supplies = 1, 507 .consumer_supplies = &sdp3430_vmmc2_supply, 508}; 509 510/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ 511static struct regulator_init_data sdp3430_vsim = { 512 .constraints = { 513 .min_uV = 1800000, 514 .max_uV = 3000000, 515 .valid_modes_mask = REGULATOR_MODE_NORMAL 516 | REGULATOR_MODE_STANDBY, 517 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE 518 | REGULATOR_CHANGE_MODE 519 | REGULATOR_CHANGE_STATUS, 520 }, 521 .num_consumer_supplies = 1, 522 .consumer_supplies = &sdp3430_vsim_supply, 523}; 524 525/* VDAC for DSS driving S-Video */ 526static struct regulator_init_data sdp3430_vdac = { 527 .constraints = { 528 .min_uV = 1800000, 529 .max_uV = 1800000, 530 .apply_uV = true, 531 .valid_modes_mask = REGULATOR_MODE_NORMAL 532 | REGULATOR_MODE_STANDBY, 533 .valid_ops_mask = REGULATOR_CHANGE_MODE 534 | REGULATOR_CHANGE_STATUS, 535 }, 536 .num_consumer_supplies = 1, 537 .consumer_supplies = &sdp3430_vdda_dac_supply, 538}; 539 540/* VPLL2 for digital video outputs */ 541static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = { 542 { 543 .supply = "vdds_dsi", 544 .dev = &sdp3430_dss_device.dev, 545 } 546}; 547 548static struct regulator_init_data sdp3430_vpll2 = { 549 .constraints = { 550 .name = "VDVI", 551 .min_uV = 1800000, 552 .max_uV = 1800000, 553 .apply_uV = true, 554 .valid_modes_mask = REGULATOR_MODE_NORMAL 555 | REGULATOR_MODE_STANDBY, 556 .valid_ops_mask = REGULATOR_CHANGE_MODE 557 | REGULATOR_CHANGE_STATUS, 558 }, 559 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies), 560 .consumer_supplies = sdp3430_vpll2_supplies, 561}; 562 563static struct twl4030_codec_audio_data sdp3430_audio = { 564 .audio_mclk = 26000000, 565}; 566 567static struct twl4030_codec_data sdp3430_codec = { 568 .audio_mclk = 26000000, 569 .audio = &sdp3430_audio, 570}; 571 572static struct twl4030_platform_data sdp3430_twldata = { 573 .irq_base = TWL4030_IRQ_BASE, 574 .irq_end = TWL4030_IRQ_END, 575 576 /* platform_data for children goes here */ 577 .bci = &sdp3430_bci_data, 578 .gpio = &sdp3430_gpio_data, 579 .madc = &sdp3430_madc_data, 580 .keypad = &sdp3430_kp_data, 581 .usb = &sdp3430_usb_data, 582 .codec = &sdp3430_codec, 583 584 .vaux1 = &sdp3430_vaux1, 585 .vaux2 = &sdp3430_vaux2, 586 .vaux3 = &sdp3430_vaux3, 587 .vaux4 = &sdp3430_vaux4, 588 .vmmc1 = &sdp3430_vmmc1, 589 .vmmc2 = &sdp3430_vmmc2, 590 .vsim = &sdp3430_vsim, 591 .vdac = &sdp3430_vdac, 592 .vpll2 = &sdp3430_vpll2, 593}; 594 595static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = { 596 { 597 I2C_BOARD_INFO("twl4030", 0x48), 598 .flags = I2C_CLIENT_WAKE, 599 .irq = INT_34XX_SYS_NIRQ, 600 .platform_data = &sdp3430_twldata, 601 }, 602}; 603 604static int __init omap3430_i2c_init(void) 605{ 606 /* i2c1 for PMIC only */ 607 omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo, 608 ARRAY_SIZE(sdp3430_i2c_boardinfo)); 609 /* i2c2 on camera connector (for sensor control) and optional isp1301 */ 610 omap_register_i2c_bus(2, 400, NULL, 0); 611 /* i2c3 on display connector (for DVI, tfp410) */ 612 omap_register_i2c_bus(3, 400, NULL, 0); 613 return 0; 614} 615 616#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 617 618static struct omap_smc91x_platform_data board_smc91x_data = { 619 .cs = 3, 620 .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 | 621 IORESOURCE_IRQ_LOWLEVEL, 622}; 623 624static void __init board_smc91x_init(void) 625{ 626 if (omap_rev() > OMAP3430_REV_ES1_0) 627 board_smc91x_data.gpio_irq = 6; 628 else 629 board_smc91x_data.gpio_irq = 29; 630 631 gpmc_smc91x_init(&board_smc91x_data); 632} 633 634#else 635 636static inline void board_smc91x_init(void) 637{ 638} 639 640#endif 641 642static void enable_board_wakeup_source(void) 643{ 644 /* T2 interrupt line (keypad) */ 645 omap_mux_init_signal("sys_nirq", 646 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP); 647} 648 649static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 650 651 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 652 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 653 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 654 655 .phy_reset = true, 656 .reset_gpio_port[0] = 57, 657 .reset_gpio_port[1] = 61, 658 .reset_gpio_port[2] = -EINVAL 659}; 660 661#ifdef CONFIG_OMAP_MUX 662static struct omap_board_mux board_mux[] __initdata = { 663 { .reg_offset = OMAP_MUX_TERMINATOR }, 664}; 665#else 666#define board_mux NULL 667#endif 668 669/* 670 * SDP3430 V2 Board CS organization 671 * Different from SDP3430 V1. Now 4 switches used to specify CS 672 * 673 * See also the Switch S8 settings in the comments. 674 */ 675static char chip_sel_3430[][GPMC_CS_NUM] = { 676 {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */ 677 {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */ 678 {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */ 679}; 680 681static struct mtd_partition sdp_nor_partitions[] = { 682 /* bootloader (U-Boot, etc) in first sector */ 683 { 684 .name = "Bootloader-NOR", 685 .offset = 0, 686 .size = SZ_256K, 687 .mask_flags = MTD_WRITEABLE, /* force read-only */ 688 }, 689 /* bootloader params in the next sector */ 690 { 691 .name = "Params-NOR", 692 .offset = MTDPART_OFS_APPEND, 693 .size = SZ_256K, 694 .mask_flags = 0, 695 }, 696 /* kernel */ 697 { 698 .name = "Kernel-NOR", 699 .offset = MTDPART_OFS_APPEND, 700 .size = SZ_2M, 701 .mask_flags = 0 702 }, 703 /* file system */ 704 { 705 .name = "Filesystem-NOR", 706 .offset = MTDPART_OFS_APPEND, 707 .size = MTDPART_SIZ_FULL, 708 .mask_flags = 0 709 } 710}; 711 712static struct mtd_partition sdp_onenand_partitions[] = { 713 { 714 .name = "X-Loader-OneNAND", 715 .offset = 0, 716 .size = 4 * (64 * 2048), 717 .mask_flags = MTD_WRITEABLE /* force read-only */ 718 }, 719 { 720 .name = "U-Boot-OneNAND", 721 .offset = MTDPART_OFS_APPEND, 722 .size = 2 * (64 * 2048), 723 .mask_flags = MTD_WRITEABLE /* force read-only */ 724 }, 725 { 726 .name = "U-Boot Environment-OneNAND", 727 .offset = MTDPART_OFS_APPEND, 728 .size = 1 * (64 * 2048), 729 }, 730 { 731 .name = "Kernel-OneNAND", 732 .offset = MTDPART_OFS_APPEND, 733 .size = 16 * (64 * 2048), 734 }, 735 { 736 .name = "File System-OneNAND", 737 .offset = MTDPART_OFS_APPEND, 738 .size = MTDPART_SIZ_FULL, 739 }, 740}; 741 742static struct mtd_partition sdp_nand_partitions[] = { 743 /* All the partition sizes are listed in terms of NAND block size */ 744 { 745 .name = "X-Loader-NAND", 746 .offset = 0, 747 .size = 4 * (64 * 2048), 748 .mask_flags = MTD_WRITEABLE, /* force read-only */ 749 }, 750 { 751 .name = "U-Boot-NAND", 752 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ 753 .size = 10 * (64 * 2048), 754 .mask_flags = MTD_WRITEABLE, /* force read-only */ 755 }, 756 { 757 .name = "Boot Env-NAND", 758 759 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */ 760 .size = 6 * (64 * 2048), 761 }, 762 { 763 .name = "Kernel-NAND", 764 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ 765 .size = 40 * (64 * 2048), 766 }, 767 { 768 .name = "File System - NAND", 769 .size = MTDPART_SIZ_FULL, 770 .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */ 771 }, 772}; 773 774static struct flash_partitions sdp_flash_partitions[] = { 775 { 776 .parts = sdp_nor_partitions, 777 .nr_parts = ARRAY_SIZE(sdp_nor_partitions), 778 }, 779 { 780 .parts = sdp_onenand_partitions, 781 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions), 782 }, 783 { 784 .parts = sdp_nand_partitions, 785 .nr_parts = ARRAY_SIZE(sdp_nand_partitions), 786 }, 787}; 788 789static struct omap_musb_board_data musb_board_data = { 790 .interface_type = MUSB_INTERFACE_ULPI, 791 .mode = MUSB_OTG, 792 .power = 100, 793}; 794 795static void __init omap_3430sdp_init(void) 796{ 797 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 798 omap3430_i2c_init(); 799 platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices)); 800 if (omap_rev() > OMAP3430_REV_ES1_0) 801 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2; 802 else 803 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1; 804 sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio); 805 spi_register_board_info(sdp3430_spi_board_info, 806 ARRAY_SIZE(sdp3430_spi_board_info)); 807 ads7846_dev_init(); 808 omap_serial_init(); 809 usb_musb_init(&musb_board_data); 810 board_smc91x_init(); 811 board_flash_init(sdp_flash_partitions, chip_sel_3430); 812 sdp3430_display_init(); 813 enable_board_wakeup_source(); 814 usb_ehci_init(&ehci_pdata); 815} 816 817MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") 818 /* Maintainer: Syed Khasim - Texas Instruments Inc */ 819 .phys_io = 0x48000000, 820 .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, 821 .boot_params = 0x80000100, 822 .map_io = omap3_map_io, 823 .reserve = omap_reserve, 824 .init_irq = omap_3430sdp_init_irq, 825 .init_machine = omap_3430sdp_init, 826 .timer = &omap_timer, 827MACHINE_END 828