1/* 2 * arch/arm/mach-netx/nxdb500.c 3 * 4 * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 8 * as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 */ 19 20#include <linux/dma-mapping.h> 21#include <linux/init.h> 22#include <linux/interrupt.h> 23#include <linux/mtd/plat-ram.h> 24#include <linux/platform_device.h> 25#include <linux/amba/bus.h> 26#include <linux/amba/clcd.h> 27 28#include <mach/hardware.h> 29#include <asm/mach-types.h> 30#include <asm/mach/arch.h> 31#include <mach/netx-regs.h> 32#include <mach/eth.h> 33 34#include "generic.h" 35#include "fb.h" 36 37static struct clcd_panel qvga = { 38 .mode = { 39 .name = "QVGA", 40 .refresh = 60, 41 .xres = 240, 42 .yres = 320, 43 .pixclock = 187617, 44 .left_margin = 6, 45 .right_margin = 26, 46 .upper_margin = 0, 47 .lower_margin = 6, 48 .hsync_len = 6, 49 .vsync_len = 1, 50 .sync = 0, 51 .vmode = FB_VMODE_NONINTERLACED, 52 }, 53 .width = -1, 54 .height = -1, 55 .tim2 = 16, 56 .cntl = CNTL_LCDTFT | CNTL_BGR, 57 .bpp = 16, 58 .grayscale = 0, 59}; 60 61static inline int nxdb500_check(struct clcd_fb *fb, struct fb_var_screeninfo *var) 62{ 63 var->green.length = 5; 64 var->green.msb_right = 0; 65 66 return clcdfb_check(fb, var); 67} 68 69static int nxdb500_clcd_setup(struct clcd_fb *fb) 70{ 71 unsigned int val; 72 73 fb->fb.var.green.length = 5; 74 fb->fb.var.green.msb_right = 0; 75 76 /* enable asic control */ 77 val = readl(NETX_SYSTEM_IOC_ACCESS_KEY); 78 writel(val, NETX_SYSTEM_IOC_ACCESS_KEY); 79 80 writel(3, NETX_SYSTEM_IOC_CR); 81 82 val = readl(NETX_PIO_OUTPIO); 83 writel(val | 1, NETX_PIO_OUTPIO); 84 85 val = readl(NETX_PIO_OEPIO); 86 writel(val | 1, NETX_PIO_OEPIO); 87 return netx_clcd_setup(fb); 88} 89 90static struct clcd_board clcd_data = { 91 .name = "netX", 92 .check = nxdb500_check, 93 .decode = clcdfb_decode, 94 .enable = netx_clcd_enable, 95 .setup = nxdb500_clcd_setup, 96 .mmap = netx_clcd_mmap, 97 .remove = netx_clcd_remove, 98}; 99 100static struct netxeth_platform_data eth0_platform_data = { 101 .xcno = 0, 102}; 103 104static struct platform_device netx_eth0_device = { 105 .name = "netx-eth", 106 .id = 0, 107 .num_resources = 0, 108 .resource = NULL, 109 .dev = { 110 .platform_data = ð0_platform_data, 111 } 112}; 113 114static struct netxeth_platform_data eth1_platform_data = { 115 .xcno = 1, 116}; 117 118static struct platform_device netx_eth1_device = { 119 .name = "netx-eth", 120 .id = 1, 121 .num_resources = 0, 122 .resource = NULL, 123 .dev = { 124 .platform_data = ð1_platform_data, 125 } 126}; 127 128static struct resource netx_uart0_resources[] = { 129 [0] = { 130 .start = 0x00100A00, 131 .end = 0x00100A3F, 132 .flags = IORESOURCE_MEM, 133 }, 134 [1] = { 135 .start = (NETX_IRQ_UART0), 136 .end = (NETX_IRQ_UART0), 137 .flags = IORESOURCE_IRQ, 138 }, 139}; 140 141static struct platform_device netx_uart0_device = { 142 .name = "netx-uart", 143 .id = 0, 144 .num_resources = ARRAY_SIZE(netx_uart0_resources), 145 .resource = netx_uart0_resources, 146}; 147 148static struct resource netx_uart1_resources[] = { 149 [0] = { 150 .start = 0x00100A40, 151 .end = 0x00100A7F, 152 .flags = IORESOURCE_MEM, 153 }, 154 [1] = { 155 .start = (NETX_IRQ_UART1), 156 .end = (NETX_IRQ_UART1), 157 .flags = IORESOURCE_IRQ, 158 }, 159}; 160 161static struct platform_device netx_uart1_device = { 162 .name = "netx-uart", 163 .id = 1, 164 .num_resources = ARRAY_SIZE(netx_uart1_resources), 165 .resource = netx_uart1_resources, 166}; 167 168static struct resource netx_uart2_resources[] = { 169 [0] = { 170 .start = 0x00100A80, 171 .end = 0x00100ABF, 172 .flags = IORESOURCE_MEM, 173 }, 174 [1] = { 175 .start = (NETX_IRQ_UART2), 176 .end = (NETX_IRQ_UART2), 177 .flags = IORESOURCE_IRQ, 178 }, 179}; 180 181static struct platform_device netx_uart2_device = { 182 .name = "netx-uart", 183 .id = 2, 184 .num_resources = ARRAY_SIZE(netx_uart2_resources), 185 .resource = netx_uart2_resources, 186}; 187 188static struct platform_device *devices[] __initdata = { 189 &netx_eth0_device, 190 &netx_eth1_device, 191 &netx_uart0_device, 192 &netx_uart1_device, 193 &netx_uart2_device, 194}; 195 196static void __init nxdb500_init(void) 197{ 198 netx_fb_init(&clcd_data, &qvga); 199 platform_add_devices(devices, ARRAY_SIZE(devices)); 200} 201 202MACHINE_START(NXDB500, "Hilscher nxdb500") 203 .phys_io = 0x00100000, 204 .io_pg_offst = (io_p2v(0x00100000) >> 18) & 0xfffc, 205 .boot_params = 0x80000100, 206 .map_io = netx_map_io, 207 .init_irq = netx_init_irq, 208 .timer = &netx_timer, 209 .init_machine = nxdb500_init, 210MACHINE_END 211