1/* 2 * Copyright (C) 1999,2000 Arm Limited 3 * Copyright (C) 2000 Deep Blue Solutions Ltd 4 * Copyright (C) 2002 Shane Nay (shane@minirl.com) 5 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. 6 * - add MX31 specific definitions 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 */ 18 19#include <linux/mm.h> 20#include <linux/init.h> 21#include <linux/err.h> 22 23#include <asm/pgtable.h> 24#include <asm/mach/map.h> 25#include <asm/hardware/cache-l2x0.h> 26 27#include <mach/common.h> 28#include <mach/hardware.h> 29#include <mach/iomux-v3.h> 30 31/*! 32 * @file mm.c 33 * 34 * @brief This file creates static virtual to physical mappings, common to all MX3 boards. 35 * 36 * @ingroup Memory 37 */ 38 39/*! 40 * This table defines static virtual address mappings for I/O regions. 41 * These are the mappings common across all MX3 boards. 42 */ 43static struct map_desc mxc_io_desc[] __initdata = { 44 { 45 .virtual = X_MEMC_BASE_ADDR_VIRT, 46 .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR), 47 .length = X_MEMC_SIZE, 48 .type = MT_DEVICE 49 }, { 50 .virtual = AVIC_BASE_ADDR_VIRT, 51 .pfn = __phys_to_pfn(AVIC_BASE_ADDR), 52 .length = AVIC_SIZE, 53 .type = MT_DEVICE_NONSHARED 54 }, { 55 .virtual = AIPS1_BASE_ADDR_VIRT, 56 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), 57 .length = AIPS1_SIZE, 58 .type = MT_DEVICE_NONSHARED 59 }, { 60 .virtual = AIPS2_BASE_ADDR_VIRT, 61 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), 62 .length = AIPS2_SIZE, 63 .type = MT_DEVICE_NONSHARED 64 }, { 65 .virtual = SPBA0_BASE_ADDR_VIRT, 66 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), 67 .length = SPBA0_SIZE, 68 .type = MT_DEVICE_NONSHARED 69 }, 70}; 71 72/*! 73 * This function initializes the memory map. It is called during the 74 * system startup to create static physical to virtual memory mappings 75 * for the IO modules. 76 */ 77void __init mx31_map_io(void) 78{ 79 mxc_set_cpu_type(MXC_CPU_MX31); 80 mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); 81 82 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 83} 84 85#ifdef CONFIG_ARCH_MX35 86void __init mx35_map_io(void) 87{ 88 mxc_set_cpu_type(MXC_CPU_MX35); 89 mxc_iomux_v3_init(IO_ADDRESS(IOMUXC_BASE_ADDR)); 90 mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); 91 92 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 93} 94#endif 95 96int imx3x_register_gpios(void); 97 98void __init mx31_init_irq(void) 99{ 100 mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR)); 101 imx3x_register_gpios(); 102} 103 104void __init mx35_init_irq(void) 105{ 106 mx31_init_irq(); 107} 108 109#ifdef CONFIG_CACHE_L2X0 110static int mxc_init_l2x0(void) 111{ 112 void __iomem *l2x0_base; 113 114 l2x0_base = ioremap(L2CC_BASE_ADDR, 4096); 115 if (IS_ERR(l2x0_base)) { 116 printk(KERN_ERR "remapping L2 cache area failed with %ld\n", 117 PTR_ERR(l2x0_base)); 118 return 0; 119 } 120 121 l2x0_init(l2x0_base, 0x00030024, 0x00000000); 122 123 return 0; 124} 125 126arch_initcall(mxc_init_l2x0); 127#endif 128