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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-integrator/
1/*
2 *  linux/arch/arm/mach-integrator/pci-integrator.c
3 *
4 *  Copyright (C) 1999 ARM Limited
5 *  Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20 *
21 *
22 *  PCI functions for Integrator
23 */
24#include <linux/kernel.h>
25#include <linux/pci.h>
26#include <linux/interrupt.h>
27#include <linux/init.h>
28
29#include <asm/irq.h>
30#include <asm/system.h>
31#include <asm/mach/pci.h>
32#include <asm/mach-types.h>
33
34/*
35 * A small note about bridges and interrupts.  The DECchip 21050 (and
36 * later) adheres to the PCI-PCI bridge specification.  This says that
37 * the interrupts on the other side of a bridge are swizzled in the
38 * following manner:
39 *
40 * Dev    Interrupt   Interrupt
41 *        Pin on      Pin on
42 *        Device      Connector
43 *
44 *   4    A           A
45 *        B           B
46 *        C           C
47 *        D           D
48 *
49 *   5    A           B
50 *        B           C
51 *        C           D
52 *        D           A
53 *
54 *   6    A           C
55 *        B           D
56 *        C           A
57 *        D           B
58 *
59 *   7    A           D
60 *        B           A
61 *        C           B
62 *        D           C
63 *
64 * Where A = pin 1, B = pin 2 and so on and pin=0 = default = A.
65 * Thus, each swizzle is ((pin-1) + (device#-4)) % 4
66 */
67
68/*
69 * This routine handles multiple bridges.
70 */
71static u8 __init integrator_swizzle(struct pci_dev *dev, u8 *pinp)
72{
73	int pin = *pinp;
74
75	if (pin == 0)
76		pin = 1;
77
78	while (dev->bus->self) {
79		pin = pci_swizzle_interrupt_pin(dev, pin);
80		/*
81		 * move up the chain of bridges, swizzling as we go.
82		 */
83		dev = dev->bus->self;
84	}
85	*pinp = pin;
86
87	return PCI_SLOT(dev->devfn);
88}
89
90static int irq_tab[4] __initdata = {
91	IRQ_AP_PCIINT0,	IRQ_AP_PCIINT1,	IRQ_AP_PCIINT2,	IRQ_AP_PCIINT3
92};
93
94/*
95 * map the specified device/slot/pin to an IRQ.  This works out such
96 * that slot 9 pin 1 is INT0, pin 2 is INT1, and slot 10 pin 1 is INT1.
97 */
98static int __init integrator_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
99{
100	int intnr = ((slot - 9) + (pin - 1)) & 3;
101
102	return irq_tab[intnr];
103}
104
105extern void pci_v3_init(void *);
106
107static struct hw_pci integrator_pci __initdata = {
108	.swizzle		= integrator_swizzle,
109	.map_irq		= integrator_map_irq,
110	.setup			= pci_v3_setup,
111	.nr_controllers		= 1,
112	.scan			= pci_v3_scan_bus,
113	.preinit		= pci_v3_preinit,
114	.postinit		= pci_v3_postinit,
115};
116
117static int __init integrator_pci_init(void)
118{
119	if (machine_is_integrator())
120		pci_common_init(&integrator_pci);
121	return 0;
122}
123
124subsys_initcall(integrator_pci_init);
125