1/***************************************************************************** 2* Copyright 2001 - 2008 Broadcom Corporation. All rights reserved. 3* 4* Unless you and Broadcom execute a separate written software license 5* agreement governing use of this software, this software is licensed to you 6* under the terms of the GNU General Public License version 2, available at 7* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). 8* 9* Notwithstanding the above, under no circumstances may you combine this 10* software in any way with any other Broadcom software provided under a 11* license other than the GPL, without Broadcom's express prior written 12* consent. 13*****************************************************************************/ 14 15/* 16* 17***************************************************************************** 18* 19* REG_NAND.h 20* 21* PURPOSE: 22* 23* This file contains definitions for the nand registers: 24* 25* NOTES: 26* 27*****************************************************************************/ 28 29#if !defined(__ASM_ARCH_REG_NAND_H) 30#define __ASM_ARCH_REG_NAND_H 31 32/* ---- Include Files ---------------------------------------------------- */ 33#include <csp/reg.h> 34#include <mach/reg_umi.h> 35 36/* ---- Constants and Types ---------------------------------------------- */ 37 38#define HW_NAND_BASE MM_IO_BASE_NAND /* NAND Flash */ 39 40/* DMA accesses by the bootstrap need hard nonvirtual addresses */ 41#define REG_NAND_CMD __REG16(HW_NAND_BASE + 0) 42#define REG_NAND_ADDR __REG16(HW_NAND_BASE + 4) 43 44#define REG_NAND_PHYS_DATA16 (HW_NAND_BASE + 8) 45#define REG_NAND_PHYS_DATA8 (HW_NAND_BASE + 8) 46#define REG_NAND_DATA16 __REG16(REG_NAND_PHYS_DATA16) 47#define REG_NAND_DATA8 __REG8(REG_NAND_PHYS_DATA8) 48 49/* use appropriate offset to make sure it start at the 1K boundary */ 50#define REG_NAND_PHYS_DATA_DMA (HW_NAND_BASE + 0x400) 51#define REG_NAND_DATA_DMA __REG32(REG_NAND_PHYS_DATA_DMA) 52 53/* Linux DMA requires physical address of the data register */ 54#define REG_NAND_DATA16_PADDR HW_IO_VIRT_TO_PHYS(REG_NAND_PHYS_DATA16) 55#define REG_NAND_DATA8_PADDR HW_IO_VIRT_TO_PHYS(REG_NAND_PHYS_DATA8) 56#define REG_NAND_DATA_PADDR HW_IO_VIRT_TO_PHYS(REG_NAND_PHYS_DATA_DMA) 57 58#define NAND_BUS_16BIT() (0) 59#define NAND_BUS_8BIT() (!NAND_BUS_16BIT()) 60 61/* Register offsets */ 62#define REG_NAND_CMD_OFFSET (0) 63#define REG_NAND_ADDR_OFFSET (4) 64#define REG_NAND_DATA8_OFFSET (8) 65 66#endif 67