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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/Documentation/sound/alsa/soc/
1Audio Clocking
2==============
3
4This text describes the audio clocking terms in ASoC and digital audio in
5general. Note: Audio clocking can be complex!
6
7
8Master Clock
9------------
10
11Every audio subsystem is driven by a master clock (sometimes referred to as MCLK
12or SYSCLK). This audio master clock can be derived from a number of sources
13(e.g. crystal, PLL, CPU clock) and is responsible for producing the correct
14audio playback and capture sample rates.
15
16Some master clocks (e.g. PLLs and CPU based clocks) are configurable in that
17their speed can be altered by software (depending on the system use and to save
18power). Other master clocks are fixed at a set frequency (i.e. crystals).
19
20
21DAI Clocks
22----------
23The Digital Audio Interface is usually driven by a Bit Clock (often referred to
24as BCLK). This clock is used to drive the digital audio data across the link
25between the codec and CPU.
26
27The DAI also has a frame clock to signal the start of each audio frame. This
28clock is sometimes referred to as LRC (left right clock) or FRAME. This clock
29runs at exactly the sample rate (LRC = Rate).
30
31Bit Clock can be generated as follows:-
32
33BCLK = MCLK / x
34
35 or
36
37BCLK = LRC * x
38
39 or
40
41BCLK = LRC * Channels * Word Size
42
43This relationship depends on the codec or SoC CPU in particular. In general
44it is best to configure BCLK to the lowest possible speed (depending on your
45rate, number of channels and word size) to save on power.
46
47It is also desirable to use the codec (if possible) to drive (or master) the
48audio clocks as it usually gives more accurate sample rates than the CPU.
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