1/*	$NetBSD: r8a7793-clock.h,v 1.1.1.3 2019/01/22 14:57:01 jmcneill Exp $	*/
2
3/* SPDX-License-Identifier: GPL-2.0
4 *
5 * r8a7793 clock definition
6 *
7 * Copyright (C) 2014  Renesas Electronics Corporation
8 */
9
10#ifndef __DT_BINDINGS_CLOCK_R8A7793_H__
11#define __DT_BINDINGS_CLOCK_R8A7793_H__
12
13/* CPG */
14#define R8A7793_CLK_MAIN		0
15#define R8A7793_CLK_PLL0		1
16#define R8A7793_CLK_PLL1		2
17#define R8A7793_CLK_PLL3		3
18#define R8A7793_CLK_LB			4
19#define R8A7793_CLK_QSPI		5
20#define R8A7793_CLK_SDH			6
21#define R8A7793_CLK_SD0			7
22#define R8A7793_CLK_Z			8
23#define R8A7793_CLK_RCAN		9
24#define R8A7793_CLK_ADSP		10
25
26/* MSTP0 */
27#define R8A7793_CLK_MSIOF0		0
28
29/* MSTP1 */
30#define R8A7793_CLK_VCP0		1
31#define R8A7793_CLK_VPC0		3
32#define R8A7793_CLK_SSP1		9
33#define R8A7793_CLK_TMU1		11
34#define R8A7793_CLK_3DG			12
35#define R8A7793_CLK_2DDMAC		15
36#define R8A7793_CLK_FDP1_1		18
37#define R8A7793_CLK_FDP1_0		19
38#define R8A7793_CLK_TMU3		21
39#define R8A7793_CLK_TMU2		22
40#define R8A7793_CLK_CMT0		24
41#define R8A7793_CLK_TMU0		25
42#define R8A7793_CLK_VSP1_DU1		27
43#define R8A7793_CLK_VSP1_DU0		28
44#define R8A7793_CLK_VSP1_S		31
45
46/* MSTP2 */
47#define R8A7793_CLK_SCIFA2		2
48#define R8A7793_CLK_SCIFA1		3
49#define R8A7793_CLK_SCIFA0		4
50#define R8A7793_CLK_MSIOF2		5
51#define R8A7793_CLK_SCIFB0		6
52#define R8A7793_CLK_SCIFB1		7
53#define R8A7793_CLK_MSIOF1		8
54#define R8A7793_CLK_SCIFB2		16
55#define R8A7793_CLK_SYS_DMAC1		18
56#define R8A7793_CLK_SYS_DMAC0		19
57
58/* MSTP3 */
59#define R8A7793_CLK_TPU0		4
60#define R8A7793_CLK_SDHI2		11
61#define R8A7793_CLK_SDHI1		12
62#define R8A7793_CLK_SDHI0		14
63#define R8A7793_CLK_MMCIF0		15
64#define R8A7793_CLK_IIC0		18
65#define R8A7793_CLK_PCIEC		19
66#define R8A7793_CLK_IIC1		23
67#define R8A7793_CLK_SSUSB		28
68#define R8A7793_CLK_CMT1		29
69#define R8A7793_CLK_USBDMAC0		30
70#define R8A7793_CLK_USBDMAC1		31
71
72/* MSTP4 */
73#define R8A7793_CLK_IRQC		7
74#define R8A7793_CLK_INTC_SYS		8
75
76/* MSTP5 */
77#define R8A7793_CLK_AUDIO_DMAC1		1
78#define R8A7793_CLK_AUDIO_DMAC0		2
79#define R8A7793_CLK_ADSP_MOD		6
80#define R8A7793_CLK_THERMAL		22
81#define R8A7793_CLK_PWM			23
82
83/* MSTP7 */
84#define R8A7793_CLK_EHCI		3
85#define R8A7793_CLK_HSUSB		4
86#define R8A7793_CLK_HSCIF2		13
87#define R8A7793_CLK_SCIF5		14
88#define R8A7793_CLK_SCIF4		15
89#define R8A7793_CLK_HSCIF1		16
90#define R8A7793_CLK_HSCIF0		17
91#define R8A7793_CLK_SCIF3		18
92#define R8A7793_CLK_SCIF2		19
93#define R8A7793_CLK_SCIF1		20
94#define R8A7793_CLK_SCIF0		21
95#define R8A7793_CLK_DU1			23
96#define R8A7793_CLK_DU0			24
97#define R8A7793_CLK_LVDS0		26
98
99/* MSTP8 */
100#define R8A7793_CLK_IPMMU_SGX		0
101#define R8A7793_CLK_VIN2		9
102#define R8A7793_CLK_VIN1		10
103#define R8A7793_CLK_VIN0		11
104#define R8A7793_CLK_ETHER		13
105#define R8A7793_CLK_SATA1		14
106#define R8A7793_CLK_SATA0		15
107
108/* MSTP9 */
109#define R8A7793_CLK_GPIO7		4
110#define R8A7793_CLK_GPIO6		5
111#define R8A7793_CLK_GPIO5		7
112#define R8A7793_CLK_GPIO4		8
113#define R8A7793_CLK_GPIO3		9
114#define R8A7793_CLK_GPIO2		10
115#define R8A7793_CLK_GPIO1		11
116#define R8A7793_CLK_GPIO0		12
117#define R8A7793_CLK_RCAN1		15
118#define R8A7793_CLK_RCAN0		16
119#define R8A7793_CLK_QSPI_MOD		17
120#define R8A7793_CLK_I2C5		25
121#define R8A7793_CLK_IICDVFS		26
122#define R8A7793_CLK_I2C4		27
123#define R8A7793_CLK_I2C3		28
124#define R8A7793_CLK_I2C2		29
125#define R8A7793_CLK_I2C1		30
126#define R8A7793_CLK_I2C0		31
127
128/* MSTP10 */
129#define R8A7793_CLK_SSI_ALL		5
130#define R8A7793_CLK_SSI9		6
131#define R8A7793_CLK_SSI8		7
132#define R8A7793_CLK_SSI7		8
133#define R8A7793_CLK_SSI6		9
134#define R8A7793_CLK_SSI5		10
135#define R8A7793_CLK_SSI4		11
136#define R8A7793_CLK_SSI3		12
137#define R8A7793_CLK_SSI2		13
138#define R8A7793_CLK_SSI1		14
139#define R8A7793_CLK_SSI0		15
140#define R8A7793_CLK_SCU_ALL		17
141#define R8A7793_CLK_SCU_DVC1		18
142#define R8A7793_CLK_SCU_DVC0		19
143#define R8A7793_CLK_SCU_CTU1_MIX1	20
144#define R8A7793_CLK_SCU_CTU0_MIX0	21
145#define R8A7793_CLK_SCU_SRC9		22
146#define R8A7793_CLK_SCU_SRC8		23
147#define R8A7793_CLK_SCU_SRC7		24
148#define R8A7793_CLK_SCU_SRC6		25
149#define R8A7793_CLK_SCU_SRC5		26
150#define R8A7793_CLK_SCU_SRC4		27
151#define R8A7793_CLK_SCU_SRC3		28
152#define R8A7793_CLK_SCU_SRC2		29
153#define R8A7793_CLK_SCU_SRC1		30
154#define R8A7793_CLK_SCU_SRC0		31
155
156/* MSTP11 */
157#define R8A7793_CLK_SCIFA3		6
158#define R8A7793_CLK_SCIFA4		7
159#define R8A7793_CLK_SCIFA5		8
160
161#endif /* __DT_BINDINGS_CLOCK_R8A7793_H__ */
162