1/*	$NetBSD: r8a7740-clock.h,v 1.1.1.2 2020/01/03 14:33:05 skrll Exp $	*/
2
3/* SPDX-License-Identifier: GPL-2.0-or-later */
4/*
5 * Copyright 2014 Ulrich Hecht
6 */
7
8#ifndef __DT_BINDINGS_CLOCK_R8A7740_H__
9#define __DT_BINDINGS_CLOCK_R8A7740_H__
10
11/* CPG */
12#define R8A7740_CLK_SYSTEM	0
13#define R8A7740_CLK_PLLC0	1
14#define R8A7740_CLK_PLLC1	2
15#define R8A7740_CLK_PLLC2	3
16#define R8A7740_CLK_R		4
17#define R8A7740_CLK_USB24S	5
18#define R8A7740_CLK_I		6
19#define R8A7740_CLK_ZG		7
20#define R8A7740_CLK_B		8
21#define R8A7740_CLK_M1		9
22#define R8A7740_CLK_HP		10
23#define R8A7740_CLK_HPP		11
24#define R8A7740_CLK_USBP	12
25#define R8A7740_CLK_S		13
26#define R8A7740_CLK_ZB		14
27#define R8A7740_CLK_M3		15
28#define R8A7740_CLK_CP		16
29
30/* MSTP1 */
31#define R8A7740_CLK_CEU21	28
32#define R8A7740_CLK_CEU20	27
33#define R8A7740_CLK_TMU0	25
34#define R8A7740_CLK_LCDC1	17
35#define R8A7740_CLK_IIC0	16
36#define R8A7740_CLK_TMU1	11
37#define R8A7740_CLK_LCDC0	0
38
39/* MSTP2 */
40#define R8A7740_CLK_SCIFA6	30
41#define R8A7740_CLK_INTCA	29
42#define R8A7740_CLK_SCIFA7	22
43#define R8A7740_CLK_DMAC1	18
44#define R8A7740_CLK_DMAC2	17
45#define R8A7740_CLK_DMAC3	16
46#define R8A7740_CLK_USBDMAC	14
47#define R8A7740_CLK_SCIFA5	7
48#define R8A7740_CLK_SCIFB	6
49#define R8A7740_CLK_SCIFA0	4
50#define R8A7740_CLK_SCIFA1	3
51#define R8A7740_CLK_SCIFA2	2
52#define R8A7740_CLK_SCIFA3	1
53#define R8A7740_CLK_SCIFA4	0
54
55/* MSTP3 */
56#define R8A7740_CLK_CMT1	29
57#define R8A7740_CLK_FSI		28
58#define R8A7740_CLK_IIC1	23
59#define R8A7740_CLK_USBF	20
60#define R8A7740_CLK_SDHI0	14
61#define R8A7740_CLK_SDHI1	13
62#define R8A7740_CLK_MMC		12
63#define R8A7740_CLK_GETHER	9
64#define R8A7740_CLK_TPU0	4
65
66/* MSTP4 */
67#define R8A7740_CLK_USBH	16
68#define R8A7740_CLK_SDHI2	15
69#define R8A7740_CLK_USBFUNC	7
70#define R8A7740_CLK_USBPHY	6
71
72/* SUBCK* */
73#define R8A7740_CLK_SUBCK	9
74#define R8A7740_CLK_SUBCK2	10
75
76#endif /* __DT_BINDINGS_CLOCK_R8A7740_H__ */
77