1/*	$NetBSD: r8a73a4-clock.h,v 1.1.1.3 2020/01/03 14:33:05 skrll Exp $	*/
2
3/* SPDX-License-Identifier: GPL-2.0-or-later */
4/*
5 * Copyright 2014 Ulrich Hecht
6 */
7
8#ifndef __DT_BINDINGS_CLOCK_R8A73A4_H__
9#define __DT_BINDINGS_CLOCK_R8A73A4_H__
10
11/* CPG */
12#define R8A73A4_CLK_MAIN	0
13#define R8A73A4_CLK_PLL0	1
14#define R8A73A4_CLK_PLL1	2
15#define R8A73A4_CLK_PLL2	3
16#define R8A73A4_CLK_PLL2S	4
17#define R8A73A4_CLK_PLL2H	5
18#define R8A73A4_CLK_Z		6
19#define R8A73A4_CLK_Z2		7
20#define R8A73A4_CLK_I		8
21#define R8A73A4_CLK_M3		9
22#define R8A73A4_CLK_B		10
23#define R8A73A4_CLK_M1		11
24#define R8A73A4_CLK_M2		12
25#define R8A73A4_CLK_ZX		13
26#define R8A73A4_CLK_ZS		14
27#define R8A73A4_CLK_HP		15
28
29/* MSTP2 */
30#define R8A73A4_CLK_DMAC	18
31#define R8A73A4_CLK_SCIFB3	17
32#define R8A73A4_CLK_SCIFB2	16
33#define R8A73A4_CLK_SCIFB1	7
34#define R8A73A4_CLK_SCIFB0	6
35#define R8A73A4_CLK_SCIFA0	4
36#define R8A73A4_CLK_SCIFA1	3
37
38/* MSTP3 */
39#define R8A73A4_CLK_CMT1	29
40#define R8A73A4_CLK_IIC1	23
41#define R8A73A4_CLK_IIC0	18
42#define R8A73A4_CLK_IIC7	17
43#define R8A73A4_CLK_IIC6	16
44#define R8A73A4_CLK_MMCIF0	15
45#define R8A73A4_CLK_SDHI0	14
46#define R8A73A4_CLK_SDHI1	13
47#define R8A73A4_CLK_SDHI2	12
48#define R8A73A4_CLK_MMCIF1	5
49#define R8A73A4_CLK_IIC2	0
50
51/* MSTP4 */
52#define R8A73A4_CLK_IIC3	11
53#define R8A73A4_CLK_IIC4	10
54#define R8A73A4_CLK_IIC5	9
55#define R8A73A4_CLK_INTC_SYS	8
56#define R8A73A4_CLK_IRQC	7
57
58/* MSTP5 */
59#define R8A73A4_CLK_THERMAL	22
60#define R8A73A4_CLK_IIC8	15
61
62#endif /* __DT_BINDINGS_CLOCK_R8A73A4_H__ */
63