1/*	$NetBSD: virtgpu_drv.h,v 1.3 2021/12/18 23:45:45 riastradh Exp $	*/
2
3/*
4 * Copyright (C) 2015 Red Hat, Inc.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining
8 * a copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sublicense, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial
17 * portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 */
27
28#ifndef VIRTIO_DRV_H
29#define VIRTIO_DRV_H
30
31#include <linux/virtio.h>
32#include <linux/virtio_ids.h>
33#include <linux/virtio_config.h>
34#include <linux/virtio_gpu.h>
35
36#include <drm/drm_atomic.h>
37#include <drm/drm_encoder.h>
38#include <drm/drm_fb_helper.h>
39#include <drm/drm_gem.h>
40#include <drm/drm_gem_shmem_helper.h>
41#include <drm/drm_ioctl.h>
42#include <drm/drm_probe_helper.h>
43#include <drm/virtgpu_drm.h>
44
45#define DRIVER_NAME "virtio_gpu"
46#define DRIVER_DESC "virtio GPU"
47#define DRIVER_DATE "0"
48
49#define DRIVER_MAJOR 0
50#define DRIVER_MINOR 1
51#define DRIVER_PATCHLEVEL 0
52
53struct virtio_gpu_object_params {
54	uint32_t format;
55	uint32_t width;
56	uint32_t height;
57	unsigned long size;
58	bool dumb;
59	/* 3d */
60	bool virgl;
61	uint32_t target;
62	uint32_t bind;
63	uint32_t depth;
64	uint32_t array_size;
65	uint32_t last_level;
66	uint32_t nr_samples;
67	uint32_t flags;
68};
69
70struct virtio_gpu_object {
71	struct drm_gem_shmem_object base;
72	uint32_t hw_res_handle;
73
74	struct sg_table *pages;
75	uint32_t mapped;
76	bool dumb;
77	bool created;
78};
79#define gem_to_virtio_gpu_obj(gobj) \
80	container_of((gobj), struct virtio_gpu_object, base.base)
81
82struct virtio_gpu_object_array {
83	struct ww_acquire_ctx ticket;
84	struct list_head next;
85	u32 nents, total;
86	struct drm_gem_object *objs[];
87};
88
89struct virtio_gpu_vbuffer;
90struct virtio_gpu_device;
91
92typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
93				   struct virtio_gpu_vbuffer *vbuf);
94
95struct virtio_gpu_fence_driver {
96	atomic64_t       last_seq;
97	uint64_t         sync_seq;
98	uint64_t         context;
99	struct list_head fences;
100	spinlock_t       lock;
101};
102
103struct virtio_gpu_fence {
104	struct dma_fence f;
105	struct virtio_gpu_fence_driver *drv;
106	struct list_head node;
107};
108
109struct virtio_gpu_vbuffer {
110	char *buf;
111	int size;
112
113	void *data_buf;
114	uint32_t data_size;
115
116	char *resp_buf;
117	int resp_size;
118	virtio_gpu_resp_cb resp_cb;
119
120	struct virtio_gpu_object_array *objs;
121	struct list_head list;
122};
123
124struct virtio_gpu_output {
125	int index;
126	struct drm_crtc crtc;
127	struct drm_connector conn;
128	struct drm_encoder enc;
129	struct virtio_gpu_display_one info;
130	struct virtio_gpu_update_cursor cursor;
131	struct edid *edid;
132	int cur_x;
133	int cur_y;
134	bool enabled;
135};
136#define drm_crtc_to_virtio_gpu_output(x) \
137	container_of(x, struct virtio_gpu_output, crtc)
138
139struct virtio_gpu_framebuffer {
140	struct drm_framebuffer base;
141	struct virtio_gpu_fence *fence;
142};
143#define to_virtio_gpu_framebuffer(x) \
144	container_of(x, struct virtio_gpu_framebuffer, base)
145
146struct virtio_gpu_queue {
147	struct virtqueue *vq;
148	spinlock_t qlock;
149	wait_queue_head_t ack_queue;
150	struct work_struct dequeue_work;
151};
152
153struct virtio_gpu_drv_capset {
154	uint32_t id;
155	uint32_t max_version;
156	uint32_t max_size;
157};
158
159struct virtio_gpu_drv_cap_cache {
160	struct list_head head;
161	void *caps_cache;
162	uint32_t id;
163	uint32_t version;
164	uint32_t size;
165	atomic_t is_valid;
166};
167
168struct virtio_gpu_device {
169	struct device *dev;
170	struct drm_device *ddev;
171
172	struct virtio_device *vdev;
173
174	struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
175	uint32_t num_scanouts;
176
177	struct virtio_gpu_queue ctrlq;
178	struct virtio_gpu_queue cursorq;
179	struct kmem_cache *vbufs;
180	bool vqs_ready;
181
182	bool disable_notify;
183	bool pending_notify;
184
185	struct ida	resource_ida;
186
187	wait_queue_head_t resp_wq;
188	/* current display info */
189	spinlock_t display_info_lock;
190	bool display_info_pending;
191
192	struct virtio_gpu_fence_driver fence_drv;
193
194	struct ida	ctx_id_ida;
195
196	bool has_virgl_3d;
197	bool has_edid;
198
199	struct work_struct config_changed_work;
200
201	struct work_struct obj_free_work;
202	spinlock_t obj_free_lock;
203	struct list_head obj_free_list;
204
205	struct virtio_gpu_drv_capset *capsets;
206	uint32_t num_capsets;
207	struct list_head cap_cache;
208};
209
210struct virtio_gpu_fpriv {
211	uint32_t ctx_id;
212};
213
214/* virtio_ioctl.c */
215#define DRM_VIRTIO_NUM_IOCTLS 10
216extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
217
218/* virtio_kms.c */
219int virtio_gpu_init(struct drm_device *dev);
220void virtio_gpu_deinit(struct drm_device *dev);
221int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
222void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
223
224/* virtio_gem.c */
225void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
226int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
227void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
228int virtio_gpu_gem_create(struct drm_file *file,
229			  struct drm_device *dev,
230			  struct virtio_gpu_object_params *params,
231			  struct drm_gem_object **obj_p,
232			  uint32_t *handle_p);
233int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
234			       struct drm_file *file);
235void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
236				 struct drm_file *file);
237int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
238				struct drm_device *dev,
239				struct drm_mode_create_dumb *args);
240int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
241			      struct drm_device *dev,
242			      uint32_t handle, uint64_t *offset_p);
243
244struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents);
245struct virtio_gpu_object_array*
246virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents);
247void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
248			      struct drm_gem_object *obj);
249int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs);
250void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs);
251void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
252				struct dma_fence *fence);
253void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs);
254void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
255				       struct virtio_gpu_object_array *objs);
256void virtio_gpu_array_put_free_work(struct work_struct *work);
257
258/* virtio vg */
259int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
260void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
261void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
262				    struct virtio_gpu_object *bo,
263				    struct virtio_gpu_object_params *params,
264				    struct virtio_gpu_object_array *objs,
265				    struct virtio_gpu_fence *fence);
266void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
267				   uint32_t resource_id);
268void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
269					uint64_t offset,
270					uint32_t width, uint32_t height,
271					uint32_t x, uint32_t y,
272					struct virtio_gpu_object_array *objs,
273					struct virtio_gpu_fence *fence);
274void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
275				   uint32_t resource_id,
276				   uint32_t x, uint32_t y,
277				   uint32_t width, uint32_t height);
278void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
279				uint32_t scanout_id, uint32_t resource_id,
280				uint32_t width, uint32_t height,
281				uint32_t x, uint32_t y);
282int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
283			     struct virtio_gpu_object *obj,
284			     struct virtio_gpu_fence *fence);
285void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev,
286			      struct virtio_gpu_object *obj);
287int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
288int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
289void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
290			    struct virtio_gpu_output *output);
291int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
292int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
293int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
294			      int idx, int version,
295			      struct virtio_gpu_drv_cap_cache **cache_p);
296int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
297void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
298				   uint32_t nlen, const char *name);
299void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
300				    uint32_t id);
301void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
302					    uint32_t ctx_id,
303					    struct virtio_gpu_object_array *objs);
304void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
305					    uint32_t ctx_id,
306					    struct virtio_gpu_object_array *objs);
307void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
308			   void *data, uint32_t data_size,
309			   uint32_t ctx_id,
310			   struct virtio_gpu_object_array *objs,
311			   struct virtio_gpu_fence *fence);
312void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
313					  uint32_t ctx_id,
314					  uint64_t offset, uint32_t level,
315					  struct drm_virtgpu_3d_box *box,
316					  struct virtio_gpu_object_array *objs,
317					  struct virtio_gpu_fence *fence);
318void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
319					uint32_t ctx_id,
320					uint64_t offset, uint32_t level,
321					struct drm_virtgpu_3d_box *box,
322					struct virtio_gpu_object_array *objs,
323					struct virtio_gpu_fence *fence);
324void
325virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
326				  struct virtio_gpu_object *bo,
327				  struct virtio_gpu_object_params *params,
328				  struct virtio_gpu_object_array *objs,
329				  struct virtio_gpu_fence *fence);
330void virtio_gpu_ctrl_ack(struct virtqueue *vq);
331void virtio_gpu_cursor_ack(struct virtqueue *vq);
332void virtio_gpu_fence_ack(struct virtqueue *vq);
333void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
334void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
335void virtio_gpu_dequeue_fence_func(struct work_struct *work);
336
337void virtio_gpu_disable_notify(struct virtio_gpu_device *vgdev);
338void virtio_gpu_enable_notify(struct virtio_gpu_device *vgdev);
339
340/* virtio_gpu_display.c */
341void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
342void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
343
344/* virtio_gpu_plane.c */
345uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
346struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
347					enum drm_plane_type type,
348					int index);
349
350/* virtio_gpu_fence.c */
351struct virtio_gpu_fence *virtio_gpu_fence_alloc(
352	struct virtio_gpu_device *vgdev);
353void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
354			  struct virtio_gpu_ctrl_hdr *cmd_hdr,
355			  struct virtio_gpu_fence *fence);
356void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
357				    u64 last_seq);
358
359/* virtio_gpu_object */
360struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev,
361						size_t size);
362int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
363			     struct virtio_gpu_object_params *params,
364			     struct virtio_gpu_object **bo_ptr,
365			     struct virtio_gpu_fence *fence);
366/* virtgpu_prime.c */
367struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
368	struct drm_device *dev, struct dma_buf_attachment *attach,
369	struct sg_table *sgt);
370
371/* virgl debugfs */
372int virtio_gpu_debugfs_init(struct drm_minor *minor);
373
374#endif
375