1/* $NetBSD: radeon_uvd_v3_1.c,v 1.2 2021/12/18 23:45:43 riastradh Exp $ */ 2 3/* 4 * Copyright 2013 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Christian K��nig <christian.koenig@amd.com> 25 */ 26 27#include <sys/cdefs.h> 28__KERNEL_RCSID(0, "$NetBSD: radeon_uvd_v3_1.c,v 1.2 2021/12/18 23:45:43 riastradh Exp $"); 29 30#include "radeon.h" 31#include "radeon_asic.h" 32#include "nid.h" 33 34/** 35 * uvd_v3_1_semaphore_emit - emit semaphore command 36 * 37 * @rdev: radeon_device pointer 38 * @ring: radeon_ring pointer 39 * @semaphore: semaphore to emit commands for 40 * @emit_wait: true if we should emit a wait command 41 * 42 * Emit a semaphore command (either wait or signal) to the UVD ring. 43 */ 44bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, 45 struct radeon_ring *ring, 46 struct radeon_semaphore *semaphore, 47 bool emit_wait) 48{ 49 uint64_t addr = semaphore->gpu_addr; 50 51 radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_LOW, 0)); 52 radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF); 53 54 radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_HIGH, 0)); 55 radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF); 56 57 radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0)); 58 radeon_ring_write(ring, 0x80 | (emit_wait ? 1 : 0)); 59 60 return true; 61} 62