1/*	$NetBSD: cypress_dpm.h,v 1.3 2021/12/18 23:45:42 riastradh Exp $	*/
2
3/*
4 * Copyright 2011 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 */
25#ifndef __CYPRESS_DPM_H__
26#define __CYPRESS_DPM_H__
27
28#include "rv770_dpm.h"
29#include "evergreen_smc.h"
30
31struct evergreen_mc_reg_entry {
32	u32 mclk_max;
33	u32 mc_data[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE];
34};
35
36struct evergreen_mc_reg_table {
37	u8 last;
38	u8 num_entries;
39	u16 valid_flag;
40	struct evergreen_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
41	SMC_Evergreen_MCRegisterAddress mc_reg_address[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE];
42};
43
44struct evergreen_ulv_param {
45	bool supported;
46	struct rv7xx_pl *pl;
47};
48
49struct evergreen_arb_registers {
50	u32 mc_arb_dram_timing;
51	u32 mc_arb_dram_timing2;
52	u32 mc_arb_rfsh_rate;
53	u32 mc_arb_burst_time;
54};
55
56struct at {
57	u32 rlp;
58	u32 rmp;
59	u32 lhp;
60	u32 lmp;
61};
62
63struct evergreen_power_info {
64	/* must be first! */
65	struct rv7xx_power_info rv7xx;
66	/* flags */
67	bool vddci_control;
68	bool dynamic_ac_timing;
69	bool abm;
70	bool mcls;
71	bool light_sleep;
72	bool memory_transition;
73	bool pcie_performance_request;
74	bool pcie_performance_request_registered;
75	bool sclk_deep_sleep;
76	bool dll_default_on;
77	bool ls_clock_gating;
78	bool smu_uvd_hs;
79	bool uvd_enabled;
80	/* stored values */
81	u16 acpi_vddci;
82	u8 mvdd_high_index;
83	u8 mvdd_low_index;
84	u32 mclk_edc_wr_enable_threshold;
85	struct evergreen_mc_reg_table mc_reg_table;
86	struct atom_voltage_table vddc_voltage_table;
87	struct atom_voltage_table vddci_voltage_table;
88	struct evergreen_arb_registers bootup_arb_registers;
89	struct evergreen_ulv_param ulv;
90	struct at ats[2];
91	/* smc offsets */
92	u16 mc_reg_table_start;
93	struct radeon_ps current_rps;
94	struct rv7xx_ps current_ps;
95	struct radeon_ps requested_rps;
96	struct rv7xx_ps requested_ps;
97};
98
99#define CYPRESS_HASI_DFLT                               400000
100#define CYPRESS_MGCGTTLOCAL0_DFLT                       0x00000000
101#define CYPRESS_MGCGTTLOCAL1_DFLT                       0x00000000
102#define CYPRESS_MGCGTTLOCAL2_DFLT                       0x00000000
103#define CYPRESS_MGCGTTLOCAL3_DFLT                       0x00000000
104#define CYPRESS_MGCGCGTSSMCTRL_DFLT                     0x81944bc0
105#define REDWOOD_MGCGCGTSSMCTRL_DFLT                     0x6e944040
106#define CEDAR_MGCGCGTSSMCTRL_DFLT                       0x46944040
107#define CYPRESS_VRC_DFLT                                0xC00033
108
109#define PCIE_PERF_REQ_REMOVE_REGISTRY   0
110#define PCIE_PERF_REQ_FORCE_LOWPOWER    1
111#define PCIE_PERF_REQ_PECI_GEN1         2
112#define PCIE_PERF_REQ_PECI_GEN2         3
113#define PCIE_PERF_REQ_PECI_GEN3         4
114
115int cypress_convert_power_level_to_smc(struct radeon_device *rdev,
116				       struct rv7xx_pl *pl,
117				       RV770_SMC_HW_PERFORMANCE_LEVEL *level,
118				       u8 watermark_level);
119int cypress_populate_smc_acpi_state(struct radeon_device *rdev,
120				    RV770_SMC_STATETABLE *table);
121int cypress_populate_smc_voltage_tables(struct radeon_device *rdev,
122					RV770_SMC_STATETABLE *table);
123int cypress_populate_smc_initial_state(struct radeon_device *rdev,
124				       struct radeon_ps *radeon_initial_state,
125				       RV770_SMC_STATETABLE *table);
126u32 cypress_calculate_burst_time(struct radeon_device *rdev,
127				 u32 engine_clock, u32 memory_clock);
128void cypress_notify_link_speed_change_before_state_change(struct radeon_device *rdev,
129							  struct radeon_ps *radeon_new_state,
130							  struct radeon_ps *radeon_current_state);
131int cypress_upload_sw_state(struct radeon_device *rdev,
132			    struct radeon_ps *radeon_new_state);
133int cypress_upload_mc_reg_table(struct radeon_device *rdev,
134				struct radeon_ps *radeon_new_state);
135void cypress_program_memory_timing_parameters(struct radeon_device *rdev,
136					      struct radeon_ps *radeon_new_state);
137void cypress_notify_link_speed_change_after_state_change(struct radeon_device *rdev,
138							 struct radeon_ps *radeon_new_state,
139							 struct radeon_ps *radeon_current_state);
140int cypress_construct_voltage_tables(struct radeon_device *rdev);
141int cypress_get_mvdd_configuration(struct radeon_device *rdev);
142void cypress_enable_spread_spectrum(struct radeon_device *rdev,
143				    bool enable);
144void cypress_enable_display_gap(struct radeon_device *rdev);
145int cypress_get_table_locations(struct radeon_device *rdev);
146int cypress_populate_mc_reg_table(struct radeon_device *rdev,
147				  struct radeon_ps *radeon_boot_state);
148void cypress_program_response_times(struct radeon_device *rdev);
149int cypress_notify_smc_display_change(struct radeon_device *rdev,
150				      bool has_display);
151void cypress_enable_sclk_control(struct radeon_device *rdev,
152				 bool enable);
153void cypress_enable_mclk_control(struct radeon_device *rdev,
154				 bool enable);
155void cypress_start_dpm(struct radeon_device *rdev);
156void cypress_advertise_gen2_capability(struct radeon_device *rdev);
157u32 cypress_map_clkf_to_ibias(struct radeon_device *rdev, u32 clkf);
158u8 cypress_get_mclk_frequency_ratio(struct radeon_device *rdev,
159				    u32 memory_clock, bool strobe_mode);
160u8 cypress_get_strobe_mode_settings(struct radeon_device *rdev, u32 mclk);
161
162#endif
163