1/* $NetBSD: nouveau_nvkm_subdev_mc_gt215.c,v 1.2 2021/12/18 23:45:40 riastradh Exp $ */ 2 3/* 4 * Copyright 2016 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Ben Skeggs 25 */ 26#include <sys/cdefs.h> 27__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_mc_gt215.c,v 1.2 2021/12/18 23:45:40 riastradh Exp $"); 28 29#include "priv.h" 30 31static const struct nvkm_mc_map 32gt215_mc_reset[] = { 33 { 0x04008000, NVKM_ENGINE_MSVLD }, 34 { 0x01020000, NVKM_ENGINE_MSPDEC }, 35 { 0x00802000, NVKM_ENGINE_CE0 }, 36 { 0x00400002, NVKM_ENGINE_MSPPP }, 37 { 0x00201000, NVKM_ENGINE_GR }, 38 { 0x00000100, NVKM_ENGINE_FIFO }, 39 {} 40}; 41 42static const struct nvkm_mc_map 43gt215_mc_intr[] = { 44 { 0x04000000, NVKM_ENGINE_DISP }, 45 { 0x00400000, NVKM_ENGINE_CE0 }, 46 { 0x00020000, NVKM_ENGINE_MSPDEC }, 47 { 0x00008000, NVKM_ENGINE_MSVLD }, 48 { 0x00001000, NVKM_ENGINE_GR }, 49 { 0x00000100, NVKM_ENGINE_FIFO }, 50 { 0x00000001, NVKM_ENGINE_MSPPP }, 51 { 0x00429101, NVKM_SUBDEV_FB }, 52 { 0x10000000, NVKM_SUBDEV_BUS }, 53 { 0x00200000, NVKM_SUBDEV_GPIO }, 54 { 0x00200000, NVKM_SUBDEV_I2C }, 55 { 0x00100000, NVKM_SUBDEV_TIMER }, 56 { 0x00080000, NVKM_SUBDEV_THERM }, 57 { 0x00040000, NVKM_SUBDEV_PMU }, 58 {}, 59}; 60 61static void 62gt215_mc_intr_mask(struct nvkm_mc *mc, u32 mask, u32 stat) 63{ 64 nvkm_mask(mc->subdev.device, 0x000640, mask, stat); 65} 66 67static const struct nvkm_mc_func 68gt215_mc = { 69 .init = nv50_mc_init, 70 .intr = gt215_mc_intr, 71 .intr_unarm = nv04_mc_intr_unarm, 72 .intr_rearm = nv04_mc_intr_rearm, 73 .intr_mask = gt215_mc_intr_mask, 74 .intr_stat = nv04_mc_intr_stat, 75 .reset = gt215_mc_reset, 76}; 77 78int 79gt215_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc) 80{ 81 return nvkm_mc_new_(>215_mc, device, index, pmc); 82} 83