1/*	$NetBSD: nouveau_nvkm_subdev_devinit_nv05.c,v 1.3 2021/12/18 23:45:39 riastradh Exp $	*/
2
3/*
4 * Copyright (C) 2010 Francisco Jerez.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining
8 * a copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sublicense, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial
17 * portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 */
28#include <sys/cdefs.h>
29__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_devinit_nv05.c,v 1.3 2021/12/18 23:45:39 riastradh Exp $");
30
31#include "nv04.h"
32#include "fbmem.h"
33
34#include <subdev/bios.h>
35#include <subdev/bios/bmp.h>
36#include <subdev/bios/init.h>
37#include <subdev/vga.h>
38
39static void
40nv05_devinit_meminit(struct nvkm_devinit *init)
41{
42	static const u8 default_config_tab[][2] = {
43		{ 0x24, 0x00 },
44		{ 0x28, 0x00 },
45		{ 0x24, 0x01 },
46		{ 0x1f, 0x00 },
47		{ 0x0f, 0x00 },
48		{ 0x17, 0x00 },
49		{ 0x06, 0x00 },
50		{ 0x00, 0x00 }
51	};
52	struct nvkm_subdev *subdev = &init->subdev;
53	struct nvkm_device *device = subdev->device;
54	struct nvkm_bios *bios = device->bios;
55	struct io_mapping *fb;
56	u32 patt = 0xdeadbeef;
57	u16 data;
58	u8 strap, ramcfg[2];
59	int i, v;
60
61	/* Map the framebuffer aperture */
62	fb = fbmem_init(device);
63	if (!fb) {
64		nvkm_error(subdev, "failed to map fb\n");
65		return;
66	}
67
68	strap = (nvkm_rd32(device, 0x101000) & 0x0000003c) >> 2;
69	if ((data = bmp_mem_init_table(bios))) {
70		ramcfg[0] = nvbios_rd08(bios, data + 2 * strap + 0);
71		ramcfg[1] = nvbios_rd08(bios, data + 2 * strap + 1);
72	} else {
73		ramcfg[0] = default_config_tab[strap][0];
74		ramcfg[1] = default_config_tab[strap][1];
75	}
76
77	/* Sequencer off */
78	nvkm_wrvgas(device, 0, 1, nvkm_rdvgas(device, 0, 1) | 0x20);
79
80	if (nvkm_rd32(device, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_UMA_ENABLE)
81		goto out;
82
83	nvkm_mask(device, NV04_PFB_DEBUG_0, NV04_PFB_DEBUG_0_REFRESH_OFF, 0);
84
85	/* If present load the hardcoded scrambling table */
86	if (data) {
87		for (i = 0, data += 0x10; i < 8; i++, data += 4) {
88			u32 scramble = nvbios_rd32(bios, data);
89			nvkm_wr32(device, NV04_PFB_SCRAMBLE(i), scramble);
90		}
91	}
92
93	/* Set memory type/width/length defaults depending on the straps */
94	nvkm_mask(device, NV04_PFB_BOOT_0, 0x3f, ramcfg[0]);
95
96	if (ramcfg[1] & 0x80)
97		nvkm_mask(device, NV04_PFB_CFG0, 0, NV04_PFB_CFG0_SCRAMBLE);
98
99	nvkm_mask(device, NV04_PFB_CFG1, 0x700001, (ramcfg[1] & 1) << 20);
100	nvkm_mask(device, NV04_PFB_CFG1, 0, 1);
101
102	/* Probe memory bus width */
103	for (i = 0; i < 4; i++)
104		fbmem_poke(fb, 4 * i, patt);
105
106	if (fbmem_peek(fb, 0xc) != patt)
107		nvkm_mask(device, NV04_PFB_BOOT_0,
108			  NV04_PFB_BOOT_0_RAM_WIDTH_128, 0);
109
110	/* Probe memory length */
111	v = nvkm_rd32(device, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_RAM_AMOUNT;
112
113	if (v == NV04_PFB_BOOT_0_RAM_AMOUNT_32MB &&
114	    (!fbmem_readback(fb, 0x1000000, ++patt) ||
115	     !fbmem_readback(fb, 0, ++patt)))
116		nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
117			  NV04_PFB_BOOT_0_RAM_AMOUNT_16MB);
118
119	if (v == NV04_PFB_BOOT_0_RAM_AMOUNT_16MB &&
120	    !fbmem_readback(fb, 0x800000, ++patt))
121		nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
122			  NV04_PFB_BOOT_0_RAM_AMOUNT_8MB);
123
124	if (!fbmem_readback(fb, 0x400000, ++patt))
125		nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
126			  NV04_PFB_BOOT_0_RAM_AMOUNT_4MB);
127
128out:
129	/* Sequencer on */
130	nvkm_wrvgas(device, 0, 1, nvkm_rdvgas(device, 0, 1) & ~0x20);
131	fbmem_fini(fb);
132}
133
134static const struct nvkm_devinit_func
135nv05_devinit = {
136	.dtor = nv04_devinit_dtor,
137	.preinit = nv04_devinit_preinit,
138	.post = nv04_devinit_post,
139	.meminit = nv05_devinit_meminit,
140	.pll_set = nv04_devinit_pll_set,
141};
142
143int
144nv05_devinit_new(struct nvkm_device *device, int index,
145		 struct nvkm_devinit **pinit)
146{
147	return nv04_devinit_new_(&nv05_devinit, device, index, pinit);
148}
149