1/* $NetBSD: nouveau_nvkm_engine_mpeg_nv40.c,v 1.3 2021/12/18 23:45:36 riastradh Exp $ */ 2 3/* 4 * Copyright 2012 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Ben Skeggs 25 */ 26#include <sys/cdefs.h> 27__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_mpeg_nv40.c,v 1.3 2021/12/18 23:45:36 riastradh Exp $"); 28 29#include "nv31.h" 30 31#include <subdev/instmem.h> 32 33#include <nvif/class.h> 34 35bool 36nv40_mpeg_mthd_dma(struct nvkm_device *device, u32 mthd, u32 data) 37{ 38 struct nvkm_instmem *imem = device->imem; 39 struct nv31_mpeg *mpeg = nv31_mpeg(device->mpeg); 40 struct nvkm_subdev *subdev = &mpeg->engine.subdev; 41 u32 inst = data << 4; 42 u32 dma0 = nvkm_instmem_rd32(imem, inst + 0); 43 u32 dma1 = nvkm_instmem_rd32(imem, inst + 4); 44 u32 dma2 = nvkm_instmem_rd32(imem, inst + 8); 45 u32 base = (dma2 & 0xfffff000) | (dma0 >> 20); 46 u32 size = dma1 + 1; 47 48 /* only allow linear DMA objects */ 49 if (!(dma0 & 0x00002000)) { 50 nvkm_error(subdev, "inst %08x dma0 %08x dma1 %08x dma2 %08x\n", 51 inst, dma0, dma1, dma2); 52 return false; 53 } 54 55 if (mthd == 0x0190) { 56 /* DMA_CMD */ 57 nvkm_mask(device, 0x00b300, 0x00030000, (dma0 & 0x00030000)); 58 nvkm_wr32(device, 0x00b334, base); 59 nvkm_wr32(device, 0x00b324, size); 60 } else 61 if (mthd == 0x01a0) { 62 /* DMA_DATA */ 63 nvkm_mask(device, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2); 64 nvkm_wr32(device, 0x00b360, base); 65 nvkm_wr32(device, 0x00b364, size); 66 } else { 67 /* DMA_IMAGE, VRAM only */ 68 if (dma0 & 0x00030000) 69 return false; 70 71 nvkm_wr32(device, 0x00b370, base); 72 nvkm_wr32(device, 0x00b374, size); 73 } 74 75 return true; 76} 77 78static const struct nv31_mpeg_func 79nv40_mpeg = { 80 .mthd_dma = nv40_mpeg_mthd_dma, 81}; 82 83int 84nv40_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg) 85{ 86 return nv31_mpeg_new_(&nv40_mpeg, device, index, pmpeg); 87} 88