1/*	$NetBSD: nouveau_nvkm_engine_gr_gk110.c,v 1.3 2021/12/18 23:45:36 riastradh Exp $	*/
2
3/*
4 * Copyright 2013 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs <bskeggs@redhat.com>
25 */
26#include <sys/cdefs.h>
27__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_gr_gk110.c,v 1.3 2021/12/18 23:45:36 riastradh Exp $");
28
29#include "gf100.h"
30#include "gk104.h"
31#include "ctxgf100.h"
32
33#include <subdev/timer.h>
34
35#include <nvif/class.h>
36
37/*******************************************************************************
38 * PGRAPH register lists
39 ******************************************************************************/
40
41const struct gf100_gr_init
42gk110_gr_init_fe_0[] = {
43	{ 0x40415c,   1, 0x04, 0x00000000 },
44	{ 0x404170,   1, 0x04, 0x00000000 },
45	{ 0x4041b4,   1, 0x04, 0x00000000 },
46	{}
47};
48
49const struct gf100_gr_init
50gk110_gr_init_ds_0[] = {
51	{ 0x405844,   1, 0x04, 0x00ffffff },
52	{ 0x405850,   1, 0x04, 0x00000000 },
53	{ 0x405900,   1, 0x04, 0x0000ff00 },
54	{ 0x405908,   1, 0x04, 0x00000000 },
55	{ 0x405928,   2, 0x04, 0x00000000 },
56	{}
57};
58
59const struct gf100_gr_init
60gk110_gr_init_sked_0[] = {
61	{ 0x407010,   1, 0x04, 0x00000000 },
62	{ 0x407040,   1, 0x04, 0x80440424 },
63	{ 0x407048,   1, 0x04, 0x0000000a },
64	{}
65};
66
67const struct gf100_gr_init
68gk110_gr_init_cwd_0[] = {
69	{ 0x405b44,   1, 0x04, 0x00000000 },
70	{ 0x405b50,   1, 0x04, 0x00000000 },
71	{}
72};
73
74const struct gf100_gr_init
75gk110_gr_init_gpc_unk_1[] = {
76	{ 0x418d00,   1, 0x04, 0x00000000 },
77	{ 0x418d28,   2, 0x04, 0x00000000 },
78	{ 0x418f00,   1, 0x04, 0x00000400 },
79	{ 0x418f08,   1, 0x04, 0x00000000 },
80	{ 0x418f20,   2, 0x04, 0x00000000 },
81	{ 0x418e00,   1, 0x04, 0x00000000 },
82	{ 0x418e08,   1, 0x04, 0x00000000 },
83	{ 0x418e1c,   2, 0x04, 0x00000000 },
84	{}
85};
86
87const struct gf100_gr_init
88gk110_gr_init_tex_0[] = {
89	{ 0x419ab0,   1, 0x04, 0x00000000 },
90	{ 0x419ac8,   1, 0x04, 0x00000000 },
91	{ 0x419ab8,   1, 0x04, 0x000000e7 },
92	{ 0x419aec,   1, 0x04, 0x00000000 },
93	{ 0x419abc,   2, 0x04, 0x00000000 },
94	{ 0x419ab4,   1, 0x04, 0x00000000 },
95	{ 0x419aa8,   2, 0x04, 0x00000000 },
96	{}
97};
98
99static const struct gf100_gr_init
100gk110_gr_init_l1c_0[] = {
101	{ 0x419c98,   1, 0x04, 0x00000000 },
102	{ 0x419ca8,   1, 0x04, 0x00000000 },
103	{ 0x419cb0,   1, 0x04, 0x01000000 },
104	{ 0x419cb4,   1, 0x04, 0x00000000 },
105	{ 0x419cb8,   1, 0x04, 0x00b08bea },
106	{ 0x419c84,   1, 0x04, 0x00010384 },
107	{ 0x419cbc,   1, 0x04, 0x281b3646 },
108	{ 0x419cc0,   2, 0x04, 0x00000000 },
109	{ 0x419c80,   1, 0x04, 0x00020230 },
110	{ 0x419ccc,   2, 0x04, 0x00000000 },
111	{}
112};
113
114const struct gf100_gr_init
115gk110_gr_init_sm_0[] = {
116	{ 0x419e00,   1, 0x04, 0x00000080 },
117	{ 0x419ea0,   1, 0x04, 0x00000000 },
118	{ 0x419ee4,   1, 0x04, 0x00000000 },
119	{ 0x419ea4,   1, 0x04, 0x00000100 },
120	{ 0x419ea8,   1, 0x04, 0x00000000 },
121	{ 0x419eb4,   1, 0x04, 0x00000000 },
122	{ 0x419ebc,   2, 0x04, 0x00000000 },
123	{ 0x419edc,   1, 0x04, 0x00000000 },
124	{ 0x419f00,   1, 0x04, 0x00000000 },
125	{ 0x419ed0,   1, 0x04, 0x00003234 },
126	{ 0x419f74,   1, 0x04, 0x00015555 },
127	{ 0x419f80,   4, 0x04, 0x00000000 },
128	{}
129};
130
131static const struct gf100_gr_pack
132gk110_gr_pack_mmio[] = {
133	{ gk104_gr_init_main_0 },
134	{ gk110_gr_init_fe_0 },
135	{ gf100_gr_init_pri_0 },
136	{ gf100_gr_init_rstr2d_0 },
137	{ gf119_gr_init_pd_0 },
138	{ gk110_gr_init_ds_0 },
139	{ gf100_gr_init_scc_0 },
140	{ gk110_gr_init_sked_0 },
141	{ gk110_gr_init_cwd_0 },
142	{ gf119_gr_init_prop_0 },
143	{ gf108_gr_init_gpc_unk_0 },
144	{ gf100_gr_init_setup_0 },
145	{ gf100_gr_init_crstr_0 },
146	{ gf108_gr_init_setup_1 },
147	{ gf100_gr_init_zcull_0 },
148	{ gf119_gr_init_gpm_0 },
149	{ gk110_gr_init_gpc_unk_1 },
150	{ gf100_gr_init_gcc_0 },
151	{ gk104_gr_init_gpc_unk_2 },
152	{ gk104_gr_init_tpccs_0 },
153	{ gk110_gr_init_tex_0 },
154	{ gk104_gr_init_pe_0 },
155	{ gk110_gr_init_l1c_0 },
156	{ gf100_gr_init_mpc_0 },
157	{ gk110_gr_init_sm_0 },
158	{ gf117_gr_init_pes_0 },
159	{ gf117_gr_init_wwdx_0 },
160	{ gf117_gr_init_cbm_0 },
161	{ gk104_gr_init_be_0 },
162	{ gf100_gr_init_fe_1 },
163	{}
164};
165
166static const struct nvkm_therm_clkgate_init
167gk110_clkgate_blcg_init_sked_0[] = {
168	{ 0x407000, 1, 0x00004041 },
169	{}
170};
171
172static const struct nvkm_therm_clkgate_init
173gk110_clkgate_blcg_init_gpc_gcc_0[] = {
174	{ 0x419020, 1, 0x00000042 },
175	{ 0x419038, 1, 0x00000042 },
176	{}
177};
178
179static const struct nvkm_therm_clkgate_init
180gk110_clkgate_blcg_init_gpc_l1c_0[] = {
181	{ 0x419cd4, 2, 0x00004042 },
182	{}
183};
184
185static const struct nvkm_therm_clkgate_init
186gk110_clkgate_blcg_init_gpc_mp_0[] = {
187	{ 0x419fd0, 1, 0x00004043 },
188	{ 0x419fd8, 1, 0x00004049 },
189	{ 0x419fe0, 2, 0x00004042 },
190	{ 0x419ff0, 1, 0x00000046 },
191	{ 0x419ff8, 1, 0x00004042 },
192	{ 0x419f90, 1, 0x00004042 },
193	{}
194};
195
196static const struct nvkm_therm_clkgate_init
197gk110_clkgate_slcg_init_main_0[] = {
198	{ 0x4041f4, 1, 0x00000000 },
199	{ 0x409894, 1, 0x00000000 },
200	{}
201};
202
203static const struct nvkm_therm_clkgate_init
204gk110_clkgate_slcg_init_unk_0[] = {
205	{ 0x406004, 1, 0x00000000 },
206	{}
207};
208
209static const struct nvkm_therm_clkgate_init
210gk110_clkgate_slcg_init_sked_0[] = {
211	{ 0x407004, 1, 0x00000000 },
212	{}
213};
214
215static const struct nvkm_therm_clkgate_init
216gk110_clkgate_slcg_init_gpc_ctxctl_0[] = {
217	{ 0x41a894, 1, 0x00000000 },
218	{}
219};
220
221static const struct nvkm_therm_clkgate_init
222gk110_clkgate_slcg_init_gpc_unk_0[] = {
223	{ 0x418504, 1, 0x00000000 },
224	{ 0x41860c, 1, 0x00000000 },
225	{ 0x41868c, 1, 0x00000000 },
226	{}
227};
228
229static const struct nvkm_therm_clkgate_init
230gk110_clkgate_slcg_init_gpc_esetup_0[] = {
231	{ 0x41882c, 1, 0x00000000 },
232	{}
233};
234
235static const struct nvkm_therm_clkgate_init
236gk110_clkgate_slcg_init_gpc_zcull_0[] = {
237	{ 0x418974, 1, 0x00000000 },
238	{}
239};
240
241static const struct nvkm_therm_clkgate_init
242gk110_clkgate_slcg_init_gpc_l1c_0[] = {
243	{ 0x419cd8, 2, 0x00000000 },
244	{}
245};
246
247static const struct nvkm_therm_clkgate_init
248gk110_clkgate_slcg_init_gpc_unk_1[] = {
249	{ 0x419c74, 1, 0x00000000 },
250	{}
251};
252
253static const struct nvkm_therm_clkgate_init
254gk110_clkgate_slcg_init_gpc_mp_0[] = {
255	{ 0x419fd4, 1, 0x00004a4a },
256	{ 0x419fdc, 1, 0x00000014 },
257	{ 0x419fe4, 1, 0x00000000 },
258	{ 0x419ff4, 1, 0x00001724 },
259	{}
260};
261
262static const struct nvkm_therm_clkgate_init
263gk110_clkgate_slcg_init_gpc_ppc_0[] = {
264	{ 0x41be2c, 1, 0x00000000 },
265	{}
266};
267
268static const struct nvkm_therm_clkgate_init
269gk110_clkgate_slcg_init_pcounter_0[] = {
270	{ 0x1be018, 1, 0x000001ff },
271	{ 0x1bc018, 1, 0x000001ff },
272	{ 0x1b8018, 1, 0x000001ff },
273	{ 0x1b4124, 1, 0x00000000 },
274	{}
275};
276
277static const struct nvkm_therm_clkgate_pack
278gk110_clkgate_pack[] = {
279	{ gk104_clkgate_blcg_init_main_0 },
280	{ gk104_clkgate_blcg_init_rstr2d_0 },
281	{ gk104_clkgate_blcg_init_unk_0 },
282	{ gk104_clkgate_blcg_init_gcc_0 },
283	{ gk110_clkgate_blcg_init_sked_0 },
284	{ gk104_clkgate_blcg_init_unk_1 },
285	{ gk104_clkgate_blcg_init_gpc_ctxctl_0 },
286	{ gk104_clkgate_blcg_init_gpc_unk_0 },
287	{ gk104_clkgate_blcg_init_gpc_esetup_0 },
288	{ gk104_clkgate_blcg_init_gpc_tpbus_0 },
289	{ gk104_clkgate_blcg_init_gpc_zcull_0 },
290	{ gk104_clkgate_blcg_init_gpc_tpconf_0 },
291	{ gk104_clkgate_blcg_init_gpc_unk_1 },
292	{ gk110_clkgate_blcg_init_gpc_gcc_0 },
293	{ gk104_clkgate_blcg_init_gpc_ffb_0 },
294	{ gk104_clkgate_blcg_init_gpc_tex_0 },
295	{ gk104_clkgate_blcg_init_gpc_poly_0 },
296	{ gk110_clkgate_blcg_init_gpc_l1c_0 },
297	{ gk104_clkgate_blcg_init_gpc_unk_2 },
298	{ gk110_clkgate_blcg_init_gpc_mp_0 },
299	{ gk104_clkgate_blcg_init_gpc_ppc_0 },
300	{ gk104_clkgate_blcg_init_rop_zrop_0 },
301	{ gk104_clkgate_blcg_init_rop_0 },
302	{ gk104_clkgate_blcg_init_rop_crop_0 },
303	{ gk104_clkgate_blcg_init_pxbar_0 },
304	{ gk110_clkgate_slcg_init_main_0 },
305	{ gk110_clkgate_slcg_init_unk_0 },
306	{ gk110_clkgate_slcg_init_sked_0 },
307	{ gk110_clkgate_slcg_init_gpc_ctxctl_0 },
308	{ gk110_clkgate_slcg_init_gpc_unk_0 },
309	{ gk110_clkgate_slcg_init_gpc_esetup_0 },
310	{ gk110_clkgate_slcg_init_gpc_zcull_0 },
311	{ gk110_clkgate_slcg_init_gpc_l1c_0 },
312	{ gk110_clkgate_slcg_init_gpc_unk_1 },
313	{ gk110_clkgate_slcg_init_gpc_mp_0 },
314	{ gk110_clkgate_slcg_init_gpc_ppc_0 },
315	{ gk110_clkgate_slcg_init_pcounter_0 },
316	{}
317};
318
319/*******************************************************************************
320 * PGRAPH engine/subdev functions
321 ******************************************************************************/
322
323#include "fuc/hubgk110.fuc3.h"
324
325struct gf100_gr_ucode
326gk110_gr_fecs_ucode = {
327	.code.data = gk110_grhub_code,
328	.code.size = sizeof(gk110_grhub_code),
329	.data.data = gk110_grhub_data,
330	.data.size = sizeof(gk110_grhub_data),
331};
332
333#include "fuc/gpcgk110.fuc3.h"
334
335struct gf100_gr_ucode
336gk110_gr_gpccs_ucode = {
337	.code.data = gk110_grgpc_code,
338	.code.size = sizeof(gk110_grgpc_code),
339	.data.data = gk110_grgpc_data,
340	.data.size = sizeof(gk110_grgpc_data),
341};
342
343void
344gk110_gr_init_419eb4(struct gf100_gr *gr)
345{
346	struct nvkm_device *device = gr->base.engine.subdev.device;
347	nvkm_mask(device, 0x419eb4, 0x00001000, 0x00001000);
348	nvkm_mask(device, 0x419eb4, 0x00002000, 0x00002000);
349	nvkm_mask(device, 0x419eb4, 0x00004000, 0x00004000);
350	nvkm_mask(device, 0x419eb4, 0x00008000, 0x00008000);
351	nvkm_mask(device, 0x419eb4, 0x00001000, 0x00000000);
352	nvkm_mask(device, 0x419eb4, 0x00002000, 0x00000000);
353	nvkm_mask(device, 0x419eb4, 0x00004000, 0x00000000);
354	nvkm_mask(device, 0x419eb4, 0x00008000, 0x00000000);
355}
356
357static const struct gf100_gr_func
358gk110_gr = {
359	.oneinit_tiles = gf100_gr_oneinit_tiles,
360	.oneinit_sm_id = gf100_gr_oneinit_sm_id,
361	.init = gf100_gr_init,
362	.init_gpc_mmu = gf100_gr_init_gpc_mmu,
363	.init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
364	.init_zcull = gf117_gr_init_zcull,
365	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
366	.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
367	.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
368	.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
369	.init_419cc0 = gf100_gr_init_419cc0,
370	.init_419eb4 = gk110_gr_init_419eb4,
371	.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
372	.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
373	.init_shader_exceptions = gf100_gr_init_shader_exceptions,
374	.init_400054 = gf100_gr_init_400054,
375	.trap_mp = gf100_gr_trap_mp,
376	.mmio = gk110_gr_pack_mmio,
377	.fecs.ucode = &gk110_gr_fecs_ucode,
378	.gpccs.ucode = &gk110_gr_gpccs_ucode,
379	.rops = gf100_gr_rops,
380	.ppc_nr = 2,
381	.grctx = &gk110_grctx,
382	.clkgate_pack = gk110_clkgate_pack,
383	.zbc = &gf100_gr_zbc,
384	.sclass = {
385		{ -1, -1, FERMI_TWOD_A },
386		{ -1, -1, KEPLER_INLINE_TO_MEMORY_B },
387		{ -1, -1, KEPLER_B, &gf100_fermi },
388		{ -1, -1, KEPLER_COMPUTE_B },
389		{}
390	}
391};
392
393static const struct gf100_gr_fwif
394gk110_gr_fwif[] = {
395	{ -1, gf100_gr_load, &gk110_gr },
396	{ -1, gf100_gr_nofw, &gk110_gr },
397	{}
398};
399
400int
401gk110_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
402{
403	return gf100_gr_new_(gk110_gr_fwif, device, index, pgr);
404}
405