1/* $NetBSD: nouveau_nvkm_engine_disp_hdmigv100.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $ */ 2 3/* 4 * Copyright 2018 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 */ 24#include <sys/cdefs.h> 25__KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_hdmigv100.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $"); 26 27#include "hdmi.h" 28 29void 30gv100_hdmi_ctrl(struct nvkm_ior *ior, int head, bool enable, u8 max_ac_packet, 31 u8 rekey, u8 *avi, u8 avi_size, u8 *vendor, u8 vendor_size) 32{ 33 struct nvkm_device *device = ior->disp->engine.subdev.device; 34 const u32 ctrl = 0x40000000 * enable | 35 max_ac_packet << 16 | 36 rekey; 37 const u32 hoff = head * 0x800; 38 const u32 hdmi = head * 0x400; 39 struct packed_hdmi_infoframe avi_infoframe; 40 struct packed_hdmi_infoframe vendor_infoframe; 41 42 pack_hdmi_infoframe(&avi_infoframe, avi, avi_size); 43 pack_hdmi_infoframe(&vendor_infoframe, vendor, vendor_size); 44 45 if (!(ctrl & 0x40000000)) { 46 nvkm_mask(device, 0x6165c0 + hoff, 0x40000000, 0x00000000); 47 nvkm_mask(device, 0x6f0100 + hdmi, 0x00000001, 0x00000000); 48 nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000000); 49 nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000000); 50 return; 51 } 52 53 /* AVI InfoFrame (AVI). */ 54 nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000000); 55 if (avi_size) { 56 nvkm_wr32(device, 0x6f0008 + hdmi, avi_infoframe.header); 57 nvkm_wr32(device, 0x6f000c + hdmi, avi_infoframe.subpack0_low); 58 nvkm_wr32(device, 0x6f0010 + hdmi, avi_infoframe.subpack0_high); 59 nvkm_wr32(device, 0x6f0014 + hdmi, avi_infoframe.subpack1_low); 60 nvkm_wr32(device, 0x6f0018 + hdmi, avi_infoframe.subpack1_high); 61 nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000001); 62 } 63 64 /* Vendor-specific InfoFrame (VSI). */ 65 nvkm_mask(device, 0x6f0100 + hdmi, 0x00010001, 0x00000000); 66 if (vendor_size) { 67 nvkm_wr32(device, 0x6f0108 + hdmi, vendor_infoframe.header); 68 nvkm_wr32(device, 0x6f010c + hdmi, vendor_infoframe.subpack0_low); 69 nvkm_wr32(device, 0x6f0110 + hdmi, vendor_infoframe.subpack0_high); 70 nvkm_wr32(device, 0x6f0110 + hdmi, 0x00000000); 71 nvkm_wr32(device, 0x6f0114 + hdmi, 0x00000000); 72 nvkm_wr32(device, 0x6f0118 + hdmi, 0x00000000); 73 nvkm_wr32(device, 0x6f011c + hdmi, 0x00000000); 74 nvkm_wr32(device, 0x6f0120 + hdmi, 0x00000000); 75 nvkm_wr32(device, 0x6f0124 + hdmi, 0x00000000); 76 nvkm_mask(device, 0x6f0100 + hdmi, 0x00000001, 0x00000001); 77 } 78 79 80 /* General Control (GCP). */ 81 nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000000); 82 nvkm_wr32(device, 0x6f00cc + hdmi, 0x00000010); 83 nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000001); 84 85 /* Audio Clock Regeneration (ACR). */ 86 nvkm_wr32(device, 0x6f0080 + hdmi, 0x82000000); 87 88 /* NV_PDISP_SF_HDMI_CTRL. */ 89 nvkm_mask(device, 0x6165c0 + hoff, 0x401f007f, ctrl); 90} 91