1/*	$NetBSD: nouveau_drm.c,v 1.23 2021/12/19 11:34:44 riastradh Exp $	*/
2
3/*
4 * Copyright 2012 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs
25 */
26
27#include <sys/cdefs.h>
28__KERNEL_RCSID(0, "$NetBSD: nouveau_drm.c,v 1.23 2021/12/19 11:34:44 riastradh Exp $");
29
30#include <linux/console.h>
31#include <linux/delay.h>
32#include <linux/module.h>
33#include <linux/pci.h>
34#include <linux/pm_runtime.h>
35#include <linux/vga_switcheroo.h>
36#include <linux/mmu_notifier.h>
37
38#include <drm/drm_crtc_helper.h>
39#include <drm/drm_ioctl.h>
40#include <drm/drm_vblank.h>
41
42#include <core/gpuobj.h>
43#include <core/option.h>
44#include <core/pci.h>
45#include <core/tegra.h>
46
47#include <nvif/driver.h>
48#include <nvif/fifo.h>
49#include <nvif/user.h>
50
51#include <nvif/class.h>
52#include <nvif/cl0002.h>
53#include <nvif/cla06f.h>
54
55#include "nouveau_drv.h"
56#include "nouveau_dma.h"
57#include "nouveau_ttm.h"
58#include "nouveau_gem.h"
59#include "nouveau_vga.h"
60#include "nouveau_led.h"
61#include "nouveau_hwmon.h"
62#include "nouveau_acpi.h"
63#include "nouveau_bios.h"
64#include "nouveau_ioctl.h"
65#include "nouveau_abi16.h"
66#include "nouveau_fbcon.h"
67#include "nouveau_fence.h"
68#include "nouveau_debugfs.h"
69#include "nouveau_usif.h"
70#include "nouveau_connector.h"
71#include "nouveau_platform.h"
72#include "nouveau_svm.h"
73#include "nouveau_dmem.h"
74
75#ifdef __NetBSD__
76#include <sys/file.h>
77#include <sys/ioccom.h>
78#include <linux/nbsd-namespace.h>
79#endif
80
81MODULE_PARM_DESC(config, "option string to pass to driver core");
82char *nouveau_config;
83module_param_named(config, nouveau_config, charp, 0400);
84
85MODULE_PARM_DESC(debug, "debug string to pass to driver core");
86char *nouveau_debug;
87module_param_named(debug, nouveau_debug, charp, 0400);
88
89MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
90static int nouveau_noaccel = 0;
91module_param_named(noaccel, nouveau_noaccel, int, 0400);
92
93MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
94		          "0 = disabled, 1 = enabled, 2 = headless)");
95int nouveau_modeset = -1;
96module_param_named(modeset, nouveau_modeset, int, 0400);
97
98MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
99static int nouveau_atomic = 0;
100module_param_named(atomic, nouveau_atomic, int, 0400);
101
102MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
103static int nouveau_runtime_pm = -1;
104module_param_named(runpm, nouveau_runtime_pm, int, 0400);
105
106static struct drm_driver driver_stub;
107static struct drm_driver driver_pci;
108static struct drm_driver driver_platform;
109
110#ifdef __NetBSD__
111struct drm_driver *const nouveau_drm_driver_stub = &driver_stub;
112struct drm_driver *const nouveau_drm_driver_pci = &driver_pci;
113struct drm_driver *const nouveau_drm_driver_platform = &driver_platform;
114
115/* XXX Kludge for the non-GEM GEM that nouveau uses.  */
116static const struct uvm_pagerops nouveau_gem_uvm_ops;
117#endif
118
119static u64
120nouveau_pci_name(struct pci_dev *pdev)
121{
122	u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
123	name |= pdev->bus->number << 16;
124	name |= PCI_SLOT(pdev->devfn) << 8;
125	return name | PCI_FUNC(pdev->devfn);
126}
127
128static u64
129nouveau_platform_name(struct platform_device *platformdev)
130{
131	return platformdev->id;
132}
133
134static u64
135nouveau_name(struct drm_device *dev)
136{
137	if (dev->pdev)
138		return nouveau_pci_name(dev->pdev);
139	else
140		return nouveau_platform_name(to_platform_device(dev->dev));
141}
142
143static inline bool
144nouveau_cli_work_ready(struct dma_fence *fence)
145{
146	if (!dma_fence_is_signaled(fence))
147		return false;
148	dma_fence_put(fence);
149	return true;
150}
151
152static void
153nouveau_cli_work(struct work_struct *w)
154{
155	struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
156	struct nouveau_cli_work *work, *wtmp;
157	mutex_lock(&cli->lock);
158	list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
159		if (!work->fence || nouveau_cli_work_ready(work->fence)) {
160			list_del(&work->head);
161			work->func(work);
162		}
163	}
164	mutex_unlock(&cli->lock);
165}
166
167static void
168nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
169{
170	struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
171	schedule_work(&work->cli->work);
172}
173
174void
175nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
176		       struct nouveau_cli_work *work)
177{
178	work->fence = dma_fence_get(fence);
179	work->cli = cli;
180	mutex_lock(&cli->lock);
181	list_add_tail(&work->head, &cli->worker);
182	if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
183		nouveau_cli_work_fence(fence, &work->cb);
184	mutex_unlock(&cli->lock);
185}
186
187static void
188nouveau_cli_fini(struct nouveau_cli *cli)
189{
190	/* All our channels are dead now, which means all the fences they
191	 * own are signalled, and all callback functions have been called.
192	 *
193	 * So, after flushing the workqueue, there should be nothing left.
194	 */
195	flush_work(&cli->work);
196	WARN_ON(!list_empty(&cli->worker));
197
198	usif_client_fini(cli);
199	nouveau_vmm_fini(&cli->svm);
200	nouveau_vmm_fini(&cli->vmm);
201	nvif_mmu_fini(&cli->mmu);
202	nvif_device_fini(&cli->device);
203	mutex_lock(&cli->drm->master.lock);
204	nvif_client_fini(&cli->base);
205	mutex_unlock(&cli->drm->master.lock);
206	mutex_destroy(&cli->lock);
207	mutex_destroy(&cli->mutex);
208}
209
210static int
211nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
212		 struct nouveau_cli *cli)
213{
214	static const struct nvif_mclass
215	mems[] = {
216		{ NVIF_CLASS_MEM_GF100, -1 },
217		{ NVIF_CLASS_MEM_NV50 , -1 },
218		{ NVIF_CLASS_MEM_NV04 , -1 },
219		{}
220	};
221	static const struct nvif_mclass
222	mmus[] = {
223		{ NVIF_CLASS_MMU_GF100, -1 },
224		{ NVIF_CLASS_MMU_NV50 , -1 },
225		{ NVIF_CLASS_MMU_NV04 , -1 },
226		{}
227	};
228	static const struct nvif_mclass
229	vmms[] = {
230		{ NVIF_CLASS_VMM_GP100, -1 },
231		{ NVIF_CLASS_VMM_GM200, -1 },
232		{ NVIF_CLASS_VMM_GF100, -1 },
233		{ NVIF_CLASS_VMM_NV50 , -1 },
234		{ NVIF_CLASS_VMM_NV04 , -1 },
235		{}
236	};
237	u64 device = nouveau_name(drm->dev);
238	int ret;
239
240	snprintf(cli->name, sizeof(cli->name), "%s", sname);
241	cli->drm = drm;
242	mutex_init(&cli->mutex);
243	usif_client_init(cli);
244
245	INIT_WORK(&cli->work, nouveau_cli_work);
246	INIT_LIST_HEAD(&cli->worker);
247	mutex_init(&cli->lock);
248
249	if (cli == &drm->master) {
250		ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
251				       cli->name, device, &cli->base);
252	} else {
253		mutex_lock(&drm->master.lock);
254		ret = nvif_client_init(&drm->master.base, cli->name, device,
255				       &cli->base);
256		mutex_unlock(&drm->master.lock);
257	}
258	if (ret) {
259		NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
260		goto done;
261	}
262
263	ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
264			       &(struct nv_device_v0) {
265					.device = ~0,
266			       }, sizeof(struct nv_device_v0),
267			       &cli->device);
268	if (ret) {
269		NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
270		goto done;
271	}
272
273	ret = nvif_mclass(&cli->device.object, mmus);
274	if (ret < 0) {
275		NV_PRINTK(err, cli, "No supported MMU class\n");
276		goto done;
277	}
278
279	ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu);
280	if (ret) {
281		NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
282		goto done;
283	}
284
285	ret = nvif_mclass(&cli->mmu.object, vmms);
286	if (ret < 0) {
287		NV_PRINTK(err, cli, "No supported VMM class\n");
288		goto done;
289	}
290
291	ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
292	if (ret) {
293		NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
294		goto done;
295	}
296
297	ret = nvif_mclass(&cli->mmu.object, mems);
298	if (ret < 0) {
299		NV_PRINTK(err, cli, "No supported MEM class\n");
300		goto done;
301	}
302
303	cli->mem = &mems[ret];
304	return 0;
305done:
306	if (ret)
307		nouveau_cli_fini(cli);
308	return ret;
309}
310
311static void
312nouveau_accel_ce_fini(struct nouveau_drm *drm)
313{
314	nouveau_channel_idle(drm->cechan);
315	nvif_object_fini(&drm->ttm.copy);
316	nouveau_channel_del(&drm->cechan);
317}
318
319static void
320nouveau_accel_ce_init(struct nouveau_drm *drm)
321{
322	struct nvif_device *device = &drm->client.device;
323	int ret = 0;
324
325	/* Allocate channel that has access to a (preferably async) copy
326	 * engine, to use for TTM buffer moves.
327	 */
328	if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
329		ret = nouveau_channel_new(drm, device,
330					  nvif_fifo_runlist_ce(device), 0,
331					  true, &drm->cechan);
332	} else
333	if (device->info.chipset >= 0xa3 &&
334	    device->info.chipset != 0xaa &&
335	    device->info.chipset != 0xac) {
336		/* Prior to Kepler, there's only a single runlist, so all
337		 * engines can be accessed from any channel.
338		 *
339		 * We still want to use a separate channel though.
340		 */
341		ret = nouveau_channel_new(drm, device, NvDmaFB, NvDmaTT, false,
342					  &drm->cechan);
343	}
344
345	if (ret)
346		NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
347}
348
349static void
350nouveau_accel_gr_fini(struct nouveau_drm *drm)
351{
352	nouveau_channel_idle(drm->channel);
353	nvif_object_fini(&drm->ntfy);
354	nvkm_gpuobj_del(&drm->notify);
355	nvif_object_fini(&drm->nvsw);
356	nouveau_channel_del(&drm->channel);
357}
358
359static void
360nouveau_accel_gr_init(struct nouveau_drm *drm)
361{
362	struct nvif_device *device = &drm->client.device;
363	u32 arg0, arg1;
364	int ret;
365
366	/* Allocate channel that has access to the graphics engine. */
367	if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
368		arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR);
369		arg1 = 1;
370	} else {
371		arg0 = NvDmaFB;
372		arg1 = NvDmaTT;
373	}
374
375	ret = nouveau_channel_new(drm, device, arg0, arg1, false,
376				  &drm->channel);
377	if (ret) {
378		NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
379		nouveau_accel_gr_fini(drm);
380		return;
381	}
382
383	/* A SW class is used on pre-NV50 HW to assist with handling the
384	 * synchronisation of page flips, as well as to implement fences
385	 * on TNT/TNT2 HW that lacks any kind of support in host.
386	 */
387	if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
388		ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
389				       nouveau_abi16_swclass(drm), NULL, 0,
390				       &drm->nvsw);
391		if (ret == 0) {
392			ret = RING_SPACE(drm->channel, 2);
393			if (ret == 0) {
394				BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
395				OUT_RING  (drm->channel, drm->nvsw.handle);
396			}
397		}
398
399		if (ret) {
400			NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
401			nouveau_accel_gr_fini(drm);
402			return;
403		}
404	}
405
406	/* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
407	 * even if notification is never requested, so, allocate a ctxdma on
408	 * any GPU where it's possible we'll end up using M2MF for BO moves.
409	 */
410	if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
411		ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL,
412				      &drm->notify);
413		if (ret) {
414			NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
415			nouveau_accel_gr_fini(drm);
416			return;
417		}
418
419		ret = nvif_object_init(&drm->channel->user, NvNotify0,
420				       NV_DMA_IN_MEMORY,
421				       &(struct nv_dma_v0) {
422						.target = NV_DMA_V0_TARGET_VRAM,
423						.access = NV_DMA_V0_ACCESS_RDWR,
424						.start = drm->notify->addr,
425						.limit = drm->notify->addr + 31
426				       }, sizeof(struct nv_dma_v0),
427				       &drm->ntfy);
428		if (ret) {
429			nouveau_accel_gr_fini(drm);
430			return;
431		}
432	}
433}
434
435static void
436nouveau_accel_fini(struct nouveau_drm *drm)
437{
438	nouveau_accel_ce_fini(drm);
439	nouveau_accel_gr_fini(drm);
440	if (drm->fence)
441		nouveau_fence(drm)->dtor(drm);
442}
443
444static void
445nouveau_accel_init(struct nouveau_drm *drm)
446{
447	struct nvif_device *device = &drm->client.device;
448	struct nvif_sclass *sclass;
449	int ret, i, n;
450
451	if (nouveau_noaccel)
452		return;
453
454	/* Initialise global support for channels, and synchronisation. */
455	ret = nouveau_channels_init(drm);
456	if (ret)
457		return;
458
459	/*XXX: this is crap, but the fence/channel stuff is a little
460	 *     backwards in some places.  this will be fixed.
461	 */
462	ret = n = nvif_object_sclass_get(&device->object, &sclass);
463	if (ret < 0)
464		return;
465
466	for (ret = -ENOSYS, i = 0; i < n; i++) {
467		switch (sclass[i].oclass) {
468		case NV03_CHANNEL_DMA:
469			ret = nv04_fence_create(drm);
470			break;
471		case NV10_CHANNEL_DMA:
472			ret = nv10_fence_create(drm);
473			break;
474		case NV17_CHANNEL_DMA:
475		case NV40_CHANNEL_DMA:
476			ret = nv17_fence_create(drm);
477			break;
478		case NV50_CHANNEL_GPFIFO:
479			ret = nv50_fence_create(drm);
480			break;
481		case G82_CHANNEL_GPFIFO:
482			ret = nv84_fence_create(drm);
483			break;
484		case FERMI_CHANNEL_GPFIFO:
485		case KEPLER_CHANNEL_GPFIFO_A:
486		case KEPLER_CHANNEL_GPFIFO_B:
487		case MAXWELL_CHANNEL_GPFIFO_A:
488		case PASCAL_CHANNEL_GPFIFO_A:
489		case VOLTA_CHANNEL_GPFIFO_A:
490		case TURING_CHANNEL_GPFIFO_A:
491			ret = nvc0_fence_create(drm);
492			break;
493		default:
494			break;
495		}
496	}
497
498	nvif_object_sclass_put(&sclass);
499	if (ret) {
500		NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
501		nouveau_accel_fini(drm);
502		return;
503	}
504
505	/* Volta requires access to a doorbell register for kickoff. */
506	if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
507		ret = nvif_user_init(device);
508		if (ret)
509			return;
510	}
511
512	/* Allocate channels we need to support various functions. */
513	nouveau_accel_gr_init(drm);
514	nouveau_accel_ce_init(drm);
515
516	/* Initialise accelerated TTM buffer moves. */
517	nouveau_bo_move_init(drm);
518}
519
520int
521nouveau_drm_device_init(struct drm_device *dev)
522{
523	struct nouveau_drm *drm;
524	int ret;
525
526	if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
527		return -ENOMEM;
528	dev->dev_private = drm;
529	drm->dev = dev;
530
531	ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
532	if (ret)
533		goto fail_alloc;
534
535	ret = nouveau_cli_init(drm, "DRM", &drm->client);
536	if (ret)
537		goto fail_master;
538
539	dev->irq_enabled = true;
540
541	nvxx_client(&drm->client.base)->debug =
542		nvkm_dbgopt(nouveau_debug, "DRM");
543
544	INIT_LIST_HEAD(&drm->clients);
545	spin_lock_init(&drm->tile.lock);
546
547	/* workaround an odd issue on nvc1 by disabling the device's
548	 * nosnoop capability.  hopefully won't cause issues until a
549	 * better fix is found - assuming there is one...
550	 */
551	if (drm->client.device.info.chipset == 0xc1)
552		nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
553
554	nouveau_vga_init(drm);
555
556#ifdef __NetBSD__
557    {
558	/* XXX Kludge to make register subregion mapping work.  */
559	struct nvkm_client *client = nvxx_client(&drm->client.base);
560	struct nvkm_device *device = nvxx_device(&drm->client.device);
561	client->mmiot = device->mmiot;
562	client->mmioh = device->mmioh;
563	client->mmioaddr = device->mmioaddr;
564	client->mmiosz = device->mmiosz;
565    }
566#endif
567
568	ret = nouveau_ttm_init(drm);
569	if (ret)
570		goto fail_ttm;
571
572	ret = nouveau_bios_init(dev);
573	if (ret)
574		goto fail_bios;
575
576	nouveau_accel_init(drm);
577
578	ret = nouveau_display_create(dev);
579	if (ret)
580		goto fail_dispctor;
581
582	if (dev->mode_config.num_crtc) {
583		ret = nouveau_display_init(dev, false, false);
584		if (ret)
585			goto fail_dispinit;
586	}
587
588	nouveau_debugfs_init(drm);
589	nouveau_hwmon_init(dev);
590	nouveau_svm_init(drm);
591	nouveau_dmem_init(drm);
592	nouveau_fbcon_init(dev);
593	nouveau_led_init(dev);
594
595	if (nouveau_pmops_runtime()) {
596		pm_runtime_use_autosuspend(dev->dev);
597		pm_runtime_set_autosuspend_delay(dev->dev, 5000);
598		pm_runtime_set_active(dev->dev);
599		pm_runtime_allow(dev->dev);
600		pm_runtime_mark_last_busy(dev->dev);
601		pm_runtime_put(dev->dev);
602	}
603
604	return 0;
605
606fail_dispinit:
607	nouveau_display_destroy(dev);
608fail_dispctor:
609	nouveau_accel_fini(drm);
610	nouveau_bios_takedown(dev);
611fail_bios:
612	nouveau_ttm_fini(drm);
613fail_ttm:
614	nouveau_vga_fini(drm);
615	spin_lock_destroy(&drm->tile.lock);
616	nouveau_cli_fini(&drm->client);
617fail_master:
618	nouveau_cli_fini(&drm->master);
619fail_alloc:
620	kfree(drm);
621	return ret;
622}
623
624void
625nouveau_drm_device_fini(struct drm_device *dev)
626{
627	struct nouveau_drm *drm = nouveau_drm(dev);
628
629	if (nouveau_pmops_runtime()) {
630		pm_runtime_get_sync(dev->dev);
631		pm_runtime_forbid(dev->dev);
632	}
633
634	nouveau_led_fini(dev);
635	nouveau_fbcon_fini(dev);
636	nouveau_dmem_fini(drm);
637	nouveau_svm_fini(drm);
638	nouveau_hwmon_fini(dev);
639	nouveau_debugfs_fini(drm);
640
641	if (dev->mode_config.num_crtc)
642		nouveau_display_fini(dev, false, false);
643	nouveau_display_destroy(dev);
644
645	nouveau_accel_fini(drm);
646	nouveau_bios_takedown(dev);
647
648	nouveau_ttm_fini(drm);
649	nouveau_vga_fini(drm);
650
651	spin_lock_destroy(&drm->tile.lock);
652
653	nouveau_cli_fini(&drm->client);
654	nouveau_cli_fini(&drm->master);
655	kfree(drm);
656}
657
658#ifndef __NetBSD__
659static int nouveau_drm_probe(struct pci_dev *pdev,
660			     const struct pci_device_id *pent)
661{
662	struct nvkm_device *device;
663	struct drm_device *drm_dev;
664	struct apertures_struct *aper;
665	bool boot = false;
666	int ret;
667
668	if (vga_switcheroo_client_probe_defer(pdev))
669		return -EPROBE_DEFER;
670
671	/* We need to check that the chipset is supported before booting
672	 * fbdev off the hardware, as there's no way to put it back.
673	 */
674	ret = nvkm_device_pci_new(pdev, nouveau_config, "error",
675				  true, false, 0, &device);
676	if (ret)
677		return ret;
678
679	nvkm_device_del(&device);
680
681	/* Remove conflicting drivers (vesafb, efifb etc). */
682	aper = alloc_apertures(3);
683	if (!aper)
684		return -ENOMEM;
685
686	aper->ranges[0].base = pci_resource_start(pdev, 1);
687	aper->ranges[0].size = pci_resource_len(pdev, 1);
688	aper->count = 1;
689
690	if (pci_resource_len(pdev, 2)) {
691		aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
692		aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
693		aper->count++;
694	}
695
696	if (pci_resource_len(pdev, 3)) {
697		aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
698		aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
699		aper->count++;
700	}
701
702#ifdef CONFIG_X86
703	boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
704#endif
705	if (nouveau_modeset != 2)
706		drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
707	kfree(aper);
708
709	ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
710				  true, true, ~0ULL, &device);
711	if (ret)
712		return ret;
713
714	pci_set_master(pdev);
715
716	if (nouveau_atomic)
717		driver_pci.driver_features |= DRIVER_ATOMIC;
718
719	drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
720	if (IS_ERR(drm_dev)) {
721		ret = PTR_ERR(drm_dev);
722		goto fail_nvkm;
723	}
724
725	ret = pci_enable_device(pdev);
726	if (ret)
727		goto fail_drm;
728
729	drm_dev->pdev = pdev;
730	pci_set_drvdata(pdev, drm_dev);
731
732	ret = nouveau_drm_device_init(drm_dev);
733	if (ret)
734		goto fail_pci;
735
736	ret = drm_dev_register(drm_dev, pent->driver_data);
737	if (ret)
738		goto fail_drm_dev_init;
739
740	return 0;
741
742fail_drm_dev_init:
743	nouveau_drm_device_fini(drm_dev);
744fail_pci:
745	pci_disable_device(pdev);
746fail_drm:
747	drm_dev_put(drm_dev);
748fail_nvkm:
749	nvkm_device_del(&device);
750	return ret;
751}
752#endif
753
754#ifndef __NetBSD__		/* XXX nouveau detach */
755void
756nouveau_drm_device_remove(struct drm_device *dev)
757{
758	struct nouveau_drm *drm = nouveau_drm(dev);
759	struct nvkm_client *client;
760	struct nvkm_device *device;
761
762	drm_dev_unregister(dev);
763
764	dev->irq_enabled = false;
765	client = nvxx_client(&drm->client.base);
766	device = nvkm_device_find(client->device);
767
768	nouveau_drm_device_fini(dev);
769	drm_dev_put(dev);
770	nvkm_device_del(&device);
771}
772
773static void
774nouveau_drm_remove(struct pci_dev *pdev)
775{
776	struct drm_device *dev = pci_get_drvdata(pdev);
777
778	nouveau_drm_device_remove(dev);
779	pci_disable_device(pdev);
780}
781#endif
782
783static int
784nouveau_do_suspend(struct drm_device *dev, bool runtime)
785{
786	struct nouveau_drm *drm = nouveau_drm(dev);
787	int ret;
788
789	nouveau_svm_suspend(drm);
790	nouveau_dmem_suspend(drm);
791	nouveau_led_suspend(dev);
792
793	if (dev->mode_config.num_crtc) {
794		NV_DEBUG(drm, "suspending console...\n");
795		nouveau_fbcon_set_suspend(dev, 1);
796		NV_DEBUG(drm, "suspending display...\n");
797		ret = nouveau_display_suspend(dev, runtime);
798		if (ret)
799			return ret;
800	}
801
802	NV_DEBUG(drm, "evicting buffers...\n");
803	ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
804
805	NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
806	if (drm->cechan) {
807		ret = nouveau_channel_idle(drm->cechan);
808		if (ret)
809			goto fail_display;
810	}
811
812	if (drm->channel) {
813		ret = nouveau_channel_idle(drm->channel);
814		if (ret)
815			goto fail_display;
816	}
817
818	NV_DEBUG(drm, "suspending fence...\n");
819	if (drm->fence && nouveau_fence(drm)->suspend) {
820		if (!nouveau_fence(drm)->suspend(drm)) {
821			ret = -ENOMEM;
822			goto fail_display;
823		}
824	}
825
826	NV_DEBUG(drm, "suspending object tree...\n");
827	ret = nvif_client_suspend(&drm->master.base);
828	if (ret)
829		goto fail_client;
830
831	return 0;
832
833fail_client:
834	if (drm->fence && nouveau_fence(drm)->resume)
835		nouveau_fence(drm)->resume(drm);
836
837fail_display:
838	if (dev->mode_config.num_crtc) {
839		NV_DEBUG(drm, "resuming display...\n");
840		nouveau_display_resume(dev, runtime);
841	}
842	return ret;
843}
844
845static int
846nouveau_do_resume(struct drm_device *dev, bool runtime)
847{
848	int ret = 0;
849	struct nouveau_drm *drm = nouveau_drm(dev);
850
851	NV_DEBUG(drm, "resuming object tree...\n");
852	ret = nvif_client_resume(&drm->master.base);
853	if (ret) {
854		NV_ERROR(drm, "Client resume failed with error: %d\n", ret);
855		return ret;
856	}
857
858	NV_DEBUG(drm, "resuming fence...\n");
859	if (drm->fence && nouveau_fence(drm)->resume)
860		nouveau_fence(drm)->resume(drm);
861
862	nouveau_run_vbios_init(dev);
863
864	if (dev->mode_config.num_crtc) {
865		NV_DEBUG(drm, "resuming display...\n");
866		nouveau_display_resume(dev, runtime);
867		NV_DEBUG(drm, "resuming console...\n");
868		nouveau_fbcon_set_suspend(dev, 0);
869	}
870
871	nouveau_led_resume(dev);
872	nouveau_dmem_resume(drm);
873	nouveau_svm_resume(drm);
874	return 0;
875}
876
877int
878#ifdef __NetBSD__
879nouveau_pmops_suspend(struct drm_device *drm_dev)
880#else
881nouveau_pmops_suspend(struct device *dev)
882#endif
883{
884#ifndef __NetBSD__
885	struct pci_dev *pdev = to_pci_dev(dev);
886	struct drm_device *drm_dev = pci_get_drvdata(pdev);
887#endif
888	int ret;
889
890	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
891	    drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
892		return 0;
893
894	ret = nouveau_do_suspend(drm_dev, false);
895	if (ret)
896		return ret;
897
898#ifndef __NetBSD__		/* pmf handles this for us.  */
899	pci_save_state(pdev);
900	pci_disable_device(pdev);
901	pci_set_power_state(pdev, PCI_D3hot);
902#endif
903	udelay(200);
904	return 0;
905}
906
907int
908#ifdef __NetBSD__
909nouveau_pmops_resume(struct drm_device *drm_dev)
910#else
911nouveau_pmops_resume(struct device *dev)
912#endif
913{
914#ifndef __NetBSD__
915	struct pci_dev *pdev = to_pci_dev(dev);
916	struct drm_device *drm_dev = pci_get_drvdata(pdev);
917#endif
918	int ret;
919
920	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
921	    drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
922		return 0;
923
924#ifndef __NetBSD__		/* pmf handles this for us */
925	pci_set_power_state(pdev, PCI_D0);
926	pci_restore_state(pdev);
927	ret = pci_enable_device(pdev);
928	if (ret)
929		return ret;
930	pci_set_master(pdev);
931#endif
932
933	ret = nouveau_do_resume(drm_dev, false);
934
935	/* Monitors may have been connected / disconnected during suspend */
936	schedule_work(&nouveau_drm(drm_dev)->hpd_work);
937
938	return ret;
939}
940
941#ifdef __NetBSD__		/* XXX nouveau pm */
942
943bool
944nouveau_pmops_runtime(void)
945{
946	return true;		/* XXX */
947}
948
949#else
950
951static int
952nouveau_pmops_freeze(struct device *dev)
953{
954	struct pci_dev *pdev = to_pci_dev(dev);
955	struct drm_device *drm_dev = pci_get_drvdata(pdev);
956	return nouveau_do_suspend(drm_dev, false);
957}
958
959static int
960nouveau_pmops_thaw(struct device *dev)
961{
962	struct pci_dev *pdev = to_pci_dev(dev);
963	struct drm_device *drm_dev = pci_get_drvdata(pdev);
964	return nouveau_do_resume(drm_dev, false);
965}
966
967bool
968nouveau_pmops_runtime(void)
969{
970	if (nouveau_runtime_pm == -1)
971		return nouveau_is_optimus() || nouveau_is_v1_dsm();
972	return nouveau_runtime_pm == 1;
973}
974
975static int
976nouveau_pmops_runtime_suspend(struct device *dev)
977{
978	struct pci_dev *pdev = to_pci_dev(dev);
979	struct drm_device *drm_dev = pci_get_drvdata(pdev);
980	int ret;
981
982	if (!nouveau_pmops_runtime()) {
983		pm_runtime_forbid(dev);
984		return -EBUSY;
985	}
986
987	nouveau_switcheroo_optimus_dsm();
988	ret = nouveau_do_suspend(drm_dev, true);
989	pci_save_state(pdev);
990	pci_disable_device(pdev);
991	pci_ignore_hotplug(pdev);
992	pci_set_power_state(pdev, PCI_D3cold);
993	drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
994	return ret;
995}
996
997static int
998nouveau_pmops_runtime_resume(struct device *dev)
999{
1000	struct pci_dev *pdev = to_pci_dev(dev);
1001	struct drm_device *drm_dev = pci_get_drvdata(pdev);
1002	struct nouveau_drm *drm = nouveau_drm(drm_dev);
1003	struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
1004	int ret;
1005
1006	if (!nouveau_pmops_runtime()) {
1007		pm_runtime_forbid(dev);
1008		return -EBUSY;
1009	}
1010
1011	pci_set_power_state(pdev, PCI_D0);
1012	pci_restore_state(pdev);
1013	ret = pci_enable_device(pdev);
1014	if (ret)
1015		return ret;
1016	pci_set_master(pdev);
1017
1018	ret = nouveau_do_resume(drm_dev, true);
1019	if (ret) {
1020		NV_ERROR(drm, "resume failed with: %d\n", ret);
1021		return ret;
1022	}
1023
1024	/* do magic */
1025	nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
1026	drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
1027
1028	/* Monitors may have been connected / disconnected during suspend */
1029	schedule_work(&nouveau_drm(drm_dev)->hpd_work);
1030
1031	return ret;
1032}
1033
1034static int
1035nouveau_pmops_runtime_idle(struct device *dev)
1036{
1037	if (!nouveau_pmops_runtime()) {
1038		pm_runtime_forbid(dev);
1039		return -EBUSY;
1040	}
1041
1042	pm_runtime_mark_last_busy(dev);
1043	pm_runtime_autosuspend(dev);
1044	/* we don't want the main rpm_idle to call suspend - we want to autosuspend */
1045	return 1;
1046}
1047#endif	/* XXX nouveau pm */
1048
1049static int
1050nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
1051{
1052	struct nouveau_drm *drm = nouveau_drm(dev);
1053	struct nouveau_cli *cli;
1054#ifdef __NetBSD__
1055	const char name[] = "user";
1056#else
1057	char name[32], tmpname[TASK_COMM_LEN];
1058#endif
1059	int ret;
1060
1061	/* need to bring up power immediately if opening device */
1062	ret = pm_runtime_get_sync(dev->dev);
1063	if (ret < 0 && ret != -EACCES)
1064		return ret;
1065
1066#ifndef __NetBSD__
1067	get_task_comm(tmpname, current);
1068	snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
1069#endif
1070
1071	if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
1072		ret = -ENOMEM;
1073		goto done;
1074	}
1075
1076	ret = nouveau_cli_init(drm, name, cli);
1077	if (ret)
1078		goto done;
1079
1080	cli->base.super = false;
1081
1082	fpriv->driver_priv = cli;
1083
1084	mutex_lock(&drm->client.mutex);
1085	list_add(&cli->head, &drm->clients);
1086	mutex_unlock(&drm->client.mutex);
1087
1088done:
1089	if (ret && cli) {
1090		nouveau_cli_fini(cli);
1091		kfree(cli);
1092	}
1093
1094	pm_runtime_mark_last_busy(dev->dev);
1095	pm_runtime_put_autosuspend(dev->dev);
1096	return ret;
1097}
1098
1099static void
1100nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
1101{
1102	struct nouveau_cli *cli = nouveau_cli(fpriv);
1103	struct nouveau_drm *drm = nouveau_drm(dev);
1104
1105	pm_runtime_get_sync(dev->dev);
1106
1107	mutex_lock(&cli->mutex);
1108	if (cli->abi16)
1109		nouveau_abi16_fini(cli->abi16);
1110	mutex_unlock(&cli->mutex);
1111
1112	mutex_lock(&drm->client.mutex);
1113	list_del(&cli->head);
1114	mutex_unlock(&drm->client.mutex);
1115
1116	nouveau_cli_fini(cli);
1117	kfree(cli);
1118	pm_runtime_mark_last_busy(dev->dev);
1119	pm_runtime_put_autosuspend(dev->dev);
1120}
1121
1122static const struct drm_ioctl_desc
1123nouveau_ioctls[] = {
1124	DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW),
1125	DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1126	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW),
1127	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW),
1128	DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW),
1129	DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW),
1130	DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW),
1131	DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW),
1132	DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW),
1133	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW),
1134	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW),
1135	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW),
1136	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW),
1137	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW),
1138};
1139
1140#ifdef __NetBSD__
1141static int			/* XXX expose to ioc32 */
1142nouveau_ioctl_override(struct file *fp, unsigned long cmd, void *data)
1143{
1144	struct drm_file *file = fp->f_data;
1145	struct drm_device *dev = file->minor->dev;
1146	int ret;
1147
1148	ret = pm_runtime_get_sync(dev->dev);
1149	if (ret < 0 && ret != -EACCES)
1150		/* XXX errno Linux->NetBSD */
1151		return -ret;
1152
1153	switch (DRM_IOCTL_NR(cmd) - DRM_COMMAND_BASE) {
1154	case DRM_NOUVEAU_NVIF:
1155		/* XXX errno Linux->NetBSD */
1156		ret = -usif_ioctl(file, data, IOCPARM_LEN(cmd));
1157		break;
1158	default:
1159		ret = drm_ioctl(fp, cmd, data);
1160		break;
1161	}
1162
1163	pm_runtime_mark_last_busy(dev->dev);
1164	pm_runtime_put_autosuspend(dev->dev);
1165	return ret;
1166}
1167#else
1168long
1169nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1170{
1171	struct drm_file *filp = file->private_data;
1172	struct drm_device *dev = filp->minor->dev;
1173	long ret;
1174
1175	ret = pm_runtime_get_sync(dev->dev);
1176	if (ret < 0 && ret != -EACCES)
1177		return ret;
1178
1179	switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1180	case DRM_NOUVEAU_NVIF:
1181		ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1182		break;
1183	default:
1184		ret = drm_ioctl(file, cmd, arg);
1185		break;
1186	}
1187
1188	pm_runtime_mark_last_busy(dev->dev);
1189	pm_runtime_put_autosuspend(dev->dev);
1190	return ret;
1191}
1192#endif
1193
1194#ifndef __NetBSD__
1195static const struct file_operations
1196nouveau_driver_fops = {
1197	.owner = THIS_MODULE,
1198	.open = drm_open,
1199	.release = drm_release,
1200	.unlocked_ioctl = nouveau_drm_ioctl,
1201	.mmap = nouveau_ttm_mmap,
1202	.poll = drm_poll,
1203	.read = drm_read,
1204#if defined(CONFIG_COMPAT)
1205	.compat_ioctl = nouveau_compat_ioctl,
1206#endif
1207	.llseek = noop_llseek,
1208};
1209#endif
1210
1211static struct drm_driver
1212driver_stub = {
1213	.driver_features =
1214		DRIVER_GEM | DRIVER_MODESET | DRIVER_RENDER
1215#if defined(CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT)
1216		| DRIVER_KMS_LEGACY_CONTEXT
1217#endif
1218		,
1219
1220	.open = nouveau_drm_open,
1221	.postclose = nouveau_drm_postclose,
1222	.lastclose = nouveau_vga_lastclose,
1223
1224#if defined(CONFIG_DEBUG_FS)
1225	.debugfs_init = nouveau_drm_debugfs_init,
1226#endif
1227
1228	.enable_vblank = nouveau_display_vblank_enable,
1229	.disable_vblank = nouveau_display_vblank_disable,
1230	.get_scanout_position = nouveau_display_scanoutpos,
1231	.get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
1232
1233	.ioctls = nouveau_ioctls,
1234	.num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1235#ifdef __NetBSD__
1236	.fops = NULL,
1237	.mmap_object = &nouveau_ttm_mmap_object,
1238	.gem_uvm_ops = &nouveau_gem_uvm_ops,
1239	.ioctl_override = nouveau_ioctl_override,
1240#else
1241	.fops = &nouveau_driver_fops,
1242#endif
1243
1244	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1245	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1246	.gem_prime_pin = nouveau_gem_prime_pin,
1247	.gem_prime_unpin = nouveau_gem_prime_unpin,
1248	.gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1249	.gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1250	.gem_prime_vmap = nouveau_gem_prime_vmap,
1251	.gem_prime_vunmap = nouveau_gem_prime_vunmap,
1252
1253	.gem_free_object_unlocked = nouveau_gem_object_del,
1254	.gem_open_object = nouveau_gem_object_open,
1255	.gem_close_object = nouveau_gem_object_close,
1256
1257	.dumb_create = nouveau_display_dumb_create,
1258	.dumb_map_offset = nouveau_display_dumb_map_offset,
1259
1260	.name = DRIVER_NAME,
1261	.desc = DRIVER_DESC,
1262#ifdef GIT_REVISION
1263	.date = GIT_REVISION,
1264#else
1265	.date = DRIVER_DATE,
1266#endif
1267	.major = DRIVER_MAJOR,
1268	.minor = DRIVER_MINOR,
1269	.patchlevel = DRIVER_PATCHLEVEL,
1270};
1271
1272#ifndef __NetBSD__
1273static struct pci_device_id
1274nouveau_drm_pci_table[] = {
1275	{
1276		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1277		.class = PCI_BASE_CLASS_DISPLAY << 16,
1278		.class_mask  = 0xff << 16,
1279	},
1280	{
1281		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1282		.class = PCI_BASE_CLASS_DISPLAY << 16,
1283		.class_mask  = 0xff << 16,
1284	},
1285	{}
1286};
1287#endif
1288
1289#ifndef __NetBSD__
1290static void nouveau_display_options(void)
1291{
1292	DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1293
1294	DRM_DEBUG_DRIVER("... tv_disable   : %d\n", nouveau_tv_disable);
1295	DRM_DEBUG_DRIVER("... ignorelid    : %d\n", nouveau_ignorelid);
1296	DRM_DEBUG_DRIVER("... duallink     : %d\n", nouveau_duallink);
1297	DRM_DEBUG_DRIVER("... nofbaccel    : %d\n", nouveau_nofbaccel);
1298	DRM_DEBUG_DRIVER("... config       : %s\n", nouveau_config);
1299	DRM_DEBUG_DRIVER("... debug        : %s\n", nouveau_debug);
1300	DRM_DEBUG_DRIVER("... noaccel      : %d\n", nouveau_noaccel);
1301	DRM_DEBUG_DRIVER("... modeset      : %d\n", nouveau_modeset);
1302	DRM_DEBUG_DRIVER("... runpm        : %d\n", nouveau_runtime_pm);
1303	DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1304	DRM_DEBUG_DRIVER("... hdmimhz      : %d\n", nouveau_hdmimhz);
1305}
1306#endif
1307
1308#ifndef __NetBSD__		/* XXX nouveau pm */
1309static const struct dev_pm_ops nouveau_pm_ops = {
1310	.suspend = nouveau_pmops_suspend,
1311	.resume = nouveau_pmops_resume,
1312	.freeze = nouveau_pmops_freeze,
1313	.thaw = nouveau_pmops_thaw,
1314	.poweroff = nouveau_pmops_freeze,
1315	.restore = nouveau_pmops_resume,
1316	.runtime_suspend = nouveau_pmops_runtime_suspend,
1317	.runtime_resume = nouveau_pmops_runtime_resume,
1318	.runtime_idle = nouveau_pmops_runtime_idle,
1319};
1320#endif	/* XXX nouveau pm */
1321
1322#ifndef __NetBSD__
1323static struct pci_driver
1324nouveau_drm_pci_driver = {
1325	.name = "nouveau",
1326	.id_table = nouveau_drm_pci_table,
1327	.probe = nouveau_drm_probe,
1328	.remove = nouveau_drm_remove,
1329	.driver.pm = &nouveau_pm_ops,
1330};
1331
1332struct drm_device *
1333nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1334			       struct platform_device *pdev,
1335			       struct nvkm_device **pdevice)
1336{
1337	struct drm_device *drm;
1338	int err;
1339
1340	err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1341				    true, true, ~0ULL, pdevice);
1342	if (err)
1343		goto err_free;
1344
1345	drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1346	if (IS_ERR(drm)) {
1347		err = PTR_ERR(drm);
1348		goto err_free;
1349	}
1350
1351	err = nouveau_drm_device_init(drm);
1352	if (err)
1353		goto err_put;
1354
1355	platform_set_drvdata(pdev, drm);
1356
1357	return drm;
1358
1359err_put:
1360	drm_dev_put(drm);
1361err_free:
1362	nvkm_device_del(pdevice);
1363
1364	return ERR_PTR(err);
1365}
1366
1367static int __init
1368nouveau_drm_init(void)
1369{
1370	driver_pci = driver_stub;
1371	driver_platform = driver_stub;
1372
1373	nouveau_display_options();
1374
1375	if (nouveau_modeset == -1) {
1376		if (vgacon_text_force())
1377			nouveau_modeset = 0;
1378	}
1379
1380	if (!nouveau_modeset)
1381		return 0;
1382
1383#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1384	platform_driver_register(&nouveau_platform_driver);
1385#endif
1386
1387	nouveau_register_dsm_handler();
1388	nouveau_backlight_ctor();
1389
1390#ifdef CONFIG_PCI
1391	return pci_register_driver(&nouveau_drm_pci_driver);
1392#else
1393	return 0;
1394#endif
1395}
1396
1397static void __exit
1398nouveau_drm_exit(void)
1399{
1400	if (!nouveau_modeset)
1401		return;
1402
1403#ifdef CONFIG_PCI
1404	pci_unregister_driver(&nouveau_drm_pci_driver);
1405#endif
1406	nouveau_backlight_dtor();
1407	nouveau_unregister_dsm_handler();
1408
1409#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1410	platform_driver_unregister(&nouveau_platform_driver);
1411#endif
1412	if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM))
1413		mmu_notifier_synchronize();
1414}
1415#endif
1416
1417module_init(nouveau_drm_init);
1418module_exit(nouveau_drm_exit);
1419
1420MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1421MODULE_AUTHOR(DRIVER_AUTHOR);
1422MODULE_DESCRIPTION(DRIVER_DESC);
1423MODULE_LICENSE("GPL and additional rights");
1424