1/* $NetBSD: mmhub_2_0_0_default.h,v 1.2 2021/12/18 23:45:16 riastradh Exp $ */ 2 3/* 4 * Copyright (C) 2019 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included 14 * in all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 20 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23#ifndef _mmhub_2_0_0_DEFAULT_HEADER 24#define _mmhub_2_0_0_DEFAULT_HEADER 25 26 27// addressBlock: mmhub_dagbdec 28#define mmDAGB0_RDCLI0_DEFAULT 0xfe5fe0f9 29#define mmDAGB0_RDCLI1_DEFAULT 0xfe5fe0f9 30#define mmDAGB0_RDCLI2_DEFAULT 0xfe5fe0f9 31#define mmDAGB0_RDCLI3_DEFAULT 0xfe5fe0f9 32#define mmDAGB0_RDCLI4_DEFAULT 0xfe5fe0f9 33#define mmDAGB0_RDCLI5_DEFAULT 0xfe5fe0f9 34#define mmDAGB0_RDCLI6_DEFAULT 0xfe5fe0f9 35#define mmDAGB0_RDCLI7_DEFAULT 0xfe5fe0f9 36#define mmDAGB0_RDCLI8_DEFAULT 0xfe5fe0f9 37#define mmDAGB0_RDCLI9_DEFAULT 0xfe5fe0f9 38#define mmDAGB0_RDCLI10_DEFAULT 0xfe5fe0f9 39#define mmDAGB0_RDCLI11_DEFAULT 0xfe5fe0f9 40#define mmDAGB0_RDCLI12_DEFAULT 0xfe5fe0f9 41#define mmDAGB0_RDCLI13_DEFAULT 0xfe5fe0f9 42#define mmDAGB0_RDCLI14_DEFAULT 0xfe5fe0f9 43#define mmDAGB0_RDCLI15_DEFAULT 0xfe5fe0f9 44#define mmDAGB0_RDCLI16_DEFAULT 0xfe5fe0f9 45#define mmDAGB0_RDCLI17_DEFAULT 0xfe5fe0f9 46#define mmDAGB0_RDCLI18_DEFAULT 0xfe5fe0f9 47#define mmDAGB0_RD_CNTL_DEFAULT 0x03527df8 48#define mmDAGB0_RD_GMI_CNTL_DEFAULT 0x00003046 49#define mmDAGB0_RD_ADDR_DAGB_DEFAULT 0x00000039 50#define mmDAGB0_RD_OUTPUT_DAGB_MAX_BURST_DEFAULT 0x88888888 51#define mmDAGB0_RD_OUTPUT_DAGB_LAZY_TIMER_DEFAULT 0x11111111 52#define mmDAGB0_RD_CGTT_CLK_CTRL_DEFAULT 0x00000100 53#define mmDAGB0_L1TLB_RD_CGTT_CLK_CTRL_DEFAULT 0x00000100 54#define mmDAGB0_ATCVM_RD_CGTT_CLK_CTRL_DEFAULT 0x00000100 55#define mmDAGB0_RD_ADDR_DAGB_MAX_BURST0_DEFAULT 0x88888888 56#define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER0_DEFAULT 0x11111111 57#define mmDAGB0_RD_ADDR_DAGB_MAX_BURST1_DEFAULT 0x88888888 58#define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER1_DEFAULT 0x11111111 59#define mmDAGB0_RD_ADDR_DAGB_MAX_BURST2_DEFAULT 0x88888888 60#define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER2_DEFAULT 0x11111111 61#define mmDAGB0_RD_VC0_CNTL_DEFAULT 0xff2ff082 62#define mmDAGB0_RD_VC1_CNTL_DEFAULT 0xff2ff082 63#define mmDAGB0_RD_VC2_CNTL_DEFAULT 0xff2ff082 64#define mmDAGB0_RD_VC3_CNTL_DEFAULT 0xff2ff082 65#define mmDAGB0_RD_VC4_CNTL_DEFAULT 0xff2ff082 66#define mmDAGB0_RD_VC5_CNTL_DEFAULT 0xff2ff082 67#define mmDAGB0_RD_VC6_CNTL_DEFAULT 0xff2ff082 68#define mmDAGB0_RD_VC7_CNTL_DEFAULT 0xff2ff082 69#define mmDAGB0_RD_CNTL_MISC_DEFAULT 0x01a0e408 70#define mmDAGB0_RD_TLB_CREDIT_DEFAULT 0x2f7bdef7 71#define mmDAGB0_RDCLI_ASK_PENDING_DEFAULT 0x00000000 72#define mmDAGB0_RDCLI_GO_PENDING_DEFAULT 0x00000000 73#define mmDAGB0_RDCLI_GBLSEND_PENDING_DEFAULT 0x00000000 74#define mmDAGB0_RDCLI_TLB_PENDING_DEFAULT 0x00000000 75#define mmDAGB0_RDCLI_OARB_PENDING_DEFAULT 0x00000000 76#define mmDAGB0_RDCLI_OSD_PENDING_DEFAULT 0x00000000 77#define mmDAGB0_WRCLI0_DEFAULT 0xfe5fe0f9 78#define mmDAGB0_WRCLI1_DEFAULT 0xfe5fe0f9 79#define mmDAGB0_WRCLI2_DEFAULT 0xfe5fe0f9 80#define mmDAGB0_WRCLI3_DEFAULT 0xfe5fe0f9 81#define mmDAGB0_WRCLI4_DEFAULT 0xfe5fe0f9 82#define mmDAGB0_WRCLI5_DEFAULT 0xfe5fe0f9 83#define mmDAGB0_WRCLI6_DEFAULT 0xfe5fe0f9 84#define mmDAGB0_WRCLI7_DEFAULT 0xfe5fe0f9 85#define mmDAGB0_WRCLI8_DEFAULT 0xfe5fe0f9 86#define mmDAGB0_WRCLI9_DEFAULT 0xfe5fe0f9 87#define mmDAGB0_WRCLI10_DEFAULT 0xfe5fe0f9 88#define mmDAGB0_WRCLI11_DEFAULT 0xfe5fe0f9 89#define mmDAGB0_WRCLI12_DEFAULT 0xfe5fe0f9 90#define mmDAGB0_WRCLI13_DEFAULT 0xfe5fe0f9 91#define mmDAGB0_WRCLI14_DEFAULT 0xfe5fe0f9 92#define mmDAGB0_WRCLI15_DEFAULT 0xfe5fe0f9 93#define mmDAGB0_WRCLI16_DEFAULT 0xfe5fe0f9 94#define mmDAGB0_WRCLI17_DEFAULT 0xfe5fe0f9 95#define mmDAGB0_WRCLI18_DEFAULT 0xfe5fe0f9 96#define mmDAGB0_WR_CNTL_DEFAULT 0x03527df8 97#define mmDAGB0_WR_GMI_CNTL_DEFAULT 0x00003046 98#define mmDAGB0_WR_ADDR_DAGB_DEFAULT 0x00000039 99#define mmDAGB0_WR_OUTPUT_DAGB_MAX_BURST_DEFAULT 0x88888888 100#define mmDAGB0_WR_OUTPUT_DAGB_LAZY_TIMER_DEFAULT 0x11111111 101#define mmDAGB0_WR_CGTT_CLK_CTRL_DEFAULT 0x00000100 102#define mmDAGB0_L1TLB_WR_CGTT_CLK_CTRL_DEFAULT 0x00000100 103#define mmDAGB0_ATCVM_WR_CGTT_CLK_CTRL_DEFAULT 0x00000100 104#define mmDAGB0_WR_ADDR_DAGB_MAX_BURST0_DEFAULT 0x88888888 105#define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER0_DEFAULT 0x11111111 106#define mmDAGB0_WR_ADDR_DAGB_MAX_BURST1_DEFAULT 0x88888888 107#define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER1_DEFAULT 0x11111111 108#define mmDAGB0_WR_ADDR_DAGB_MAX_BURST2_DEFAULT 0x88888888 109#define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER2_DEFAULT 0x11111111 110#define mmDAGB0_WR_DATA_DAGB_DEFAULT 0x00000001 111#define mmDAGB0_WR_DATA_DAGB_MAX_BURST0_DEFAULT 0x11111111 112#define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER0_DEFAULT 0x00000000 113#define mmDAGB0_WR_DATA_DAGB_MAX_BURST1_DEFAULT 0x11111111 114#define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER1_DEFAULT 0x00000000 115#define mmDAGB0_WR_DATA_DAGB_MAX_BURST2_DEFAULT 0x11111111 116#define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER2_DEFAULT 0x00000000 117#define mmDAGB0_WR_VC0_CNTL_DEFAULT 0xff2ff082 118#define mmDAGB0_WR_VC1_CNTL_DEFAULT 0xff2ff082 119#define mmDAGB0_WR_VC2_CNTL_DEFAULT 0xff2ff082 120#define mmDAGB0_WR_VC3_CNTL_DEFAULT 0xff2ff082 121#define mmDAGB0_WR_VC4_CNTL_DEFAULT 0xff2ff082 122#define mmDAGB0_WR_VC5_CNTL_DEFAULT 0xff2ff082 123#define mmDAGB0_WR_VC6_CNTL_DEFAULT 0xff2ff082 124#define mmDAGB0_WR_VC7_CNTL_DEFAULT 0xff2ff082 125#define mmDAGB0_WR_CNTL_MISC_DEFAULT 0x01a0e408 126#define mmDAGB0_WR_TLB_CREDIT_DEFAULT 0x2f7bdef7 127#define mmDAGB0_WR_DATA_CREDIT_DEFAULT 0x60606070 128#define mmDAGB0_WR_MISC_CREDIT_DEFAULT 0x0078dc88 129#define mmDAGB0_WRCLI_ASK_PENDING_DEFAULT 0x00000000 130#define mmDAGB0_WRCLI_GO_PENDING_DEFAULT 0x00000000 131#define mmDAGB0_WRCLI_GBLSEND_PENDING_DEFAULT 0x00000000 132#define mmDAGB0_WRCLI_TLB_PENDING_DEFAULT 0x00000000 133#define mmDAGB0_WRCLI_OARB_PENDING_DEFAULT 0x00000000 134#define mmDAGB0_WRCLI_OSD_PENDING_DEFAULT 0x00000000 135#define mmDAGB0_WRCLI_DBUS_ASK_PENDING_DEFAULT 0x00000000 136#define mmDAGB0_WRCLI_DBUS_GO_PENDING_DEFAULT 0x00000000 137#define mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_DEFAULT 0x00000000 138#define mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE_DEFAULT 0x00000000 139#define mmDAGB0_DAGB_DLY_DEFAULT 0x00000000 140#define mmDAGB0_CNTL_MISC_DEFAULT 0xcf7c1ffa 141#define mmDAGB0_CNTL_MISC2_DEFAULT 0x00000000 142#define mmDAGB0_FIFO_EMPTY_DEFAULT 0x00ffffff 143#define mmDAGB0_FIFO_FULL_DEFAULT 0x00000000 144#define mmDAGB0_WR_CREDITS_FULL_DEFAULT 0x0007ffff 145#define mmDAGB0_RD_CREDITS_FULL_DEFAULT 0x0003ffff 146#define mmDAGB0_PERFCOUNTER_LO_DEFAULT 0x00000000 147#define mmDAGB0_PERFCOUNTER_HI_DEFAULT 0x00000000 148#define mmDAGB0_PERFCOUNTER0_CFG_DEFAULT 0x00000000 149#define mmDAGB0_PERFCOUNTER1_CFG_DEFAULT 0x00000000 150#define mmDAGB0_PERFCOUNTER2_CFG_DEFAULT 0x00000000 151#define mmDAGB0_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 152#define mmDAGB0_RESERVE0_DEFAULT 0xffffffff 153#define mmDAGB0_RESERVE1_DEFAULT 0xffffffff 154#define mmDAGB0_RESERVE2_DEFAULT 0xffffffff 155#define mmDAGB0_RESERVE3_DEFAULT 0xffffffff 156#define mmDAGB0_RESERVE4_DEFAULT 0xffffffff 157#define mmDAGB0_RESERVE5_DEFAULT 0xffffffff 158#define mmDAGB0_RESERVE6_DEFAULT 0xffffffff 159#define mmDAGB0_RESERVE7_DEFAULT 0xffffffff 160#define mmDAGB0_RESERVE8_DEFAULT 0xffffffff 161#define mmDAGB0_RESERVE9_DEFAULT 0xffffffff 162#define mmDAGB0_RESERVE10_DEFAULT 0xffffffff 163#define mmDAGB0_RESERVE11_DEFAULT 0xffffffff 164#define mmDAGB0_RESERVE12_DEFAULT 0xffffffff 165#define mmDAGB0_RESERVE13_DEFAULT 0xffffffff 166#define mmDAGB0_RESERVE14_DEFAULT 0xffffffff 167#define mmDAGB0_RESERVE15_DEFAULT 0xffffffff 168#define mmDAGB0_RESERVE16_DEFAULT 0xffffffff 169#define mmDAGB0_RESERVE17_DEFAULT 0xffffffff 170#define mmDAGB0_RESERVE18_DEFAULT 0xffffffff 171#define mmDAGB0_RESERVE19_DEFAULT 0xffffffff 172#define mmDAGB0_RESERVE20_DEFAULT 0xffffffff 173#define mmDAGB0_RESERVE21_DEFAULT 0xffffffff 174#define mmDAGB0_RESERVE22_DEFAULT 0xffffffff 175#define mmDAGB0_RESERVE23_DEFAULT 0xffffffff 176#define mmDAGB0_RESERVE24_DEFAULT 0xffffffff 177#define mmDAGB0_RESERVE25_DEFAULT 0xffffffff 178#define mmDAGB0_RESERVE26_DEFAULT 0xffffffff 179#define mmDAGB0_RESERVE27_DEFAULT 0xffffffff 180#define mmDAGB0_RESERVE28_DEFAULT 0xffffffff 181#define mmDAGB0_RESERVE29_DEFAULT 0xffffffff 182#define mmDAGB0_RESERVE30_DEFAULT 0xffffffff 183#define mmDAGB0_RESERVE31_DEFAULT 0xffffffff 184#define mmDAGB0_RESERVE32_DEFAULT 0xffffffff 185#define mmDAGB0_RESERVE33_DEFAULT 0xffffffff 186#define mmDAGB0_RESERVE34_DEFAULT 0xffffffff 187#define mmDAGB0_RESERVE35_DEFAULT 0xffffffff 188#define mmDAGB0_RESERVE36_DEFAULT 0xffffffff 189#define mmDAGB0_RESERVE37_DEFAULT 0xffffffff 190#define mmDAGB0_RESERVE38_DEFAULT 0xffffffff 191#define mmDAGB0_RESERVE39_DEFAULT 0xffffffff 192#define mmDAGB0_RESERVE40_DEFAULT 0xffffffff 193#define mmDAGB0_RESERVE41_DEFAULT 0xffffffff 194#define mmDAGB0_RESERVE42_DEFAULT 0xffffffff 195#define mmDAGB0_RESERVE43_DEFAULT 0xffffffff 196#define mmDAGB0_RESERVE44_DEFAULT 0xffffffff 197#define mmDAGB0_RESERVE45_DEFAULT 0xffffffff 198#define mmDAGB0_RESERVE46_DEFAULT 0xffffffff 199#define mmDAGB0_RESERVE47_DEFAULT 0xffffffff 200#define mmDAGB0_RESERVE48_DEFAULT 0xffffffff 201#define mmDAGB0_RESERVE49_DEFAULT 0xffffffff 202#define mmDAGB0_RESERVE50_DEFAULT 0xffffffff 203#define mmDAGB0_RESERVE51_DEFAULT 0xffffffff 204#define mmDAGB0_RESERVE52_DEFAULT 0xffffffff 205#define mmDAGB0_RESERVE53_DEFAULT 0xffffffff 206#define mmDAGB0_RESERVE54_DEFAULT 0xffffffff 207#define mmDAGB0_RESERVE55_DEFAULT 0xffffffff 208#define mmDAGB0_RESERVE56_DEFAULT 0xffffffff 209#define mmDAGB0_RESERVE57_DEFAULT 0xffffffff 210#define mmDAGB0_RESERVE58_DEFAULT 0xffffffff 211#define mmDAGB0_RESERVE59_DEFAULT 0xffffffff 212#define mmDAGB0_RESERVE60_DEFAULT 0xffffffff 213#define mmDAGB0_RESERVE61_DEFAULT 0xffffffff 214#define mmDAGB0_RESERVE62_DEFAULT 0xffffffff 215#define mmDAGB0_RESERVE63_DEFAULT 0xffffffff 216#define mmDAGB0_RESERVE64_DEFAULT 0xffffffff 217#define mmDAGB0_RESERVE65_DEFAULT 0xffffffff 218#define mmDAGB0_RESERVE66_DEFAULT 0xffffffff 219#define mmDAGB0_RESERVE67_DEFAULT 0xffffffff 220#define mmDAGB0_RESERVE68_DEFAULT 0xffffffff 221#define mmDAGB0_RESERVE69_DEFAULT 0xffffffff 222#define mmDAGB0_RESERVE70_DEFAULT 0xffffffff 223#define mmDAGB0_RESERVE71_DEFAULT 0xffffffff 224#define mmDAGB0_RESERVE72_DEFAULT 0xffffffff 225#define mmDAGB0_RESERVE73_DEFAULT 0xffffffff 226#define mmDAGB0_RESERVE74_DEFAULT 0xffffffff 227#define mmDAGB0_RESERVE75_DEFAULT 0xffffffff 228#define mmDAGB0_RESERVE76_DEFAULT 0xffffffff 229#define mmDAGB0_RESERVE77_DEFAULT 0xffffffff 230#define mmDAGB0_RESERVE78_DEFAULT 0xffffffff 231#define mmDAGB0_RESERVE79_DEFAULT 0xffffffff 232#define mmDAGB0_RESERVE80_DEFAULT 0xffffffff 233#define mmDAGB0_RESERVE81_DEFAULT 0xffffffff 234#define mmDAGB0_RESERVE82_DEFAULT 0xffffffff 235#define mmDAGB0_RESERVE83_DEFAULT 0xffffffff 236#define mmDAGB0_RESERVE84_DEFAULT 0xffffffff 237#define mmDAGB0_RESERVE85_DEFAULT 0xffffffff 238#define mmDAGB0_RESERVE86_DEFAULT 0xffffffff 239#define mmDAGB0_RESERVE87_DEFAULT 0xffffffff 240#define mmDAGB0_RESERVE88_DEFAULT 0xffffffff 241#define mmDAGB0_RESERVE89_DEFAULT 0xffffffff 242#define mmDAGB0_RESERVE90_DEFAULT 0xffffffff 243#define mmDAGB0_RESERVE91_DEFAULT 0xffffffff 244#define mmDAGB0_RESERVE92_DEFAULT 0xffffffff 245#define mmDAGB0_RESERVE93_DEFAULT 0xffffffff 246#define mmDAGB0_RESERVE94_DEFAULT 0xffffffff 247#define mmDAGB0_RESERVE95_DEFAULT 0xffffffff 248#define mmDAGB0_RESERVE96_DEFAULT 0xffffffff 249#define mmDAGB0_RESERVE97_DEFAULT 0xffffffff 250#define mmDAGB0_RESERVE98_DEFAULT 0xffffffff 251#define mmDAGB0_RESERVE99_DEFAULT 0xffffffff 252#define mmDAGB0_RESERVE100_DEFAULT 0xffffffff 253#define mmDAGB0_RESERVE101_DEFAULT 0xffffffff 254#define mmDAGB0_RESERVE102_DEFAULT 0xffffffff 255#define mmDAGB0_RESERVE103_DEFAULT 0xffffffff 256#define mmDAGB0_RESERVE104_DEFAULT 0xffffffff 257#define mmDAGB0_RESERVE105_DEFAULT 0xffffffff 258#define mmDAGB0_RESERVE106_DEFAULT 0xffffffff 259#define mmDAGB0_RESERVE107_DEFAULT 0xffffffff 260#define mmDAGB0_RESERVE108_DEFAULT 0xffffffff 261#define mmDAGB0_RESERVE109_DEFAULT 0xffffffff 262#define mmDAGB0_RESERVE110_DEFAULT 0xffffffff 263#define mmDAGB0_RESERVE111_DEFAULT 0xffffffff 264#define mmDAGB0_RESERVE112_DEFAULT 0xffffffff 265#define mmDAGB0_RESERVE113_DEFAULT 0xffffffff 266#define mmDAGB0_RESERVE114_DEFAULT 0xffffffff 267#define mmDAGB0_RESERVE115_DEFAULT 0xffffffff 268#define mmDAGB0_RESERVE116_DEFAULT 0xffffffff 269#define mmDAGB0_RESERVE117_DEFAULT 0xffffffff 270#define mmDAGB0_RESERVE118_DEFAULT 0xffffffff 271#define mmDAGB0_RESERVE119_DEFAULT 0xffffffff 272#define mmDAGB0_RESERVE120_DEFAULT 0xffffffff 273#define mmDAGB0_RESERVE121_DEFAULT 0xffffffff 274#define mmDAGB0_RESERVE122_DEFAULT 0xffffffff 275#define mmDAGB0_RESERVE123_DEFAULT 0xffffffff 276#define mmDAGB0_RESERVE124_DEFAULT 0xffffffff 277#define mmDAGB0_RESERVE125_DEFAULT 0xffffffff 278#define mmDAGB0_RESERVE126_DEFAULT 0xffffffff 279#define mmDAGB0_RESERVE127_DEFAULT 0xffffffff 280#define mmDAGB0_RESERVE128_DEFAULT 0xffffffff 281#define mmDAGB0_RESERVE129_DEFAULT 0xffffffff 282#define mmDAGB0_RESERVE130_DEFAULT 0xffffffff 283#define mmDAGB0_RESERVE131_DEFAULT 0xffffffff 284 285 286// addressBlock: mmhub_mmea_mmeadec 287#define mmMMEA0_DRAM_RD_CLI2GRP_MAP0_DEFAULT 0x55555555 288#define mmMMEA0_DRAM_RD_CLI2GRP_MAP1_DEFAULT 0x55555555 289#define mmMMEA0_DRAM_WR_CLI2GRP_MAP0_DEFAULT 0x55555555 290#define mmMMEA0_DRAM_WR_CLI2GRP_MAP1_DEFAULT 0x55555555 291#define mmMMEA0_DRAM_RD_GRP2VC_MAP_DEFAULT 0x00000e25 292#define mmMMEA0_DRAM_WR_GRP2VC_MAP_DEFAULT 0x00000e25 293#define mmMMEA0_DRAM_RD_LAZY_DEFAULT 0x78000924 294#define mmMMEA0_DRAM_WR_LAZY_DEFAULT 0x78000924 295#define mmMMEA0_DRAM_RD_CAM_CNTL_DEFAULT 0x16db4444 296#define mmMMEA0_DRAM_WR_CAM_CNTL_DEFAULT 0x16db4444 297#define mmMMEA0_DRAM_PAGE_BURST_DEFAULT 0x20002000 298#define mmMMEA0_DRAM_RD_PRI_AGE_DEFAULT 0x00db6249 299#define mmMMEA0_DRAM_WR_PRI_AGE_DEFAULT 0x00db6249 300#define mmMMEA0_DRAM_RD_PRI_QUEUING_DEFAULT 0x00000db6 301#define mmMMEA0_DRAM_WR_PRI_QUEUING_DEFAULT 0x00000db6 302#define mmMMEA0_DRAM_RD_PRI_FIXED_DEFAULT 0x00000924 303#define mmMMEA0_DRAM_WR_PRI_FIXED_DEFAULT 0x00000924 304#define mmMMEA0_DRAM_RD_PRI_URGENCY_DEFAULT 0x0000fdb6 305#define mmMMEA0_DRAM_WR_PRI_URGENCY_DEFAULT 0x0000fdb6 306#define mmMMEA0_DRAM_RD_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f 307#define mmMMEA0_DRAM_RD_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f 308#define mmMMEA0_DRAM_RD_PRI_QUANT_PRI3_DEFAULT 0xffffffff 309#define mmMMEA0_DRAM_WR_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f 310#define mmMMEA0_DRAM_WR_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f 311#define mmMMEA0_DRAM_WR_PRI_QUANT_PRI3_DEFAULT 0xffffffff 312#define mmMMEA0_ADDRNORM_BASE_ADDR0_DEFAULT 0x00000000 313#define mmMMEA0_ADDRNORM_LIMIT_ADDR0_DEFAULT 0x00000000 314#define mmMMEA0_ADDRNORM_BASE_ADDR1_DEFAULT 0x00000000 315#define mmMMEA0_ADDRNORM_LIMIT_ADDR1_DEFAULT 0x00000000 316#define mmMMEA0_ADDRNORM_OFFSET_ADDR1_DEFAULT 0x00000000 317#define mmMMEA0_ADDRNORMDRAM_HOLE_CNTL_DEFAULT 0x00000000 318#define mmMMEA0_ADDRNORMDRAM_NP2_CHANNEL_CFG_DEFAULT 0x00000000 319#define mmMMEA0_ADDRDEC_BANK_CFG_DEFAULT 0x000001ef 320#define mmMMEA0_ADDRDEC_MISC_CFG_DEFAULT 0xfffff000 321#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK0_DEFAULT 0x00000000 322#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK1_DEFAULT 0x00000000 323#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK2_DEFAULT 0x00000000 324#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK3_DEFAULT 0x00000000 325#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK4_DEFAULT 0x00000000 326#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_PC_DEFAULT 0x00000000 327#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_PC2_DEFAULT 0x00000000 328#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_CS0_DEFAULT 0x00000000 329#define mmMMEA0_ADDRDECDRAM_ADDR_HASH_CS1_DEFAULT 0x00000000 330#define mmMMEA0_ADDRDECDRAM_HARVEST_ENABLE_DEFAULT 0x00000000 331#define mmMMEA0_ADDRDECDRAM_HARVNA_ADDR_START0_DEFAULT 0x00000000 332#define mmMMEA0_ADDRDECDRAM_HARVNA_ADDR_END0_DEFAULT 0x00000000 333#define mmMMEA0_ADDRDECDRAM_HARVNA_ADDR_START1_DEFAULT 0x00000000 334#define mmMMEA0_ADDRDECDRAM_HARVNA_ADDR_END1_DEFAULT 0x00000000 335#define mmMMEA0_ADDRDEC0_BASE_ADDR_CS0_DEFAULT 0x00000000 336#define mmMMEA0_ADDRDEC0_BASE_ADDR_CS1_DEFAULT 0x00000000 337#define mmMMEA0_ADDRDEC0_BASE_ADDR_CS2_DEFAULT 0x00000000 338#define mmMMEA0_ADDRDEC0_BASE_ADDR_CS3_DEFAULT 0x00000000 339#define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS0_DEFAULT 0x00000000 340#define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS1_DEFAULT 0x00000000 341#define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS2_DEFAULT 0x00000000 342#define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS3_DEFAULT 0x00000000 343#define mmMMEA0_ADDRDEC0_ADDR_MASK_CS01_DEFAULT 0xfffffffe 344#define mmMMEA0_ADDRDEC0_ADDR_MASK_CS23_DEFAULT 0xfffffffe 345#define mmMMEA0_ADDRDEC0_ADDR_MASK_SECCS01_DEFAULT 0xfffffffe 346#define mmMMEA0_ADDRDEC0_ADDR_MASK_SECCS23_DEFAULT 0xfffffffe 347#define mmMMEA0_ADDRDEC0_ADDR_CFG_CS01_DEFAULT 0x00050408 348#define mmMMEA0_ADDRDEC0_ADDR_CFG_CS23_DEFAULT 0x00050408 349#define mmMMEA0_ADDRDEC0_ADDR_SEL_CS01_DEFAULT 0x04076543 350#define mmMMEA0_ADDRDEC0_ADDR_SEL_CS23_DEFAULT 0x04076543 351#define mmMMEA0_ADDRDEC0_COL_SEL_LO_CS01_DEFAULT 0x87654321 352#define mmMMEA0_ADDRDEC0_COL_SEL_LO_CS23_DEFAULT 0x87654321 353#define mmMMEA0_ADDRDEC0_COL_SEL_HI_CS01_DEFAULT 0xa9876543 354#define mmMMEA0_ADDRDEC0_COL_SEL_HI_CS23_DEFAULT 0xa9876543 355#define mmMMEA0_ADDRDEC0_RM_SEL_CS01_DEFAULT 0x00000000 356#define mmMMEA0_ADDRDEC0_RM_SEL_CS23_DEFAULT 0x00000000 357#define mmMMEA0_ADDRDEC0_RM_SEL_SECCS01_DEFAULT 0x00000000 358#define mmMMEA0_ADDRDEC0_RM_SEL_SECCS23_DEFAULT 0x00000000 359#define mmMMEA0_ADDRDEC1_BASE_ADDR_CS0_DEFAULT 0x00000000 360#define mmMMEA0_ADDRDEC1_BASE_ADDR_CS1_DEFAULT 0x00000000 361#define mmMMEA0_ADDRDEC1_BASE_ADDR_CS2_DEFAULT 0x00000000 362#define mmMMEA0_ADDRDEC1_BASE_ADDR_CS3_DEFAULT 0x00000000 363#define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS0_DEFAULT 0x00000000 364#define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS1_DEFAULT 0x00000000 365#define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS2_DEFAULT 0x00000000 366#define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS3_DEFAULT 0x00000000 367#define mmMMEA0_ADDRDEC1_ADDR_MASK_CS01_DEFAULT 0xfffffffe 368#define mmMMEA0_ADDRDEC1_ADDR_MASK_CS23_DEFAULT 0xfffffffe 369#define mmMMEA0_ADDRDEC1_ADDR_MASK_SECCS01_DEFAULT 0xfffffffe 370#define mmMMEA0_ADDRDEC1_ADDR_MASK_SECCS23_DEFAULT 0xfffffffe 371#define mmMMEA0_ADDRDEC1_ADDR_CFG_CS01_DEFAULT 0x00050408 372#define mmMMEA0_ADDRDEC1_ADDR_CFG_CS23_DEFAULT 0x00050408 373#define mmMMEA0_ADDRDEC1_ADDR_SEL_CS01_DEFAULT 0x04076543 374#define mmMMEA0_ADDRDEC1_ADDR_SEL_CS23_DEFAULT 0x04076543 375#define mmMMEA0_ADDRDEC1_COL_SEL_LO_CS01_DEFAULT 0x87654321 376#define mmMMEA0_ADDRDEC1_COL_SEL_LO_CS23_DEFAULT 0x87654321 377#define mmMMEA0_ADDRDEC1_COL_SEL_HI_CS01_DEFAULT 0xa9876543 378#define mmMMEA0_ADDRDEC1_COL_SEL_HI_CS23_DEFAULT 0xa9876543 379#define mmMMEA0_ADDRDEC1_RM_SEL_CS01_DEFAULT 0x00000000 380#define mmMMEA0_ADDRDEC1_RM_SEL_CS23_DEFAULT 0x00000000 381#define mmMMEA0_ADDRDEC1_RM_SEL_SECCS01_DEFAULT 0x00000000 382#define mmMMEA0_ADDRDEC1_RM_SEL_SECCS23_DEFAULT 0x00000000 383#define mmMMEA0_IO_RD_CLI2GRP_MAP0_DEFAULT 0xe4e4e4e4 384#define mmMMEA0_IO_RD_CLI2GRP_MAP1_DEFAULT 0xe4e4e4e4 385#define mmMMEA0_IO_WR_CLI2GRP_MAP0_DEFAULT 0xe4e4e4e4 386#define mmMMEA0_IO_WR_CLI2GRP_MAP1_DEFAULT 0xe4e4e4e4 387#define mmMMEA0_IO_RD_COMBINE_FLUSH_DEFAULT 0x00007777 388#define mmMMEA0_IO_WR_COMBINE_FLUSH_DEFAULT 0x00007777 389#define mmMMEA0_IO_GROUP_BURST_DEFAULT 0x1f031f03 390#define mmMMEA0_IO_RD_PRI_AGE_DEFAULT 0x00db6249 391#define mmMMEA0_IO_WR_PRI_AGE_DEFAULT 0x00db6249 392#define mmMMEA0_IO_RD_PRI_QUEUING_DEFAULT 0x00000db6 393#define mmMMEA0_IO_WR_PRI_QUEUING_DEFAULT 0x00000db6 394#define mmMMEA0_IO_RD_PRI_FIXED_DEFAULT 0x00000924 395#define mmMMEA0_IO_WR_PRI_FIXED_DEFAULT 0x00000924 396#define mmMMEA0_IO_RD_PRI_URGENCY_DEFAULT 0x00000492 397#define mmMMEA0_IO_WR_PRI_URGENCY_DEFAULT 0x00000492 398#define mmMMEA0_IO_RD_PRI_URGENCY_MASKING_DEFAULT 0xffffffff 399#define mmMMEA0_IO_WR_PRI_URGENCY_MASKING_DEFAULT 0xffffffff 400#define mmMMEA0_IO_RD_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f 401#define mmMMEA0_IO_RD_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f 402#define mmMMEA0_IO_RD_PRI_QUANT_PRI3_DEFAULT 0xffffffff 403#define mmMMEA0_IO_WR_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f 404#define mmMMEA0_IO_WR_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f 405#define mmMMEA0_IO_WR_PRI_QUANT_PRI3_DEFAULT 0xffffffff 406#define mmMMEA0_SDP_ARB_DRAM_DEFAULT 0x00101e40 407#define mmMMEA0_SDP_ARB_FINAL_DEFAULT 0x00007fff 408#define mmMMEA0_SDP_DRAM_PRIORITY_DEFAULT 0x00000000 409#define mmMMEA0_SDP_IO_PRIORITY_DEFAULT 0x00000000 410#define mmMMEA0_SDP_CREDITS_DEFAULT 0x000101bf 411#define mmMMEA0_SDP_TAG_RESERVE0_DEFAULT 0x00000000 412#define mmMMEA0_SDP_TAG_RESERVE1_DEFAULT 0x00000000 413#define mmMMEA0_SDP_VCC_RESERVE0_DEFAULT 0x00000000 414#define mmMMEA0_SDP_VCC_RESERVE1_DEFAULT 0x00000000 415#define mmMMEA0_SDP_VCD_RESERVE0_DEFAULT 0x00000000 416#define mmMMEA0_SDP_VCD_RESERVE1_DEFAULT 0x00000000 417#define mmMMEA0_SDP_REQ_CNTL_DEFAULT 0x0000000f 418#define mmMMEA0_MISC_DEFAULT 0x0c00a070 419#define mmMMEA0_LATENCY_SAMPLING_DEFAULT 0x00000000 420#define mmMMEA0_PERFCOUNTER_LO_DEFAULT 0x00000000 421#define mmMMEA0_PERFCOUNTER_HI_DEFAULT 0x00000000 422#define mmMMEA0_PERFCOUNTER0_CFG_DEFAULT 0x00000000 423#define mmMMEA0_PERFCOUNTER1_CFG_DEFAULT 0x00000000 424#define mmMMEA0_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 425#define mmMMEA0_EDC_CNT_DEFAULT 0x00000000 426#define mmMMEA0_EDC_CNT2_DEFAULT 0x00000000 427#define mmMMEA0_DSM_CNTL_DEFAULT 0x00000000 428#define mmMMEA0_DSM_CNTLA_DEFAULT 0x00000000 429#define mmMMEA0_DSM_CNTLB_DEFAULT 0x00000000 430#define mmMMEA0_DSM_CNTL2_DEFAULT 0x00000000 431#define mmMMEA0_DSM_CNTL2A_DEFAULT 0x00000000 432#define mmMMEA0_DSM_CNTL2B_DEFAULT 0x00000000 433#define mmMMEA0_CGTT_CLK_CTRL_DEFAULT 0x00000100 434#define mmMMEA0_EDC_MODE_DEFAULT 0x00000000 435#define mmMMEA0_ERR_STATUS_DEFAULT 0x00000300 436#define mmMMEA0_MISC2_DEFAULT 0x00000000 437#define mmMMEA0_ADDRDEC_SELECT_DEFAULT 0x00000000 438 439 440// addressBlock: mmhub_pctldec 441#define mmPCTL_MISC_DEFAULT 0x00000889 442#define mmPCTL_MMHUB_DEEPSLEEP_DEFAULT 0x00000000 443#define mmPCTL_MMHUB_DEEPSLEEP_OVERRIDE_DEFAULT 0x00000000 444#define mmPCTL_PG_IGNORE_DEEPSLEEP_DEFAULT 0x00000000 445#define mmPCTL_PG_DAGB_DEFAULT 0x00000000 446#define mmPCTL0_RENG_RAM_INDEX_DEFAULT 0x00000000 447#define mmPCTL0_RENG_RAM_DATA_DEFAULT 0x00000000 448#define mmPCTL0_RENG_EXECUTE_DEFAULT 0x00000000 449#define mmPCTL1_RENG_RAM_INDEX_DEFAULT 0x00000000 450#define mmPCTL1_RENG_RAM_DATA_DEFAULT 0x00000000 451#define mmPCTL1_RENG_EXECUTE_DEFAULT 0x00000000 452#define mmPCTL2_RENG_RAM_INDEX_DEFAULT 0x00000000 453#define mmPCTL2_RENG_RAM_DATA_DEFAULT 0x00000000 454#define mmPCTL2_RENG_EXECUTE_DEFAULT 0x00000000 455#define mmPCTL0_STCTRL_REGISTER_SAVE_RANGE0_DEFAULT 0x00000000 456#define mmPCTL0_STCTRL_REGISTER_SAVE_RANGE1_DEFAULT 0x00000000 457#define mmPCTL0_STCTRL_REGISTER_SAVE_RANGE2_DEFAULT 0x00000000 458#define mmPCTL0_STCTRL_REGISTER_SAVE_RANGE3_DEFAULT 0x00000000 459#define mmPCTL0_STCTRL_REGISTER_SAVE_RANGE4_DEFAULT 0x00000000 460#define mmPCTL0_STCTRL_REGISTER_SAVE_EXCL_SET_DEFAULT 0xffffffff 461#define mmPCTL0_STCTRL_REGISTER_SAVE_EXCL_SET1_DEFAULT 0xffffffff 462#define mmPCTL1_STCTRL_REGISTER_SAVE_RANGE0_DEFAULT 0x061f05a0 463#define mmPCTL1_STCTRL_REGISTER_SAVE_RANGE1_DEFAULT 0x08590800 464#define mmPCTL1_STCTRL_REGISTER_SAVE_RANGE2_DEFAULT 0x00000000 465#define mmPCTL1_STCTRL_REGISTER_SAVE_RANGE3_DEFAULT 0x00000000 466#define mmPCTL1_STCTRL_REGISTER_SAVE_RANGE4_DEFAULT 0x00000000 467#define mmPCTL1_STCTRL_REGISTER_SAVE_EXCL_SET_DEFAULT 0xffffffff 468#define mmPCTL1_STCTRL_REGISTER_SAVE_EXCL_SET1_DEFAULT 0xffffffff 469#define mmPCTL2_STCTRL_REGISTER_SAVE_RANGE0_DEFAULT 0x069f0620 470#define mmPCTL2_STCTRL_REGISTER_SAVE_RANGE1_DEFAULT 0x08b3085a 471#define mmPCTL2_STCTRL_REGISTER_SAVE_RANGE2_DEFAULT 0x00000000 472#define mmPCTL2_STCTRL_REGISTER_SAVE_RANGE3_DEFAULT 0x00000000 473#define mmPCTL2_STCTRL_REGISTER_SAVE_RANGE4_DEFAULT 0x00000000 474#define mmPCTL2_STCTRL_REGISTER_SAVE_EXCL_SET_DEFAULT 0xffffffff 475#define mmPCTL2_STCTRL_REGISTER_SAVE_EXCL_SET1_DEFAULT 0xffffffff 476#define mmPCTL0_MISC_DEFAULT 0x00011000 477#define mmPCTL1_MISC_DEFAULT 0x00000800 478#define mmPCTL2_MISC_DEFAULT 0x00000800 479#define mmPCTL_PERFCOUNTER_LO_DEFAULT 0x00000000 480#define mmPCTL_PERFCOUNTER_HI_DEFAULT 0x00000000 481#define mmPCTL_PERFCOUNTER0_CFG_DEFAULT 0x00000000 482#define mmPCTL_PERFCOUNTER1_CFG_DEFAULT 0x00000000 483#define mmPCTL_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 484 485 486// addressBlock: mmhub_l1tlb_mmvml1pfdec 487#define mmMMMC_VM_MX_L1_TLB0_STATUS_DEFAULT 0x00000000 488#define mmMMMC_VM_MX_L1_TLB1_STATUS_DEFAULT 0x00000000 489#define mmMMMC_VM_MX_L1_TLB2_STATUS_DEFAULT 0x00000000 490#define mmMMMC_VM_MX_L1_TLB3_STATUS_DEFAULT 0x00000000 491#define mmMMMC_VM_MX_L1_TLB4_STATUS_DEFAULT 0x00000000 492#define mmMMMC_VM_MX_L1_TLB5_STATUS_DEFAULT 0x00000000 493#define mmMMMC_VM_MX_L1_TLB6_STATUS_DEFAULT 0x00000000 494#define mmMMMC_VM_MX_L1_TLB7_STATUS_DEFAULT 0x00000000 495 496 497// addressBlock: mmhub_l1tlb_mmvml1pldec 498#define mmMMMC_VM_MX_L1_PERFCOUNTER0_CFG_DEFAULT 0x00000000 499#define mmMMMC_VM_MX_L1_PERFCOUNTER1_CFG_DEFAULT 0x00000000 500#define mmMMMC_VM_MX_L1_PERFCOUNTER2_CFG_DEFAULT 0x00000000 501#define mmMMMC_VM_MX_L1_PERFCOUNTER3_CFG_DEFAULT 0x00000000 502#define mmMMMC_VM_MX_L1_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 503 504 505// addressBlock: mmhub_l1tlb_mmvml1prdec 506#define mmMMMC_VM_MX_L1_PERFCOUNTER_LO_DEFAULT 0x00000000 507#define mmMMMC_VM_MX_L1_PERFCOUNTER_HI_DEFAULT 0x00000000 508 509 510// addressBlock: mmhub_mmutcl2_mmatcl2dec 511#define mmMM_ATC_L2_CNTL_DEFAULT 0x000001c0 512#define mmMM_ATC_L2_CNTL2_DEFAULT 0x00000100 513#define mmMM_ATC_L2_CACHE_DATA0_DEFAULT 0x00000000 514#define mmMM_ATC_L2_CACHE_DATA1_DEFAULT 0x00000000 515#define mmMM_ATC_L2_CACHE_DATA2_DEFAULT 0x00000000 516#define mmMM_ATC_L2_CNTL3_DEFAULT 0x000001f8 517#define mmMM_ATC_L2_STATUS_DEFAULT 0x00000000 518#define mmMM_ATC_L2_STATUS2_DEFAULT 0x00000000 519#define mmMM_ATC_L2_MISC_CG_DEFAULT 0x00000200 520#define mmMM_ATC_L2_MEM_POWER_LS_DEFAULT 0x00000208 521#define mmMM_ATC_L2_CGTT_CLK_CTRL_DEFAULT 0x00000080 522#define mmMM_ATC_L2_SDPPORT_CTRL_DEFAULT 0x000003ff 523 524 525// addressBlock: mmhub_mmutcl2_mmvml2pfdec 526#define mmMMVM_L2_CNTL_DEFAULT 0x00080602 527#define mmMMVM_L2_CNTL2_DEFAULT 0x00000000 528#define mmMMVM_L2_CNTL3_DEFAULT 0x80100007 529#define mmMMVM_L2_STATUS_DEFAULT 0x00000000 530#define mmMMVM_DUMMY_PAGE_FAULT_CNTL_DEFAULT 0x00000090 531#define mmMMVM_DUMMY_PAGE_FAULT_ADDR_LO32_DEFAULT 0x00000000 532#define mmMMVM_DUMMY_PAGE_FAULT_ADDR_HI32_DEFAULT 0x00000000 533#define mmMMVM_INVALIDATE_CNTL_DEFAULT 0x0000010f 534#define mmMMVM_L2_PROTECTION_FAULT_CNTL_DEFAULT 0x3ffffffc 535#define mmMMVM_L2_PROTECTION_FAULT_CNTL2_DEFAULT 0x000a0000 536#define mmMMVM_L2_PROTECTION_FAULT_MM_CNTL3_DEFAULT 0xffffffff 537#define mmMMVM_L2_PROTECTION_FAULT_MM_CNTL4_DEFAULT 0xffffffff 538#define mmMMVM_L2_PROTECTION_FAULT_STATUS_DEFAULT 0x00000000 539#define mmMMVM_L2_PROTECTION_FAULT_ADDR_LO32_DEFAULT 0x00000000 540#define mmMMVM_L2_PROTECTION_FAULT_ADDR_HI32_DEFAULT 0x00000000 541#define mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32_DEFAULT 0x00000000 542#define mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32_DEFAULT 0x00000000 543#define mmMMVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32_DEFAULT 0x00000000 544#define mmMMVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32_DEFAULT 0x00000000 545#define mmMMVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32_DEFAULT 0x00000000 546#define mmMMVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32_DEFAULT 0x00000000 547#define mmMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32_DEFAULT 0x00000000 548#define mmMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32_DEFAULT 0x00000000 549#define mmMMVM_L2_CNTL4_DEFAULT 0x000000c1 550#define mmMMVM_L2_MM_GROUP_RT_CLASSES_DEFAULT 0x00000000 551#define mmMMVM_L2_BANK_SELECT_RESERVED_CID_DEFAULT 0x00000000 552#define mmMMVM_L2_BANK_SELECT_RESERVED_CID2_DEFAULT 0x00000000 553#define mmMMVM_L2_CACHE_PARITY_CNTL_DEFAULT 0x00000000 554#define mmMMVM_L2_IH_LOG_CNTL_DEFAULT 0x00000002 555#define mmMMVM_L2_IH_LOG_BUSY_DEFAULT 0x00000000 556#define mmMMVM_L2_CGTT_CLK_CTRL_DEFAULT 0x00000080 557#define mmMMVM_L2_CNTL5_DEFAULT 0x00003fe0 558#define mmMMVM_L2_GCR_CNTL_DEFAULT 0x00000000 559#define mmMMVML2_WALKER_MACRO_THROTTLE_TIME_DEFAULT 0x00000000 560#define mmMMVML2_WALKER_MACRO_THROTTLE_FETCH_LIMIT_DEFAULT 0x00000000 561#define mmMMVML2_WALKER_MICRO_THROTTLE_TIME_DEFAULT 0x00000000 562#define mmMMVML2_WALKER_MICRO_THROTTLE_FETCH_LIMIT_DEFAULT 0x00000000 563 564 565// addressBlock: mmhub_mmutcl2_mmvml2vcdec 566#define mmMMVM_CONTEXT0_CNTL_DEFAULT 0x007ffe80 567#define mmMMVM_CONTEXT1_CNTL_DEFAULT 0x007ffe80 568#define mmMMVM_CONTEXT2_CNTL_DEFAULT 0x007ffe80 569#define mmMMVM_CONTEXT3_CNTL_DEFAULT 0x007ffe80 570#define mmMMVM_CONTEXT4_CNTL_DEFAULT 0x007ffe80 571#define mmMMVM_CONTEXT5_CNTL_DEFAULT 0x007ffe80 572#define mmMMVM_CONTEXT6_CNTL_DEFAULT 0x007ffe80 573#define mmMMVM_CONTEXT7_CNTL_DEFAULT 0x007ffe80 574#define mmMMVM_CONTEXT8_CNTL_DEFAULT 0x007ffe80 575#define mmMMVM_CONTEXT9_CNTL_DEFAULT 0x007ffe80 576#define mmMMVM_CONTEXT10_CNTL_DEFAULT 0x007ffe80 577#define mmMMVM_CONTEXT11_CNTL_DEFAULT 0x007ffe80 578#define mmMMVM_CONTEXT12_CNTL_DEFAULT 0x007ffe80 579#define mmMMVM_CONTEXT13_CNTL_DEFAULT 0x007ffe80 580#define mmMMVM_CONTEXT14_CNTL_DEFAULT 0x007ffe80 581#define mmMMVM_CONTEXT15_CNTL_DEFAULT 0x007ffe80 582#define mmMMVM_CONTEXTS_DISABLE_DEFAULT 0x00000000 583#define mmMMVM_INVALIDATE_ENG0_SEM_DEFAULT 0x00000000 584#define mmMMVM_INVALIDATE_ENG1_SEM_DEFAULT 0x00000000 585#define mmMMVM_INVALIDATE_ENG2_SEM_DEFAULT 0x00000000 586#define mmMMVM_INVALIDATE_ENG3_SEM_DEFAULT 0x00000000 587#define mmMMVM_INVALIDATE_ENG4_SEM_DEFAULT 0x00000000 588#define mmMMVM_INVALIDATE_ENG5_SEM_DEFAULT 0x00000000 589#define mmMMVM_INVALIDATE_ENG6_SEM_DEFAULT 0x00000000 590#define mmMMVM_INVALIDATE_ENG7_SEM_DEFAULT 0x00000000 591#define mmMMVM_INVALIDATE_ENG8_SEM_DEFAULT 0x00000000 592#define mmMMVM_INVALIDATE_ENG9_SEM_DEFAULT 0x00000000 593#define mmMMVM_INVALIDATE_ENG10_SEM_DEFAULT 0x00000000 594#define mmMMVM_INVALIDATE_ENG11_SEM_DEFAULT 0x00000000 595#define mmMMVM_INVALIDATE_ENG12_SEM_DEFAULT 0x00000000 596#define mmMMVM_INVALIDATE_ENG13_SEM_DEFAULT 0x00000000 597#define mmMMVM_INVALIDATE_ENG14_SEM_DEFAULT 0x00000000 598#define mmMMVM_INVALIDATE_ENG15_SEM_DEFAULT 0x00000000 599#define mmMMVM_INVALIDATE_ENG16_SEM_DEFAULT 0x00000000 600#define mmMMVM_INVALIDATE_ENG17_SEM_DEFAULT 0x00000000 601#define mmMMVM_INVALIDATE_ENG0_REQ_DEFAULT 0x02f80000 602#define mmMMVM_INVALIDATE_ENG1_REQ_DEFAULT 0x02f80000 603#define mmMMVM_INVALIDATE_ENG2_REQ_DEFAULT 0x02f80000 604#define mmMMVM_INVALIDATE_ENG3_REQ_DEFAULT 0x02f80000 605#define mmMMVM_INVALIDATE_ENG4_REQ_DEFAULT 0x02f80000 606#define mmMMVM_INVALIDATE_ENG5_REQ_DEFAULT 0x02f80000 607#define mmMMVM_INVALIDATE_ENG6_REQ_DEFAULT 0x02f80000 608#define mmMMVM_INVALIDATE_ENG7_REQ_DEFAULT 0x02f80000 609#define mmMMVM_INVALIDATE_ENG8_REQ_DEFAULT 0x02f80000 610#define mmMMVM_INVALIDATE_ENG9_REQ_DEFAULT 0x02f80000 611#define mmMMVM_INVALIDATE_ENG10_REQ_DEFAULT 0x02f80000 612#define mmMMVM_INVALIDATE_ENG11_REQ_DEFAULT 0x02f80000 613#define mmMMVM_INVALIDATE_ENG12_REQ_DEFAULT 0x02f80000 614#define mmMMVM_INVALIDATE_ENG13_REQ_DEFAULT 0x02f80000 615#define mmMMVM_INVALIDATE_ENG14_REQ_DEFAULT 0x02f80000 616#define mmMMVM_INVALIDATE_ENG15_REQ_DEFAULT 0x02f80000 617#define mmMMVM_INVALIDATE_ENG16_REQ_DEFAULT 0x02f80000 618#define mmMMVM_INVALIDATE_ENG17_REQ_DEFAULT 0x02f80000 619#define mmMMVM_INVALIDATE_ENG0_ACK_DEFAULT 0x00000000 620#define mmMMVM_INVALIDATE_ENG1_ACK_DEFAULT 0x00000000 621#define mmMMVM_INVALIDATE_ENG2_ACK_DEFAULT 0x00000000 622#define mmMMVM_INVALIDATE_ENG3_ACK_DEFAULT 0x00000000 623#define mmMMVM_INVALIDATE_ENG4_ACK_DEFAULT 0x00000000 624#define mmMMVM_INVALIDATE_ENG5_ACK_DEFAULT 0x00000000 625#define mmMMVM_INVALIDATE_ENG6_ACK_DEFAULT 0x00000000 626#define mmMMVM_INVALIDATE_ENG7_ACK_DEFAULT 0x00000000 627#define mmMMVM_INVALIDATE_ENG8_ACK_DEFAULT 0x00000000 628#define mmMMVM_INVALIDATE_ENG9_ACK_DEFAULT 0x00000000 629#define mmMMVM_INVALIDATE_ENG10_ACK_DEFAULT 0x00000000 630#define mmMMVM_INVALIDATE_ENG11_ACK_DEFAULT 0x00000000 631#define mmMMVM_INVALIDATE_ENG12_ACK_DEFAULT 0x00000000 632#define mmMMVM_INVALIDATE_ENG13_ACK_DEFAULT 0x00000000 633#define mmMMVM_INVALIDATE_ENG14_ACK_DEFAULT 0x00000000 634#define mmMMVM_INVALIDATE_ENG15_ACK_DEFAULT 0x00000000 635#define mmMMVM_INVALIDATE_ENG16_ACK_DEFAULT 0x00000000 636#define mmMMVM_INVALIDATE_ENG17_ACK_DEFAULT 0x00000000 637#define mmMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32_DEFAULT 0x00000000 638#define mmMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32_DEFAULT 0x00000000 639#define mmMMVM_INVALIDATE_ENG1_ADDR_RANGE_LO32_DEFAULT 0x00000000 640#define mmMMVM_INVALIDATE_ENG1_ADDR_RANGE_HI32_DEFAULT 0x00000000 641#define mmMMVM_INVALIDATE_ENG2_ADDR_RANGE_LO32_DEFAULT 0x00000000 642#define mmMMVM_INVALIDATE_ENG2_ADDR_RANGE_HI32_DEFAULT 0x00000000 643#define mmMMVM_INVALIDATE_ENG3_ADDR_RANGE_LO32_DEFAULT 0x00000000 644#define mmMMVM_INVALIDATE_ENG3_ADDR_RANGE_HI32_DEFAULT 0x00000000 645#define mmMMVM_INVALIDATE_ENG4_ADDR_RANGE_LO32_DEFAULT 0x00000000 646#define mmMMVM_INVALIDATE_ENG4_ADDR_RANGE_HI32_DEFAULT 0x00000000 647#define mmMMVM_INVALIDATE_ENG5_ADDR_RANGE_LO32_DEFAULT 0x00000000 648#define mmMMVM_INVALIDATE_ENG5_ADDR_RANGE_HI32_DEFAULT 0x00000000 649#define mmMMVM_INVALIDATE_ENG6_ADDR_RANGE_LO32_DEFAULT 0x00000000 650#define mmMMVM_INVALIDATE_ENG6_ADDR_RANGE_HI32_DEFAULT 0x00000000 651#define mmMMVM_INVALIDATE_ENG7_ADDR_RANGE_LO32_DEFAULT 0x00000000 652#define mmMMVM_INVALIDATE_ENG7_ADDR_RANGE_HI32_DEFAULT 0x00000000 653#define mmMMVM_INVALIDATE_ENG8_ADDR_RANGE_LO32_DEFAULT 0x00000000 654#define mmMMVM_INVALIDATE_ENG8_ADDR_RANGE_HI32_DEFAULT 0x00000000 655#define mmMMVM_INVALIDATE_ENG9_ADDR_RANGE_LO32_DEFAULT 0x00000000 656#define mmMMVM_INVALIDATE_ENG9_ADDR_RANGE_HI32_DEFAULT 0x00000000 657#define mmMMVM_INVALIDATE_ENG10_ADDR_RANGE_LO32_DEFAULT 0x00000000 658#define mmMMVM_INVALIDATE_ENG10_ADDR_RANGE_HI32_DEFAULT 0x00000000 659#define mmMMVM_INVALIDATE_ENG11_ADDR_RANGE_LO32_DEFAULT 0x00000000 660#define mmMMVM_INVALIDATE_ENG11_ADDR_RANGE_HI32_DEFAULT 0x00000000 661#define mmMMVM_INVALIDATE_ENG12_ADDR_RANGE_LO32_DEFAULT 0x00000000 662#define mmMMVM_INVALIDATE_ENG12_ADDR_RANGE_HI32_DEFAULT 0x00000000 663#define mmMMVM_INVALIDATE_ENG13_ADDR_RANGE_LO32_DEFAULT 0x00000000 664#define mmMMVM_INVALIDATE_ENG13_ADDR_RANGE_HI32_DEFAULT 0x00000000 665#define mmMMVM_INVALIDATE_ENG14_ADDR_RANGE_LO32_DEFAULT 0x00000000 666#define mmMMVM_INVALIDATE_ENG14_ADDR_RANGE_HI32_DEFAULT 0x00000000 667#define mmMMVM_INVALIDATE_ENG15_ADDR_RANGE_LO32_DEFAULT 0x00000000 668#define mmMMVM_INVALIDATE_ENG15_ADDR_RANGE_HI32_DEFAULT 0x00000000 669#define mmMMVM_INVALIDATE_ENG16_ADDR_RANGE_LO32_DEFAULT 0x00000000 670#define mmMMVM_INVALIDATE_ENG16_ADDR_RANGE_HI32_DEFAULT 0x00000000 671#define mmMMVM_INVALIDATE_ENG17_ADDR_RANGE_LO32_DEFAULT 0x00000000 672#define mmMMVM_INVALIDATE_ENG17_ADDR_RANGE_HI32_DEFAULT 0x00000000 673#define mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 674#define mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 675#define mmMMVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 676#define mmMMVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 677#define mmMMVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 678#define mmMMVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 679#define mmMMVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 680#define mmMMVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 681#define mmMMVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 682#define mmMMVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 683#define mmMMVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 684#define mmMMVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 685#define mmMMVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 686#define mmMMVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 687#define mmMMVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 688#define mmMMVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 689#define mmMMVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 690#define mmMMVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 691#define mmMMVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 692#define mmMMVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 693#define mmMMVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 694#define mmMMVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 695#define mmMMVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 696#define mmMMVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 697#define mmMMVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 698#define mmMMVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 699#define mmMMVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 700#define mmMMVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 701#define mmMMVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 702#define mmMMVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 703#define mmMMVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 704#define mmMMVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 705#define mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 706#define mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 707#define mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 708#define mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 709#define mmMMVM_CONTEXT2_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 710#define mmMMVM_CONTEXT2_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 711#define mmMMVM_CONTEXT3_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 712#define mmMMVM_CONTEXT3_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 713#define mmMMVM_CONTEXT4_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 714#define mmMMVM_CONTEXT4_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 715#define mmMMVM_CONTEXT5_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 716#define mmMMVM_CONTEXT5_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 717#define mmMMVM_CONTEXT6_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 718#define mmMMVM_CONTEXT6_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 719#define mmMMVM_CONTEXT7_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 720#define mmMMVM_CONTEXT7_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 721#define mmMMVM_CONTEXT8_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 722#define mmMMVM_CONTEXT8_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 723#define mmMMVM_CONTEXT9_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 724#define mmMMVM_CONTEXT9_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 725#define mmMMVM_CONTEXT10_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 726#define mmMMVM_CONTEXT10_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 727#define mmMMVM_CONTEXT11_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 728#define mmMMVM_CONTEXT11_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 729#define mmMMVM_CONTEXT12_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 730#define mmMMVM_CONTEXT12_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 731#define mmMMVM_CONTEXT13_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 732#define mmMMVM_CONTEXT13_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 733#define mmMMVM_CONTEXT14_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 734#define mmMMVM_CONTEXT14_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 735#define mmMMVM_CONTEXT15_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 736#define mmMMVM_CONTEXT15_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 737#define mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 738#define mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 739#define mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 740#define mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 741#define mmMMVM_CONTEXT2_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 742#define mmMMVM_CONTEXT2_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 743#define mmMMVM_CONTEXT3_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 744#define mmMMVM_CONTEXT3_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 745#define mmMMVM_CONTEXT4_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 746#define mmMMVM_CONTEXT4_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 747#define mmMMVM_CONTEXT5_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 748#define mmMMVM_CONTEXT5_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 749#define mmMMVM_CONTEXT6_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 750#define mmMMVM_CONTEXT6_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 751#define mmMMVM_CONTEXT7_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 752#define mmMMVM_CONTEXT7_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 753#define mmMMVM_CONTEXT8_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 754#define mmMMVM_CONTEXT8_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 755#define mmMMVM_CONTEXT9_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 756#define mmMMVM_CONTEXT9_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 757#define mmMMVM_CONTEXT10_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 758#define mmMMVM_CONTEXT10_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 759#define mmMMVM_CONTEXT11_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 760#define mmMMVM_CONTEXT11_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 761#define mmMMVM_CONTEXT12_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 762#define mmMMVM_CONTEXT12_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 763#define mmMMVM_CONTEXT13_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 764#define mmMMVM_CONTEXT13_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 765#define mmMMVM_CONTEXT14_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 766#define mmMMVM_CONTEXT14_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 767#define mmMMVM_CONTEXT15_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 768#define mmMMVM_CONTEXT15_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 769 770 771// addressBlock: mmhub_mmutcl2_mmvml2pldec 772#define mmMMMC_VM_L2_PERFCOUNTER0_CFG_DEFAULT 0x00000000 773#define mmMMMC_VM_L2_PERFCOUNTER1_CFG_DEFAULT 0x00000000 774#define mmMMMC_VM_L2_PERFCOUNTER2_CFG_DEFAULT 0x00000000 775#define mmMMMC_VM_L2_PERFCOUNTER3_CFG_DEFAULT 0x00000000 776#define mmMMMC_VM_L2_PERFCOUNTER4_CFG_DEFAULT 0x00000000 777#define mmMMMC_VM_L2_PERFCOUNTER5_CFG_DEFAULT 0x00000000 778#define mmMMMC_VM_L2_PERFCOUNTER6_CFG_DEFAULT 0x00000000 779#define mmMMMC_VM_L2_PERFCOUNTER7_CFG_DEFAULT 0x00000000 780#define mmMMMC_VM_L2_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 781 782 783// addressBlock: mmhub_mmutcl2_mmvml2prdec 784#define mmMMMC_VM_L2_PERFCOUNTER_LO_DEFAULT 0x00000000 785#define mmMMMC_VM_L2_PERFCOUNTER_HI_DEFAULT 0x00000000 786 787 788// addressBlock: mmhub_mmutcl2_mmvmsharedhvdec 789#define mmMMMC_VM_FB_SIZE_OFFSET_VF0_DEFAULT 0x00000000 790#define mmMMMC_VM_FB_SIZE_OFFSET_VF1_DEFAULT 0x00000000 791#define mmMMMC_VM_FB_SIZE_OFFSET_VF2_DEFAULT 0x00000000 792#define mmMMMC_VM_FB_SIZE_OFFSET_VF3_DEFAULT 0x00000000 793#define mmMMMC_VM_FB_SIZE_OFFSET_VF4_DEFAULT 0x00000000 794#define mmMMMC_VM_FB_SIZE_OFFSET_VF5_DEFAULT 0x00000000 795#define mmMMMC_VM_FB_SIZE_OFFSET_VF6_DEFAULT 0x00000000 796#define mmMMMC_VM_FB_SIZE_OFFSET_VF7_DEFAULT 0x00000000 797#define mmMMMC_VM_FB_SIZE_OFFSET_VF8_DEFAULT 0x00000000 798#define mmMMMC_VM_FB_SIZE_OFFSET_VF9_DEFAULT 0x00000000 799#define mmMMMC_VM_FB_SIZE_OFFSET_VF10_DEFAULT 0x00000000 800#define mmMMMC_VM_FB_SIZE_OFFSET_VF11_DEFAULT 0x00000000 801#define mmMMMC_VM_FB_SIZE_OFFSET_VF12_DEFAULT 0x00000000 802#define mmMMMC_VM_FB_SIZE_OFFSET_VF13_DEFAULT 0x00000000 803#define mmMMMC_VM_FB_SIZE_OFFSET_VF14_DEFAULT 0x00000000 804#define mmMMMC_VM_FB_SIZE_OFFSET_VF15_DEFAULT 0x00000000 805#define mmMMMC_VM_FB_SIZE_OFFSET_VF16_DEFAULT 0x00000000 806#define mmMMMC_VM_FB_SIZE_OFFSET_VF17_DEFAULT 0x00000000 807#define mmMMMC_VM_FB_SIZE_OFFSET_VF18_DEFAULT 0x00000000 808#define mmMMMC_VM_FB_SIZE_OFFSET_VF19_DEFAULT 0x00000000 809#define mmMMMC_VM_FB_SIZE_OFFSET_VF20_DEFAULT 0x00000000 810#define mmMMMC_VM_FB_SIZE_OFFSET_VF21_DEFAULT 0x00000000 811#define mmMMMC_VM_FB_SIZE_OFFSET_VF22_DEFAULT 0x00000000 812#define mmMMMC_VM_FB_SIZE_OFFSET_VF23_DEFAULT 0x00000000 813#define mmMMMC_VM_FB_SIZE_OFFSET_VF24_DEFAULT 0x00000000 814#define mmMMMC_VM_FB_SIZE_OFFSET_VF25_DEFAULT 0x00000000 815#define mmMMMC_VM_FB_SIZE_OFFSET_VF26_DEFAULT 0x00000000 816#define mmMMMC_VM_FB_SIZE_OFFSET_VF27_DEFAULT 0x00000000 817#define mmMMMC_VM_FB_SIZE_OFFSET_VF28_DEFAULT 0x00000000 818#define mmMMMC_VM_FB_SIZE_OFFSET_VF29_DEFAULT 0x00000000 819#define mmMMMC_VM_FB_SIZE_OFFSET_VF30_DEFAULT 0x00000000 820#define mmMMMC_VM_FB_SIZE_OFFSET_VF31_DEFAULT 0x00000000 821#define mmMMVM_IOMMU_MMIO_CNTRL_1_DEFAULT 0x00000100 822#define mmMMMC_VM_MARC_BASE_LO_0_DEFAULT 0x00000000 823#define mmMMMC_VM_MARC_BASE_LO_1_DEFAULT 0x00000000 824#define mmMMMC_VM_MARC_BASE_LO_2_DEFAULT 0x00000000 825#define mmMMMC_VM_MARC_BASE_LO_3_DEFAULT 0x00000000 826#define mmMMMC_VM_MARC_BASE_HI_0_DEFAULT 0x00000000 827#define mmMMMC_VM_MARC_BASE_HI_1_DEFAULT 0x00000000 828#define mmMMMC_VM_MARC_BASE_HI_2_DEFAULT 0x00000000 829#define mmMMMC_VM_MARC_BASE_HI_3_DEFAULT 0x00000000 830#define mmMMMC_VM_MARC_RELOC_LO_0_DEFAULT 0x00000000 831#define mmMMMC_VM_MARC_RELOC_LO_1_DEFAULT 0x00000000 832#define mmMMMC_VM_MARC_RELOC_LO_2_DEFAULT 0x00000000 833#define mmMMMC_VM_MARC_RELOC_LO_3_DEFAULT 0x00000000 834#define mmMMMC_VM_MARC_RELOC_HI_0_DEFAULT 0x00000000 835#define mmMMMC_VM_MARC_RELOC_HI_1_DEFAULT 0x00000000 836#define mmMMMC_VM_MARC_RELOC_HI_2_DEFAULT 0x00000000 837#define mmMMMC_VM_MARC_RELOC_HI_3_DEFAULT 0x00000000 838#define mmMMMC_VM_MARC_LEN_LO_0_DEFAULT 0x00000000 839#define mmMMMC_VM_MARC_LEN_LO_1_DEFAULT 0x00000000 840#define mmMMMC_VM_MARC_LEN_LO_2_DEFAULT 0x00000000 841#define mmMMMC_VM_MARC_LEN_LO_3_DEFAULT 0x00000000 842#define mmMMMC_VM_MARC_LEN_HI_0_DEFAULT 0x00000000 843#define mmMMMC_VM_MARC_LEN_HI_1_DEFAULT 0x00000000 844#define mmMMMC_VM_MARC_LEN_HI_2_DEFAULT 0x00000000 845#define mmMMMC_VM_MARC_LEN_HI_3_DEFAULT 0x00000000 846#define mmMMVM_IOMMU_CONTROL_REGISTER_DEFAULT 0x00000000 847#define mmMMVM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER_DEFAULT 0x00000000 848#define mmMMVM_PCIE_ATS_CNTL_DEFAULT 0x00000000 849#define mmMMVM_PCIE_ATS_CNTL_VF_0_DEFAULT 0x00000000 850#define mmMMVM_PCIE_ATS_CNTL_VF_1_DEFAULT 0x00000000 851#define mmMMVM_PCIE_ATS_CNTL_VF_2_DEFAULT 0x00000000 852#define mmMMVM_PCIE_ATS_CNTL_VF_3_DEFAULT 0x00000000 853#define mmMMVM_PCIE_ATS_CNTL_VF_4_DEFAULT 0x00000000 854#define mmMMVM_PCIE_ATS_CNTL_VF_5_DEFAULT 0x00000000 855#define mmMMVM_PCIE_ATS_CNTL_VF_6_DEFAULT 0x00000000 856#define mmMMVM_PCIE_ATS_CNTL_VF_7_DEFAULT 0x00000000 857#define mmMMVM_PCIE_ATS_CNTL_VF_8_DEFAULT 0x00000000 858#define mmMMVM_PCIE_ATS_CNTL_VF_9_DEFAULT 0x00000000 859#define mmMMVM_PCIE_ATS_CNTL_VF_10_DEFAULT 0x00000000 860#define mmMMVM_PCIE_ATS_CNTL_VF_11_DEFAULT 0x00000000 861#define mmMMVM_PCIE_ATS_CNTL_VF_12_DEFAULT 0x00000000 862#define mmMMVM_PCIE_ATS_CNTL_VF_13_DEFAULT 0x00000000 863#define mmMMVM_PCIE_ATS_CNTL_VF_14_DEFAULT 0x00000000 864#define mmMMVM_PCIE_ATS_CNTL_VF_15_DEFAULT 0x00000000 865#define mmMMVM_PCIE_ATS_CNTL_VF_16_DEFAULT 0x00000000 866#define mmMMVM_PCIE_ATS_CNTL_VF_17_DEFAULT 0x00000000 867#define mmMMVM_PCIE_ATS_CNTL_VF_18_DEFAULT 0x00000000 868#define mmMMVM_PCIE_ATS_CNTL_VF_19_DEFAULT 0x00000000 869#define mmMMVM_PCIE_ATS_CNTL_VF_20_DEFAULT 0x00000000 870#define mmMMVM_PCIE_ATS_CNTL_VF_21_DEFAULT 0x00000000 871#define mmMMVM_PCIE_ATS_CNTL_VF_22_DEFAULT 0x00000000 872#define mmMMVM_PCIE_ATS_CNTL_VF_23_DEFAULT 0x00000000 873#define mmMMVM_PCIE_ATS_CNTL_VF_24_DEFAULT 0x00000000 874#define mmMMVM_PCIE_ATS_CNTL_VF_25_DEFAULT 0x00000000 875#define mmMMVM_PCIE_ATS_CNTL_VF_26_DEFAULT 0x00000000 876#define mmMMVM_PCIE_ATS_CNTL_VF_27_DEFAULT 0x00000000 877#define mmMMVM_PCIE_ATS_CNTL_VF_28_DEFAULT 0x00000000 878#define mmMMVM_PCIE_ATS_CNTL_VF_29_DEFAULT 0x00000000 879#define mmMMVM_PCIE_ATS_CNTL_VF_30_DEFAULT 0x00000000 880#define mmMMVM_PCIE_ATS_CNTL_VF_31_DEFAULT 0x00000000 881#define mmMMUTCL2_CGTT_CLK_CTRL_DEFAULT 0x00000080 882#define mmMMMC_SHARED_ACTIVE_FCN_ID_DEFAULT 0x00000000 883 884 885// addressBlock: mmhub_mmutcl2_mmvmsharedpfdec 886#define mmMMMC_VM_NB_MMIOBASE_DEFAULT 0x00000000 887#define mmMMMC_VM_NB_MMIOLIMIT_DEFAULT 0x00000000 888#define mmMMMC_VM_NB_PCI_CTRL_DEFAULT 0x00000000 889#define mmMMMC_VM_NB_PCI_ARB_DEFAULT 0x00000008 890#define mmMMMC_VM_NB_TOP_OF_DRAM_SLOT1_DEFAULT 0x00000000 891#define mmMMMC_VM_NB_LOWER_TOP_OF_DRAM2_DEFAULT 0x00000000 892#define mmMMMC_VM_NB_UPPER_TOP_OF_DRAM2_DEFAULT 0x00000000 893#define mmMMMC_VM_FB_OFFSET_DEFAULT 0x00000000 894#define mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_DEFAULT 0x00000000 895#define mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_DEFAULT 0x00000000 896#define mmMMMC_VM_STEERING_DEFAULT 0x00000001 897#define mmMMMC_SHARED_VIRT_RESET_REQ_DEFAULT 0x00000000 898#define mmMMMC_MEM_POWER_LS_DEFAULT 0x00000208 899#define mmMMMC_VM_CACHEABLE_DRAM_ADDRESS_START_DEFAULT 0x00000000 900#define mmMMMC_VM_CACHEABLE_DRAM_ADDRESS_END_DEFAULT 0x00000000 901#define mmMMMC_VM_APT_CNTL_DEFAULT 0x00000000 902#define mmMMMC_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL_DEFAULT 0x00000000 903#define mmMMMC_VM_LOCAL_HBM_ADDRESS_START_DEFAULT 0x00000000 904#define mmMMMC_VM_LOCAL_HBM_ADDRESS_END_DEFAULT 0x000fffff 905#define mmMMMC_SHARED_VIRT_RESET_REQ2_DEFAULT 0x00000000 906 907 908// addressBlock: mmhub_mmutcl2_mmvmsharedvcdec 909#define mmMMMC_VM_FB_LOCATION_BASE_DEFAULT 0x00000000 910#define mmMMMC_VM_FB_LOCATION_TOP_DEFAULT 0x00000000 911#define mmMMMC_VM_AGP_TOP_DEFAULT 0x00000000 912#define mmMMMC_VM_AGP_BOT_DEFAULT 0x00000000 913#define mmMMMC_VM_AGP_BASE_DEFAULT 0x00000000 914#define mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR_DEFAULT 0x00000000 915#define mmMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR_DEFAULT 0x00000000 916#define mmMMMC_VM_MX_L1_TLB_CNTL_DEFAULT 0x00000501 917 918 919// addressBlock: mmhub_mmutcl2_mmatcl2pfcntrdec 920#define mmMM_ATC_L2_PERFCOUNTER_LO_DEFAULT 0x00000000 921#define mmMM_ATC_L2_PERFCOUNTER_HI_DEFAULT 0x00000000 922 923 924// addressBlock: mmhub_mmutcl2_mmatcl2pfcntldec 925#define mmMM_ATC_L2_PERFCOUNTER0_CFG_DEFAULT 0x00000000 926#define mmMM_ATC_L2_PERFCOUNTER1_CFG_DEFAULT 0x00000000 927#define mmMM_ATC_L2_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 928 929#endif 930