1/* $NetBSD: df_3_6_offset.h,v 1.2 2021/12/18 23:45:13 riastradh Exp $ */ 2 3/* 4 * Copyright (C) 2018 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included 14 * in all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 20 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23#ifndef _df_3_6_OFFSET_HEADER 24#define _df_3_6_OFFSET_HEADER 25 26#define mmFabricConfigAccessControl 0x0410 27#define mmFabricConfigAccessControl_BASE_IDX 0 28 29#define mmDF_PIE_AON0_DfGlobalClkGater 0x00fc 30#define mmDF_PIE_AON0_DfGlobalClkGater_BASE_IDX 0 31 32#define mmDF_CS_UMC_AON0_DfGlobalCtrl 0x00fe 33#define mmDF_CS_UMC_AON0_DfGlobalCtrl_BASE_IDX 0 34 35#define mmDF_CS_UMC_AON0_DramBaseAddress0 0x0044 36#define mmDF_CS_UMC_AON0_DramBaseAddress0_BASE_IDX 0 37 38#define smnPerfMonCtlLo0 0x01d440UL 39#define smnPerfMonCtlHi0 0x01d444UL 40#define smnPerfMonCtlLo1 0x01d450UL 41#define smnPerfMonCtlHi1 0x01d454UL 42#define smnPerfMonCtlLo2 0x01d460UL 43#define smnPerfMonCtlHi2 0x01d464UL 44#define smnPerfMonCtlLo3 0x01d470UL 45#define smnPerfMonCtlHi3 0x01d474UL 46#define smnPerfMonCtlLo4 0x01d880UL 47#define smnPerfMonCtlHi4 0x01d884UL 48#define smnPerfMonCtlLo5 0x01d888UL 49#define smnPerfMonCtlHi5 0x01d88cUL 50#define smnPerfMonCtlLo6 0x01d890UL 51#define smnPerfMonCtlHi6 0x01d894UL 52#define smnPerfMonCtlLo7 0x01d898UL 53#define smnPerfMonCtlHi7 0x01d89cUL 54 55#define smnPerfMonCtrLo0 0x01d448UL 56#define smnPerfMonCtrHi0 0x01d44cUL 57#define smnPerfMonCtrLo1 0x01d458UL 58#define smnPerfMonCtrHi1 0x01d45cUL 59#define smnPerfMonCtrLo2 0x01d468UL 60#define smnPerfMonCtrHi2 0x01d46cUL 61#define smnPerfMonCtrLo3 0x01d478UL 62#define smnPerfMonCtrHi3 0x01d47cUL 63#define smnPerfMonCtrLo4 0x01d790UL 64#define smnPerfMonCtrHi4 0x01d794UL 65#define smnPerfMonCtrLo5 0x01d798UL 66#define smnPerfMonCtrHi5 0x01d79cUL 67#define smnPerfMonCtrLo6 0x01d7a0UL 68#define smnPerfMonCtrHi6 0x01d7a4UL 69#define smnPerfMonCtrLo7 0x01d7a8UL 70#define smnPerfMonCtrHi7 0x01d7acUL 71 72#define smnDF_PIE_AON_FabricIndirectConfigAccessAddress3 0x1d05cUL 73#define smnDF_PIE_AON_FabricIndirectConfigAccessDataLo3 0x1d098UL 74#define smnDF_PIE_AON_FabricIndirectConfigAccessDataHi3 0x1d09cUL 75 76#define smnDF_CS_UMC_AON0_DramBaseAddress0 0x1c110UL 77#define smnDF_CS_UMC_AON0_DramLimitAddress0 0x1c114UL 78 79#endif 80