1/* $NetBSD: hw_gpio.h,v 1.2 2021/12/18 23:45:04 riastradh Exp $ */ 2 3/* 4 * Copyright 2012-15 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: AMD 25 * 26 */ 27 28#ifndef __DAL_HW_GPIO_H__ 29#define __DAL_HW_GPIO_H__ 30 31#include "gpio_regs.h" 32 33#define FROM_HW_GPIO_PIN(ptr) \ 34 container_of((ptr), struct hw_gpio, base) 35 36struct addr_mask { 37 uint32_t addr; 38 uint32_t mask; 39}; 40 41struct hw_gpio_pin { 42 const struct hw_gpio_pin_funcs *funcs; 43 enum gpio_id id; 44 uint32_t en; 45 enum gpio_mode mode; 46 bool opened; 47 struct dc_context *ctx; 48}; 49 50struct hw_gpio_pin_funcs { 51 void (*destroy)( 52 struct hw_gpio_pin **ptr); 53 bool (*open)( 54 struct hw_gpio_pin *pin, 55 enum gpio_mode mode); 56 enum gpio_result (*get_value)( 57 const struct hw_gpio_pin *pin, 58 uint32_t *value); 59 enum gpio_result (*set_value)( 60 const struct hw_gpio_pin *pin, 61 uint32_t value); 62 enum gpio_result (*set_config)( 63 struct hw_gpio_pin *pin, 64 const struct gpio_config_data *config_data); 65 enum gpio_result (*change_mode)( 66 struct hw_gpio_pin *pin, 67 enum gpio_mode mode); 68 void (*close)( 69 struct hw_gpio_pin *pin); 70}; 71 72 73struct hw_gpio; 74 75/* Register indices are represented by member variables 76 * and are to be filled in by constructors of derived classes. 77 * These members permit the use of common code 78 * for programming registers, where the sequence is the same 79 * but register sets are different. 80 * Some GPIOs have HW mux which allows to choose 81 * what is the source of the signal in HW mode */ 82 83struct hw_gpio_pin_reg { 84 struct addr_mask DC_GPIO_DATA_MASK; 85 struct addr_mask DC_GPIO_DATA_A; 86 struct addr_mask DC_GPIO_DATA_EN; 87 struct addr_mask DC_GPIO_DATA_Y; 88}; 89 90struct hw_gpio_mux_reg { 91 struct addr_mask GPIO_MUX_CONTROL; 92 struct addr_mask GPIO_MUX_STEREO_SEL; 93}; 94 95struct hw_gpio { 96 struct hw_gpio_pin base; 97 98 /* variables to save register value */ 99 struct { 100 uint32_t mask; 101 uint32_t a; 102 uint32_t en; 103 uint32_t mux; 104 } store; 105 106 /* GPIO MUX support */ 107 bool mux_supported; 108 const struct gpio_registers *regs; 109}; 110 111#define HW_GPIO_FROM_BASE(hw_gpio_pin) \ 112 container_of((hw_gpio_pin), struct hw_gpio, base) 113 114void dal_hw_gpio_construct( 115 struct hw_gpio *pin, 116 enum gpio_id id, 117 uint32_t en, 118 struct dc_context *ctx); 119 120bool dal_hw_gpio_open( 121 struct hw_gpio_pin *pin, 122 enum gpio_mode mode); 123 124enum gpio_result dal_hw_gpio_get_value( 125 const struct hw_gpio_pin *pin, 126 uint32_t *value); 127 128enum gpio_result dal_hw_gpio_config_mode( 129 struct hw_gpio *pin, 130 enum gpio_mode mode); 131 132void dal_hw_gpio_destruct( 133 struct hw_gpio *pin); 134 135enum gpio_result dal_hw_gpio_set_value( 136 const struct hw_gpio_pin *ptr, 137 uint32_t value); 138 139enum gpio_result dal_hw_gpio_change_mode( 140 struct hw_gpio_pin *ptr, 141 enum gpio_mode mode); 142 143void dal_hw_gpio_close( 144 struct hw_gpio_pin *ptr); 145 146#endif 147