1/* $NetBSD: amdgpu_gem.h,v 1.2 2021/12/18 23:44:58 riastradh Exp $ */ 2 3/* 4 * Copyright 2018 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 */ 25#ifndef __AMDGPU_GEM_H__ 26#define __AMDGPU_GEM_H__ 27 28#include <drm/amdgpu_drm.h> 29#include <drm/drm_gem.h> 30 31/* 32 * GEM. 33 */ 34 35#define AMDGPU_GEM_DOMAIN_MAX 0x3 36#define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo, tbo.base) 37 38void amdgpu_gem_object_free(struct drm_gem_object *obj); 39int amdgpu_gem_object_open(struct drm_gem_object *obj, 40 struct drm_file *file_priv); 41void amdgpu_gem_object_close(struct drm_gem_object *obj, 42 struct drm_file *file_priv); 43unsigned long amdgpu_gem_timeout(uint64_t timeout_ns); 44 45/* 46 * GEM objects. 47 */ 48void amdgpu_gem_force_release(struct amdgpu_device *adev); 49int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size, 50 int alignment, u32 initial_domain, 51 u64 flags, enum ttm_bo_type type, 52 struct dma_resv *resv, 53 struct drm_gem_object **obj); 54 55int amdgpu_mode_dumb_create(struct drm_file *file_priv, 56 struct drm_device *dev, 57 struct drm_mode_create_dumb *args); 58int amdgpu_mode_dumb_mmap(struct drm_file *filp, 59 struct drm_device *dev, 60 uint32_t handle, uint64_t *offset_p); 61 62int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data, 63 struct drm_file *filp); 64int amdgpu_gem_info_ioctl(struct drm_device *dev, void *data, 65 struct drm_file *filp); 66int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data, 67 struct drm_file *filp); 68int amdgpu_gem_mmap_ioctl(struct drm_device *dev, void *data, 69 struct drm_file *filp); 70int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data, 71 struct drm_file *filp); 72uint64_t amdgpu_gem_va_map_flags(struct amdgpu_device *adev, uint32_t flags); 73int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, 74 struct drm_file *filp); 75int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data, 76 struct drm_file *filp); 77 78int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data, 79 struct drm_file *filp); 80 81#endif 82