1/* $NetBSD: if_ural.c,v 1.66 2022/08/20 19:11:08 thorpej Exp $ */ 2/* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4/*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini@free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21/*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26#include <sys/cdefs.h> 27__KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.66 2022/08/20 19:11:08 thorpej Exp $"); 28 29#ifdef _KERNEL_OPT 30#include "opt_usb.h" 31#endif 32 33#include <sys/param.h> 34#include <sys/sockio.h> 35#include <sys/sysctl.h> 36#include <sys/mbuf.h> 37#include <sys/kernel.h> 38#include <sys/socket.h> 39#include <sys/systm.h> 40#include <sys/conf.h> 41#include <sys/device.h> 42 43#include <sys/bus.h> 44#include <machine/endian.h> 45#include <sys/intr.h> 46 47#include <net/bpf.h> 48#include <net/if.h> 49#include <net/if_arp.h> 50#include <net/if_dl.h> 51#include <net/if_ether.h> 52#include <net/if_media.h> 53#include <net/if_types.h> 54 55#include <netinet/in.h> 56#include <netinet/in_systm.h> 57#include <netinet/in_var.h> 58#include <netinet/ip.h> 59 60#include <net80211/ieee80211_netbsd.h> 61#include <net80211/ieee80211_var.h> 62#include <net80211/ieee80211_amrr.h> 63#include <net80211/ieee80211_radiotap.h> 64 65#include <dev/usb/usb.h> 66#include <dev/usb/usbdi.h> 67#include <dev/usb/usbdi_util.h> 68#include <dev/usb/usbdevs.h> 69 70#include <dev/usb/if_uralreg.h> 71#include <dev/usb/if_uralvar.h> 72 73#ifdef URAL_DEBUG 74#define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 75#define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 76int ural_debug = 0; 77#else 78#define DPRINTF(x) 79#define DPRINTFN(n, x) 80#endif 81 82/* various supported device vendors/products */ 83static const struct usb_devno ural_devs[] = { 84 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 85 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 86 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 87 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 88 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 89 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 90 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 91 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 92 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 93 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 94 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 95 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 96 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 97 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 98 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 99 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 100 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 101 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 102 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 103 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 105 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 106 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 107 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 108 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 109 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 110}; 111 112Static int ural_alloc_tx_list(struct ural_softc *); 113Static void ural_free_tx_list(struct ural_softc *); 114Static int ural_alloc_rx_list(struct ural_softc *); 115Static void ural_free_rx_list(struct ural_softc *); 116Static int ural_media_change(struct ifnet *); 117Static void ural_next_scan(void *); 118Static void ural_task(void *); 119Static int ural_newstate(struct ieee80211com *, 120 enum ieee80211_state, int); 121Static int ural_rxrate(struct ural_rx_desc *); 122Static void ural_txeof(struct usbd_xfer *, void *, 123 usbd_status); 124Static void ural_rxeof(struct usbd_xfer *, void *, 125 usbd_status); 126Static int ural_ack_rate(struct ieee80211com *, int); 127Static uint16_t ural_txtime(int, int, uint32_t); 128Static uint8_t ural_plcp_signal(int); 129Static void ural_setup_tx_desc(struct ural_softc *, 130 struct ural_tx_desc *, uint32_t, int, int); 131Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 132 struct ieee80211_node *); 133Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 134 struct ieee80211_node *); 135Static int ural_tx_data(struct ural_softc *, struct mbuf *, 136 struct ieee80211_node *); 137Static void ural_start(struct ifnet *); 138Static void ural_watchdog(struct ifnet *); 139Static int ural_reset(struct ifnet *); 140Static int ural_ioctl(struct ifnet *, u_long, void *); 141Static void ural_set_testmode(struct ural_softc *); 142Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 143 int); 144Static uint16_t ural_read(struct ural_softc *, uint16_t); 145Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 146 int); 147Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 148Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 149 int); 150Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 151Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 152Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 153Static void ural_set_chan(struct ural_softc *, 154 struct ieee80211_channel *); 155Static void ural_disable_rf_tune(struct ural_softc *); 156Static void ural_enable_tsf_sync(struct ural_softc *); 157Static void ural_update_slot(struct ifnet *); 158Static void ural_set_txpreamble(struct ural_softc *); 159Static void ural_set_basicrates(struct ural_softc *); 160Static void ural_set_bssid(struct ural_softc *, uint8_t *); 161Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 162Static void ural_update_promisc(struct ural_softc *); 163Static const char *ural_get_rf(int); 164Static void ural_read_eeprom(struct ural_softc *); 165Static int ural_bbp_init(struct ural_softc *); 166Static void ural_set_txantenna(struct ural_softc *, int); 167Static void ural_set_rxantenna(struct ural_softc *, int); 168Static int ural_init(struct ifnet *); 169Static void ural_stop(struct ifnet *, int); 170Static void ural_amrr_start(struct ural_softc *, 171 struct ieee80211_node *); 172Static void ural_amrr_timeout(void *); 173Static void ural_amrr_update(struct usbd_xfer *, void *, 174 usbd_status status); 175 176/* 177 * Default values for MAC registers; values taken from the reference driver. 178 */ 179static const struct { 180 uint16_t reg; 181 uint16_t val; 182} ural_def_mac[] = { 183 { RAL_TXRX_CSR5, 0x8c8d }, 184 { RAL_TXRX_CSR6, 0x8b8a }, 185 { RAL_TXRX_CSR7, 0x8687 }, 186 { RAL_TXRX_CSR8, 0x0085 }, 187 { RAL_MAC_CSR13, 0x1111 }, 188 { RAL_MAC_CSR14, 0x1e11 }, 189 { RAL_TXRX_CSR21, 0xe78f }, 190 { RAL_MAC_CSR9, 0xff1d }, 191 { RAL_MAC_CSR11, 0x0002 }, 192 { RAL_MAC_CSR22, 0x0053 }, 193 { RAL_MAC_CSR15, 0x0000 }, 194 { RAL_MAC_CSR8, 0x0780 }, 195 { RAL_TXRX_CSR19, 0x0000 }, 196 { RAL_TXRX_CSR18, 0x005a }, 197 { RAL_PHY_CSR2, 0x0000 }, 198 { RAL_TXRX_CSR0, 0x1ec0 }, 199 { RAL_PHY_CSR4, 0x000f } 200}; 201 202/* 203 * Default values for BBP registers; values taken from the reference driver. 204 */ 205static const struct { 206 uint8_t reg; 207 uint8_t val; 208} ural_def_bbp[] = { 209 { 3, 0x02 }, 210 { 4, 0x19 }, 211 { 14, 0x1c }, 212 { 15, 0x30 }, 213 { 16, 0xac }, 214 { 17, 0x48 }, 215 { 18, 0x18 }, 216 { 19, 0xff }, 217 { 20, 0x1e }, 218 { 21, 0x08 }, 219 { 22, 0x08 }, 220 { 23, 0x08 }, 221 { 24, 0x80 }, 222 { 25, 0x50 }, 223 { 26, 0x08 }, 224 { 27, 0x23 }, 225 { 30, 0x10 }, 226 { 31, 0x2b }, 227 { 32, 0xb9 }, 228 { 34, 0x12 }, 229 { 35, 0x50 }, 230 { 39, 0xc4 }, 231 { 40, 0x02 }, 232 { 41, 0x60 }, 233 { 53, 0x10 }, 234 { 54, 0x18 }, 235 { 56, 0x08 }, 236 { 57, 0x10 }, 237 { 58, 0x08 }, 238 { 61, 0x60 }, 239 { 62, 0x10 }, 240 { 75, 0xff } 241}; 242 243/* 244 * Default values for RF register R2 indexed by channel numbers. 245 */ 246static const uint32_t ural_rf2522_r2[] = { 247 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 248 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 249}; 250 251static const uint32_t ural_rf2523_r2[] = { 252 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 253 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 254}; 255 256static const uint32_t ural_rf2524_r2[] = { 257 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 258 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 259}; 260 261static const uint32_t ural_rf2525_r2[] = { 262 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 263 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 264}; 265 266static const uint32_t ural_rf2525_hi_r2[] = { 267 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 268 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 269}; 270 271static const uint32_t ural_rf2525e_r2[] = { 272 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 273 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 274}; 275 276static const uint32_t ural_rf2526_hi_r2[] = { 277 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 278 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 279}; 280 281static const uint32_t ural_rf2526_r2[] = { 282 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 283 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 284}; 285 286/* 287 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 288 * values taken from the reference driver. 289 */ 290static const struct { 291 uint8_t chan; 292 uint32_t r1; 293 uint32_t r2; 294 uint32_t r4; 295} ural_rf5222[] = { 296 { 1, 0x08808, 0x0044d, 0x00282 }, 297 { 2, 0x08808, 0x0044e, 0x00282 }, 298 { 3, 0x08808, 0x0044f, 0x00282 }, 299 { 4, 0x08808, 0x00460, 0x00282 }, 300 { 5, 0x08808, 0x00461, 0x00282 }, 301 { 6, 0x08808, 0x00462, 0x00282 }, 302 { 7, 0x08808, 0x00463, 0x00282 }, 303 { 8, 0x08808, 0x00464, 0x00282 }, 304 { 9, 0x08808, 0x00465, 0x00282 }, 305 { 10, 0x08808, 0x00466, 0x00282 }, 306 { 11, 0x08808, 0x00467, 0x00282 }, 307 { 12, 0x08808, 0x00468, 0x00282 }, 308 { 13, 0x08808, 0x00469, 0x00282 }, 309 { 14, 0x08808, 0x0046b, 0x00286 }, 310 311 { 36, 0x08804, 0x06225, 0x00287 }, 312 { 40, 0x08804, 0x06226, 0x00287 }, 313 { 44, 0x08804, 0x06227, 0x00287 }, 314 { 48, 0x08804, 0x06228, 0x00287 }, 315 { 52, 0x08804, 0x06229, 0x00287 }, 316 { 56, 0x08804, 0x0622a, 0x00287 }, 317 { 60, 0x08804, 0x0622b, 0x00287 }, 318 { 64, 0x08804, 0x0622c, 0x00287 }, 319 320 { 100, 0x08804, 0x02200, 0x00283 }, 321 { 104, 0x08804, 0x02201, 0x00283 }, 322 { 108, 0x08804, 0x02202, 0x00283 }, 323 { 112, 0x08804, 0x02203, 0x00283 }, 324 { 116, 0x08804, 0x02204, 0x00283 }, 325 { 120, 0x08804, 0x02205, 0x00283 }, 326 { 124, 0x08804, 0x02206, 0x00283 }, 327 { 128, 0x08804, 0x02207, 0x00283 }, 328 { 132, 0x08804, 0x02208, 0x00283 }, 329 { 136, 0x08804, 0x02209, 0x00283 }, 330 { 140, 0x08804, 0x0220a, 0x00283 }, 331 332 { 149, 0x08808, 0x02429, 0x00281 }, 333 { 153, 0x08808, 0x0242b, 0x00281 }, 334 { 157, 0x08808, 0x0242d, 0x00281 }, 335 { 161, 0x08808, 0x0242f, 0x00281 } 336}; 337 338static int ural_match(device_t, cfdata_t, void *); 339static void ural_attach(device_t, device_t, void *); 340static int ural_detach(device_t, int); 341static int ural_activate(device_t, enum devact); 342 343CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, 344 ural_detach, ural_activate); 345 346static int 347ural_match(device_t parent, cfdata_t match, void *aux) 348{ 349 struct usb_attach_arg *uaa = aux; 350 351 return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 352 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 353} 354 355static void 356ural_attach(device_t parent, device_t self, void *aux) 357{ 358 struct ural_softc *sc = device_private(self); 359 struct usb_attach_arg *uaa = aux; 360 struct ieee80211com *ic = &sc->sc_ic; 361 struct ifnet *ifp = &sc->sc_if; 362 usb_interface_descriptor_t *id; 363 usb_endpoint_descriptor_t *ed; 364 usbd_status error; 365 char *devinfop; 366 int i; 367 368 sc->sc_dev = self; 369 sc->sc_udev = uaa->uaa_device; 370 sc->sc_init_state = URAL_INIT_NONE; 371 372 aprint_naive("\n"); 373 aprint_normal("\n"); 374 375 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 376 aprint_normal_dev(self, "%s\n", devinfop); 377 usbd_devinfo_free(devinfop); 378 379 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 380 if (error != 0) { 381 aprint_error_dev(self, "failed to set configuration" 382 ", err=%s\n", usbd_errstr(error)); 383 return; 384 } 385 386 /* get the first interface handle */ 387 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 388 &sc->sc_iface); 389 if (error != 0) { 390 aprint_error_dev(self, "could not get interface handle\n"); 391 return; 392 } 393 394 /* 395 * Find endpoints. 396 */ 397 id = usbd_get_interface_descriptor(sc->sc_iface); 398 399 sc->sc_rx_no = sc->sc_tx_no = -1; 400 for (i = 0; i < id->bNumEndpoints; i++) { 401 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 402 if (ed == NULL) { 403 aprint_error_dev(self, 404 "no endpoint descriptor for %d\n", i); 405 return; 406 } 407 408 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 409 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 410 sc->sc_rx_no = ed->bEndpointAddress; 411 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 412 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 413 sc->sc_tx_no = ed->bEndpointAddress; 414 } 415 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 416 aprint_error_dev(self, "missing endpoint\n"); 417 return; 418 } 419 420 usb_init_task(&sc->sc_task, ural_task, sc, 0); 421 callout_init(&sc->sc_scan_ch, 0); 422 sc->amrr.amrr_min_success_threshold = 1; 423 sc->amrr.amrr_max_success_threshold = 15; 424 callout_init(&sc->sc_amrr_ch, 0); 425 426 /* retrieve RT2570 rev. no */ 427 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 428 429 /* retrieve MAC address and various other things from EEPROM */ 430 ural_read_eeprom(sc); 431 432 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 433 sc->asic_rev, ural_get_rf(sc->rf_rev)); 434 435 ifp->if_softc = sc; 436 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 437 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 438 ifp->if_init = ural_init; 439 ifp->if_ioctl = ural_ioctl; 440 ifp->if_start = ural_start; 441 ifp->if_watchdog = ural_watchdog; 442 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 443 IFQ_SET_READY(&ifp->if_snd); 444 445 ic->ic_ifp = ifp; 446 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 447 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 448 ic->ic_state = IEEE80211_S_INIT; 449 450 /* set device capabilities */ 451 ic->ic_caps = 452 IEEE80211_C_IBSS | /* IBSS mode supported */ 453 IEEE80211_C_MONITOR | /* monitor mode supported */ 454 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 455 IEEE80211_C_TXPMGT | /* tx power management */ 456 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 457 IEEE80211_C_SHSLOT | /* short slot time supported */ 458 IEEE80211_C_WPA; /* 802.11i */ 459 460 if (sc->rf_rev == RAL_RF_5222) { 461 /* set supported .11a rates */ 462 ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a; 463 464 /* set supported .11a channels */ 465 for (i = 36; i <= 64; i += 4) { 466 ic->ic_channels[i].ic_freq = 467 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 468 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 469 } 470 for (i = 100; i <= 140; i += 4) { 471 ic->ic_channels[i].ic_freq = 472 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 473 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 474 } 475 for (i = 149; i <= 161; i += 4) { 476 ic->ic_channels[i].ic_freq = 477 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 478 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 479 } 480 } 481 482 /* set supported .11b and .11g rates */ 483 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 484 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 485 486 /* set supported .11b and .11g channels (1 through 14) */ 487 for (i = 1; i <= 14; i++) { 488 ic->ic_channels[i].ic_freq = 489 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 490 ic->ic_channels[i].ic_flags = 491 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 492 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 493 } 494 495 if_attach(ifp); 496 ieee80211_ifattach(ic); 497 ic->ic_reset = ural_reset; 498 499 /* override state transition machine */ 500 sc->sc_newstate = ic->ic_newstate; 501 ic->ic_newstate = ural_newstate; 502 503 /* XXX media locking needs revisiting */ 504 mutex_init(&sc->sc_media_mtx, MUTEX_DEFAULT, IPL_SOFTUSB); 505 ieee80211_media_init_with_lock(ic, 506 ural_media_change, ieee80211_media_status, &sc->sc_media_mtx); 507 508 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 509 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 510 511 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 512 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 513 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 514 515 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 516 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 517 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 518 519 ieee80211_announce(ic); 520 521 sc->sc_init_state = URAL_INIT_INITED; 522 523 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); 524 525 if (!pmf_device_register(self, NULL, NULL)) 526 aprint_error_dev(self, "couldn't establish power handler\n"); 527 528 return; 529} 530 531static int 532ural_detach(device_t self, int flags) 533{ 534 struct ural_softc *sc = device_private(self); 535 struct ieee80211com *ic = &sc->sc_ic; 536 struct ifnet *ifp = &sc->sc_if; 537 int s; 538 539 if (sc->sc_init_state < URAL_INIT_INITED) 540 return 0; 541 542 pmf_device_deregister(self); 543 544 s = splusb(); 545 546 ural_stop(ifp, 1); 547 callout_halt(&sc->sc_scan_ch, NULL); 548 callout_halt(&sc->sc_amrr_ch, NULL); 549 usb_rem_task_wait(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER, NULL); 550 551 bpf_detach(ifp); 552 ieee80211_ifdetach(ic); 553 if_detach(ifp); 554 555 splx(s); 556 557 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); 558 559 return 0; 560} 561 562Static int 563ural_alloc_tx_list(struct ural_softc *sc) 564{ 565 struct ural_tx_data *data; 566 int i, error; 567 568 sc->tx_queued = 0; 569 570 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 571 data = &sc->tx_data[i]; 572 573 data->sc = sc; 574 error = usbd_create_xfer(sc->sc_tx_pipeh, 575 RAL_TX_DESC_SIZE + MCLBYTES, USBD_FORCE_SHORT_XFER, 0, 576 &data->xfer); 577 if (error) { 578 printf("%s: could not allocate tx xfer\n", 579 device_xname(sc->sc_dev)); 580 goto fail; 581 } 582 583 data->buf = usbd_get_buffer(data->xfer); 584 } 585 586 return 0; 587 588fail: ural_free_tx_list(sc); 589 return error; 590} 591 592Static void 593ural_free_tx_list(struct ural_softc *sc) 594{ 595 struct ural_tx_data *data; 596 int i; 597 598 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 599 data = &sc->tx_data[i]; 600 601 if (data->xfer != NULL) { 602 usbd_destroy_xfer(data->xfer); 603 data->xfer = NULL; 604 } 605 606 if (data->ni != NULL) { 607 ieee80211_free_node(data->ni); 608 data->ni = NULL; 609 } 610 } 611} 612 613Static int 614ural_alloc_rx_list(struct ural_softc *sc) 615{ 616 struct ural_rx_data *data; 617 int i, error; 618 619 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 620 data = &sc->rx_data[i]; 621 622 data->sc = sc; 623 624 error = usbd_create_xfer(sc->sc_rx_pipeh, MCLBYTES, 625 0, 0, &data->xfer); 626 if (error) { 627 printf("%s: could not allocate rx xfer\n", 628 device_xname(sc->sc_dev)); 629 goto fail; 630 } 631 632 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 633 if (data->m == NULL) { 634 printf("%s: could not allocate rx mbuf\n", 635 device_xname(sc->sc_dev)); 636 error = ENOMEM; 637 goto fail; 638 } 639 640 MCLGET(data->m, M_DONTWAIT); 641 if (!(data->m->m_flags & M_EXT)) { 642 printf("%s: could not allocate rx mbuf cluster\n", 643 device_xname(sc->sc_dev)); 644 error = ENOMEM; 645 goto fail; 646 } 647 648 data->buf = mtod(data->m, uint8_t *); 649 } 650 651 return 0; 652 653fail: ural_free_rx_list(sc); 654 return error; 655} 656 657Static void 658ural_free_rx_list(struct ural_softc *sc) 659{ 660 struct ural_rx_data *data; 661 int i; 662 663 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 664 data = &sc->rx_data[i]; 665 666 if (data->xfer != NULL) { 667 usbd_destroy_xfer(data->xfer); 668 data->xfer = NULL; 669 } 670 671 if (data->m != NULL) { 672 m_freem(data->m); 673 data->m = NULL; 674 } 675 } 676} 677 678Static int 679ural_media_change(struct ifnet *ifp) 680{ 681 int error; 682 683 error = ieee80211_media_change(ifp); 684 if (error != ENETRESET) 685 return error; 686 687 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 688 ural_init(ifp); 689 690 return 0; 691} 692 693/* 694 * This function is called periodically (every 200ms) during scanning to 695 * switch from one channel to another. 696 */ 697Static void 698ural_next_scan(void *arg) 699{ 700 struct ural_softc *sc = arg; 701 struct ieee80211com *ic = &sc->sc_ic; 702 703 if (ic->ic_state == IEEE80211_S_SCAN) 704 ieee80211_next_scan(ic); 705} 706 707Static void 708ural_task(void *arg) 709{ 710 struct ural_softc *sc = arg; 711 struct ieee80211com *ic = &sc->sc_ic; 712 enum ieee80211_state ostate; 713 struct ieee80211_node *ni; 714 struct mbuf *m; 715 716 ostate = ic->ic_state; 717 718 switch (sc->sc_state) { 719 case IEEE80211_S_INIT: 720 if (ostate == IEEE80211_S_RUN) { 721 /* abort TSF synchronization */ 722 ural_write(sc, RAL_TXRX_CSR19, 0); 723 724 /* force tx led to stop blinking */ 725 ural_write(sc, RAL_MAC_CSR20, 0); 726 } 727 break; 728 729 case IEEE80211_S_SCAN: 730 ural_set_chan(sc, ic->ic_curchan); 731 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 732 break; 733 734 case IEEE80211_S_AUTH: 735 ural_set_chan(sc, ic->ic_curchan); 736 break; 737 738 case IEEE80211_S_ASSOC: 739 ural_set_chan(sc, ic->ic_curchan); 740 break; 741 742 case IEEE80211_S_RUN: 743 ural_set_chan(sc, ic->ic_curchan); 744 745 ni = ic->ic_bss; 746 747 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 748 ural_update_slot(ic->ic_ifp); 749 ural_set_txpreamble(sc); 750 ural_set_basicrates(sc); 751 ural_set_bssid(sc, ni->ni_bssid); 752 } 753 754 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 755 ic->ic_opmode == IEEE80211_M_IBSS) { 756 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 757 if (m == NULL) { 758 printf("%s: could not allocate beacon\n", 759 device_xname(sc->sc_dev)); 760 return; 761 } 762 763 if (ural_tx_bcn(sc, m, ni) != 0) { 764 m_freem(m); 765 printf("%s: could not send beacon\n", 766 device_xname(sc->sc_dev)); 767 return; 768 } 769 770 /* beacon is no longer needed */ 771 m_freem(m); 772 } 773 774 /* make tx led blink on tx (controlled by ASIC) */ 775 ural_write(sc, RAL_MAC_CSR20, 1); 776 777 if (ic->ic_opmode != IEEE80211_M_MONITOR) 778 ural_enable_tsf_sync(sc); 779 780 /* enable automatic rate adaptation in STA mode */ 781 if (ic->ic_opmode == IEEE80211_M_STA && 782 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 783 ural_amrr_start(sc, ni); 784 785 break; 786 } 787 788 sc->sc_newstate(ic, sc->sc_state, -1); 789} 790 791Static int 792ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 793 int arg) 794{ 795 struct ural_softc *sc = ic->ic_ifp->if_softc; 796 797 /* 798 * XXXSMP: This does not wait for the task, if it is in flight, 799 * to complete. If this code works at all, it must rely on the 800 * kernel lock to serialize with the USB task thread. 801 */ 802 usb_rem_task(sc->sc_udev, &sc->sc_task); 803 callout_stop(&sc->sc_scan_ch); 804 callout_stop(&sc->sc_amrr_ch); 805 806 /* do it in a process context */ 807 sc->sc_state = nstate; 808 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 809 810 return 0; 811} 812 813/* quickly determine if a given rate is CCK or OFDM */ 814#define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 815 816#define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 817#define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 818 819#define RAL_SIFS 10 /* us */ 820 821#define RAL_RXTX_TURNAROUND 5 /* us */ 822 823/* 824 * This function is only used by the Rx radiotap code. 825 */ 826Static int 827ural_rxrate(struct ural_rx_desc *desc) 828{ 829 if (le32toh(desc->flags) & RAL_RX_OFDM) { 830 /* reverse function of ural_plcp_signal */ 831 switch (desc->rate) { 832 case 0xb: return 12; 833 case 0xf: return 18; 834 case 0xa: return 24; 835 case 0xe: return 36; 836 case 0x9: return 48; 837 case 0xd: return 72; 838 case 0x8: return 96; 839 case 0xc: return 108; 840 } 841 } else { 842 if (desc->rate == 10) 843 return 2; 844 if (desc->rate == 20) 845 return 4; 846 if (desc->rate == 55) 847 return 11; 848 if (desc->rate == 110) 849 return 22; 850 } 851 return 2; /* should not get there */ 852} 853 854Static void 855ural_txeof(struct usbd_xfer *xfer, void * priv, 856 usbd_status status) 857{ 858 struct ural_tx_data *data = priv; 859 struct ural_softc *sc = data->sc; 860 struct ifnet *ifp = &sc->sc_if; 861 int s; 862 863 if (status != USBD_NORMAL_COMPLETION) { 864 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 865 return; 866 867 printf("%s: could not transmit buffer: %s\n", 868 device_xname(sc->sc_dev), usbd_errstr(status)); 869 870 if (status == USBD_STALLED) 871 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 872 873 if_statinc(ifp, if_oerrors); 874 return; 875 } 876 877 s = splnet(); 878 879 m_freem(data->m); 880 data->m = NULL; 881 ieee80211_free_node(data->ni); 882 data->ni = NULL; 883 884 sc->tx_queued--; 885 if_statinc(ifp, if_opackets); 886 887 DPRINTFN(10, ("tx done\n")); 888 889 sc->sc_tx_timer = 0; 890 ifp->if_flags &= ~IFF_OACTIVE; 891 ural_start(ifp); 892 893 splx(s); 894} 895 896Static void 897ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status) 898{ 899 struct ural_rx_data *data = priv; 900 struct ural_softc *sc = data->sc; 901 struct ieee80211com *ic = &sc->sc_ic; 902 struct ifnet *ifp = &sc->sc_if; 903 struct ural_rx_desc *desc; 904 struct ieee80211_frame *wh; 905 struct ieee80211_node *ni; 906 struct mbuf *mnew, *m; 907 int s, len; 908 909 if (status != USBD_NORMAL_COMPLETION) { 910 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 911 return; 912 913 if (status == USBD_STALLED) 914 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 915 goto skip; 916 } 917 918 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 919 920 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 921 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 922 len)); 923 if_statinc(ifp, if_ierrors); 924 goto skip; 925 } 926 927 /* rx descriptor is located at the end */ 928 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 929 930 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 931 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 932 /* 933 * This should not happen since we did not request to receive 934 * those frames when we filled RAL_TXRX_CSR2. 935 */ 936 DPRINTFN(5, ("PHY or CRC error\n")); 937 if_statinc(ifp, if_ierrors); 938 goto skip; 939 } 940 941 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 942 if (mnew == NULL) { 943 if_statinc(ifp, if_ierrors); 944 goto skip; 945 } 946 947 MCLGET(mnew, M_DONTWAIT); 948 if (!(mnew->m_flags & M_EXT)) { 949 if_statinc(ifp, if_ierrors); 950 m_freem(mnew); 951 goto skip; 952 } 953 954 m = data->m; 955 data->m = mnew; 956 data->buf = mtod(data->m, uint8_t *); 957 958 /* finalize mbuf */ 959 m_set_rcvif(m, ifp); 960 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 961 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 962 963 s = splnet(); 964 965 if (sc->sc_drvbpf != NULL) { 966 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 967 968 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 969 tap->wr_rate = ural_rxrate(desc); 970 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 971 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 972 tap->wr_antenna = sc->rx_ant; 973 tap->wr_antsignal = desc->rssi; 974 975 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m, BPF_D_IN); 976 } 977 978 wh = mtod(m, struct ieee80211_frame *); 979 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 980 981 /* send the frame to the 802.11 layer */ 982 ieee80211_input(ic, m, ni, desc->rssi, 0); 983 984 /* node is no longer needed */ 985 ieee80211_free_node(ni); 986 987 splx(s); 988 989 DPRINTFN(15, ("rx done\n")); 990 991skip: /* setup a new transfer */ 992 usbd_setup_xfer(xfer, data, data->buf, MCLBYTES, 993 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 994 usbd_transfer(xfer); 995} 996 997/* 998 * Return the expected ack rate for a frame transmitted at rate `rate'. 999 * XXX: this should depend on the destination node basic rate set. 1000 */ 1001Static int 1002ural_ack_rate(struct ieee80211com *ic, int rate) 1003{ 1004 switch (rate) { 1005 /* CCK rates */ 1006 case 2: 1007 return 2; 1008 case 4: 1009 case 11: 1010 case 22: 1011 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1012 1013 /* OFDM rates */ 1014 case 12: 1015 case 18: 1016 return 12; 1017 case 24: 1018 case 36: 1019 return 24; 1020 case 48: 1021 case 72: 1022 case 96: 1023 case 108: 1024 return 48; 1025 } 1026 1027 /* default to 1Mbps */ 1028 return 2; 1029} 1030 1031/* 1032 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1033 * The function automatically determines the operating mode depending on the 1034 * given rate. `flags' indicates whether short preamble is in use or not. 1035 */ 1036Static uint16_t 1037ural_txtime(int len, int rate, uint32_t flags) 1038{ 1039 uint16_t txtime; 1040 1041 if (RAL_RATE_IS_OFDM(rate)) { 1042 /* IEEE Std 802.11g-2003, pp. 37 */ 1043 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1044 txtime = 16 + 4 + 4 * txtime + 6; 1045 } else { 1046 /* IEEE Std 802.11b-1999, pp. 28 */ 1047 txtime = (16 * len + rate - 1) / rate; 1048 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1049 txtime += 72 + 24; 1050 else 1051 txtime += 144 + 48; 1052 } 1053 return txtime; 1054} 1055 1056Static uint8_t 1057ural_plcp_signal(int rate) 1058{ 1059 switch (rate) { 1060 /* CCK rates (returned values are device-dependent) */ 1061 case 2: return 0x0; 1062 case 4: return 0x1; 1063 case 11: return 0x2; 1064 case 22: return 0x3; 1065 1066 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1067 case 12: return 0xb; 1068 case 18: return 0xf; 1069 case 24: return 0xa; 1070 case 36: return 0xe; 1071 case 48: return 0x9; 1072 case 72: return 0xd; 1073 case 96: return 0x8; 1074 case 108: return 0xc; 1075 1076 /* unsupported rates (should not get there) */ 1077 default: return 0xff; 1078 } 1079} 1080 1081Static void 1082ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1083 uint32_t flags, int len, int rate) 1084{ 1085 struct ieee80211com *ic = &sc->sc_ic; 1086 uint16_t plcp_length; 1087 int remainder; 1088 1089 desc->flags = htole32(flags); 1090 desc->flags |= htole32(RAL_TX_NEWSEQ); 1091 desc->flags |= htole32(len << 16); 1092 1093 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1094 desc->wme |= htole16(RAL_IVOFFSET(sizeof(struct ieee80211_frame))); 1095 1096 /* setup PLCP fields */ 1097 desc->plcp_signal = ural_plcp_signal(rate); 1098 desc->plcp_service = 4; 1099 1100 len += IEEE80211_CRC_LEN; 1101 if (RAL_RATE_IS_OFDM(rate)) { 1102 desc->flags |= htole32(RAL_TX_OFDM); 1103 1104 plcp_length = len & 0xfff; 1105 desc->plcp_length_hi = plcp_length >> 6; 1106 desc->plcp_length_lo = plcp_length & 0x3f; 1107 } else { 1108 plcp_length = (16 * len + rate - 1) / rate; 1109 if (rate == 22) { 1110 remainder = (16 * len) % 22; 1111 if (remainder != 0 && remainder < 7) 1112 desc->plcp_service |= RAL_PLCP_LENGEXT; 1113 } 1114 desc->plcp_length_hi = plcp_length >> 8; 1115 desc->plcp_length_lo = plcp_length & 0xff; 1116 1117 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1118 desc->plcp_signal |= 0x08; 1119 } 1120 1121 desc->iv = 0; 1122 desc->eiv = 0; 1123} 1124 1125#define RAL_TX_TIMEOUT 5000 1126 1127Static int 1128ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1129{ 1130 struct ural_tx_desc *desc; 1131 struct usbd_xfer *xfer; 1132 uint8_t cmd = 0; 1133 usbd_status error; 1134 uint8_t *buf; 1135 int xferlen, rate; 1136 1137 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1138 1139 /* xfer length needs to be a multiple of two! */ 1140 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1141 1142 error = usbd_create_xfer(sc->sc_tx_pipeh, xferlen, 1143 USBD_FORCE_SHORT_XFER, 0, &xfer); 1144 if (error) 1145 return error; 1146 1147 buf = usbd_get_buffer(xfer); 1148 1149 usbd_setup_xfer(xfer, NULL, &cmd, sizeof(cmd), USBD_FORCE_SHORT_XFER, 1150 RAL_TX_TIMEOUT, NULL); 1151 1152 error = usbd_sync_transfer(xfer); 1153 if (error != 0) { 1154 usbd_destroy_xfer(xfer); 1155 return error; 1156 } 1157 1158 desc = (struct ural_tx_desc *)buf; 1159 1160 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1161 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1162 m0->m_pkthdr.len, rate); 1163 1164 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1165 m0->m_pkthdr.len, rate, xferlen)); 1166 1167 usbd_setup_xfer(xfer, NULL, buf, xferlen, USBD_FORCE_SHORT_XFER, 1168 RAL_TX_TIMEOUT, NULL); 1169 1170 error = usbd_sync_transfer(xfer); 1171 usbd_destroy_xfer(xfer); 1172 1173 return error; 1174} 1175 1176Static int 1177ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1178{ 1179 struct ieee80211com *ic = &sc->sc_ic; 1180 struct ural_tx_desc *desc; 1181 struct ural_tx_data *data; 1182 struct ieee80211_frame *wh; 1183 struct ieee80211_key *k; 1184 uint32_t flags = 0; 1185 uint16_t dur; 1186 usbd_status error; 1187 int xferlen, rate; 1188 1189 data = &sc->tx_data[0]; 1190 desc = (struct ural_tx_desc *)data->buf; 1191 1192 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1193 1194 wh = mtod(m0, struct ieee80211_frame *); 1195 1196 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1197 k = ieee80211_crypto_encap(ic, ni, m0); 1198 if (k == NULL) { 1199 m_freem(m0); 1200 return ENOBUFS; 1201 } 1202 } 1203 1204 data->m = m0; 1205 data->ni = ni; 1206 1207 wh = mtod(m0, struct ieee80211_frame *); 1208 1209 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1210 flags |= RAL_TX_ACK; 1211 1212 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1213 *(uint16_t *)wh->i_dur = htole16(dur); 1214 1215 /* tell hardware to add timestamp for probe responses */ 1216 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1217 IEEE80211_FC0_TYPE_MGT && 1218 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1219 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1220 flags |= RAL_TX_TIMESTAMP; 1221 } 1222 1223 if (sc->sc_drvbpf != NULL) { 1224 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1225 1226 tap->wt_flags = 0; 1227 tap->wt_rate = rate; 1228 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1229 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1230 tap->wt_antenna = sc->tx_ant; 1231 1232 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1233 } 1234 1235 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1236 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1237 1238 /* align end on a 2-bytes boundary */ 1239 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1240 1241 /* 1242 * No space left in the last URB to store the extra 2 bytes, force 1243 * sending of another URB. 1244 */ 1245 if ((xferlen % 64) == 0) 1246 xferlen += 2; 1247 1248 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1249 m0->m_pkthdr.len, rate, xferlen)); 1250 1251 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1252 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1253 1254 error = usbd_transfer(data->xfer); 1255 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1256 m_freem(m0); 1257 return error; 1258 } 1259 1260 sc->tx_queued++; 1261 1262 return 0; 1263} 1264 1265Static int 1266ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1267{ 1268 struct ieee80211com *ic = &sc->sc_ic; 1269 struct ural_tx_desc *desc; 1270 struct ural_tx_data *data; 1271 struct ieee80211_frame *wh; 1272 struct ieee80211_key *k; 1273 uint32_t flags = 0; 1274 uint16_t dur; 1275 usbd_status error; 1276 int xferlen, rate; 1277 1278 wh = mtod(m0, struct ieee80211_frame *); 1279 1280 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1281 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1282 else 1283 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1284 1285 rate &= IEEE80211_RATE_VAL; 1286 1287 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1288 k = ieee80211_crypto_encap(ic, ni, m0); 1289 if (k == NULL) { 1290 m_freem(m0); 1291 return ENOBUFS; 1292 } 1293 1294 /* packet header may have moved, reset our local pointer */ 1295 wh = mtod(m0, struct ieee80211_frame *); 1296 } 1297 1298 data = &sc->tx_data[0]; 1299 desc = (struct ural_tx_desc *)data->buf; 1300 1301 data->m = m0; 1302 data->ni = ni; 1303 1304 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1305 flags |= RAL_TX_ACK; 1306 flags |= RAL_TX_RETRY(7); 1307 1308 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1309 ic->ic_flags) + RAL_SIFS; 1310 *(uint16_t *)wh->i_dur = htole16(dur); 1311 } 1312 1313 if (sc->sc_drvbpf != NULL) { 1314 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1315 1316 tap->wt_flags = 0; 1317 tap->wt_rate = rate; 1318 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1319 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1320 tap->wt_antenna = sc->tx_ant; 1321 1322 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1323 } 1324 1325 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1326 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1327 1328 /* align end on a 2-bytes boundary */ 1329 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1330 1331 /* 1332 * No space left in the last URB to store the extra 2 bytes, force 1333 * sending of another URB. 1334 */ 1335 if ((xferlen % 64) == 0) 1336 xferlen += 2; 1337 1338 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1339 m0->m_pkthdr.len, rate, xferlen)); 1340 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1341 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1342 1343 error = usbd_transfer(data->xfer); 1344 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1345 return error; 1346 1347 sc->tx_queued++; 1348 1349 return 0; 1350} 1351 1352Static void 1353ural_start(struct ifnet *ifp) 1354{ 1355 struct ural_softc *sc = ifp->if_softc; 1356 struct ieee80211com *ic = &sc->sc_ic; 1357 struct mbuf *m0; 1358 struct ether_header *eh; 1359 struct ieee80211_node *ni; 1360 1361 for (;;) { 1362 IF_POLL(&ic->ic_mgtq, m0); 1363 if (m0 != NULL) { 1364 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1365 ifp->if_flags |= IFF_OACTIVE; 1366 break; 1367 } 1368 IF_DEQUEUE(&ic->ic_mgtq, m0); 1369 1370 ni = M_GETCTX(m0, struct ieee80211_node *); 1371 M_CLEARCTX(m0); 1372 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1373 if (ural_tx_mgt(sc, m0, ni) != 0) 1374 break; 1375 1376 } else { 1377 if (ic->ic_state != IEEE80211_S_RUN) 1378 break; 1379 IFQ_POLL(&ifp->if_snd, m0); 1380 if (m0 == NULL) 1381 break; 1382 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1383 ifp->if_flags |= IFF_OACTIVE; 1384 break; 1385 } 1386 IFQ_DEQUEUE(&ifp->if_snd, m0); 1387 1388 if (m0->m_len < sizeof(struct ether_header) && 1389 !(m0 = m_pullup(m0, sizeof(struct ether_header)))) 1390 continue; 1391 1392 eh = mtod(m0, struct ether_header *); 1393 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1394 if (ni == NULL) { 1395 m_freem(m0); 1396 continue; 1397 } 1398 bpf_mtap(ifp, m0, BPF_D_OUT); 1399 m0 = ieee80211_encap(ic, m0, ni); 1400 if (m0 == NULL) { 1401 ieee80211_free_node(ni); 1402 continue; 1403 } 1404 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1405 if (ural_tx_data(sc, m0, ni) != 0) { 1406 ieee80211_free_node(ni); 1407 if_statinc(ifp, if_oerrors); 1408 break; 1409 } 1410 } 1411 1412 sc->sc_tx_timer = 5; 1413 ifp->if_timer = 1; 1414 } 1415} 1416 1417Static void 1418ural_watchdog(struct ifnet *ifp) 1419{ 1420 struct ural_softc *sc = ifp->if_softc; 1421 struct ieee80211com *ic = &sc->sc_ic; 1422 1423 ifp->if_timer = 0; 1424 1425 if (sc->sc_tx_timer > 0) { 1426 if (--sc->sc_tx_timer == 0) { 1427 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1428 /*ural_init(sc); XXX needs a process context! */ 1429 if_statinc(ifp, if_oerrors); 1430 return; 1431 } 1432 ifp->if_timer = 1; 1433 } 1434 1435 ieee80211_watchdog(ic); 1436} 1437 1438/* 1439 * This function allows for fast channel switching in monitor mode (used by 1440 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1441 * generate a new beacon frame. 1442 */ 1443Static int 1444ural_reset(struct ifnet *ifp) 1445{ 1446 struct ural_softc *sc = ifp->if_softc; 1447 struct ieee80211com *ic = &sc->sc_ic; 1448 1449 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1450 return ENETRESET; 1451 1452 ural_set_chan(sc, ic->ic_curchan); 1453 1454 return 0; 1455} 1456 1457Static int 1458ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1459{ 1460#define IS_RUNNING(ifp) \ 1461 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1462 1463 struct ural_softc *sc = ifp->if_softc; 1464 struct ieee80211com *ic = &sc->sc_ic; 1465 int s, error = 0; 1466 1467 s = splnet(); 1468 1469 switch (cmd) { 1470 case SIOCSIFFLAGS: 1471 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1472 break; 1473 /* XXX re-use ether_ioctl() */ 1474 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1475 case IFF_UP|IFF_RUNNING: 1476 ural_update_promisc(sc); 1477 break; 1478 case IFF_UP: 1479 ural_init(ifp); 1480 break; 1481 case IFF_RUNNING: 1482 ural_stop(ifp, 1); 1483 break; 1484 case 0: 1485 break; 1486 } 1487 break; 1488 1489 case SIOCADDMULTI: 1490 case SIOCDELMULTI: 1491 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1492 error = 0; 1493 } 1494 break; 1495 1496 default: 1497 error = ieee80211_ioctl(ic, cmd, data); 1498 } 1499 1500 if (error == ENETRESET) { 1501 if (IS_RUNNING(ifp) && 1502 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1503 ural_init(ifp); 1504 error = 0; 1505 } 1506 1507 splx(s); 1508 1509 return error; 1510#undef IS_RUNNING 1511} 1512 1513Static void 1514ural_set_testmode(struct ural_softc *sc) 1515{ 1516 usb_device_request_t req; 1517 usbd_status error; 1518 1519 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1520 req.bRequest = RAL_VENDOR_REQUEST; 1521 USETW(req.wValue, 4); 1522 USETW(req.wIndex, 1); 1523 USETW(req.wLength, 0); 1524 1525 error = usbd_do_request(sc->sc_udev, &req, NULL); 1526 if (error != 0) { 1527 printf("%s: could not set test mode: %s\n", 1528 device_xname(sc->sc_dev), usbd_errstr(error)); 1529 } 1530} 1531 1532Static void 1533ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1534{ 1535 usb_device_request_t req; 1536 usbd_status error; 1537 1538 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1539 req.bRequest = RAL_READ_EEPROM; 1540 USETW(req.wValue, 0); 1541 USETW(req.wIndex, addr); 1542 USETW(req.wLength, len); 1543 1544 error = usbd_do_request(sc->sc_udev, &req, buf); 1545 if (error != 0) { 1546 printf("%s: could not read EEPROM: %s\n", 1547 device_xname(sc->sc_dev), usbd_errstr(error)); 1548 } 1549} 1550 1551Static uint16_t 1552ural_read(struct ural_softc *sc, uint16_t reg) 1553{ 1554 usb_device_request_t req; 1555 usbd_status error; 1556 uint16_t val; 1557 1558 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1559 req.bRequest = RAL_READ_MAC; 1560 USETW(req.wValue, 0); 1561 USETW(req.wIndex, reg); 1562 USETW(req.wLength, sizeof(uint16_t)); 1563 1564 error = usbd_do_request(sc->sc_udev, &req, &val); 1565 if (error != 0) { 1566 printf("%s: could not read MAC register: %s\n", 1567 device_xname(sc->sc_dev), usbd_errstr(error)); 1568 return 0; 1569 } 1570 1571 return le16toh(val); 1572} 1573 1574Static void 1575ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1576{ 1577 usb_device_request_t req; 1578 usbd_status error; 1579 1580 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1581 req.bRequest = RAL_READ_MULTI_MAC; 1582 USETW(req.wValue, 0); 1583 USETW(req.wIndex, reg); 1584 USETW(req.wLength, len); 1585 1586 error = usbd_do_request(sc->sc_udev, &req, buf); 1587 if (error != 0) { 1588 printf("%s: could not read MAC register: %s\n", 1589 device_xname(sc->sc_dev), usbd_errstr(error)); 1590 } 1591} 1592 1593Static void 1594ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1595{ 1596 usb_device_request_t req; 1597 usbd_status error; 1598 1599 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1600 req.bRequest = RAL_WRITE_MAC; 1601 USETW(req.wValue, val); 1602 USETW(req.wIndex, reg); 1603 USETW(req.wLength, 0); 1604 1605 error = usbd_do_request(sc->sc_udev, &req, NULL); 1606 if (error != 0) { 1607 printf("%s: could not write MAC register: %s\n", 1608 device_xname(sc->sc_dev), usbd_errstr(error)); 1609 } 1610} 1611 1612Static void 1613ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1614{ 1615 usb_device_request_t req; 1616 usbd_status error; 1617 1618 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1619 req.bRequest = RAL_WRITE_MULTI_MAC; 1620 USETW(req.wValue, 0); 1621 USETW(req.wIndex, reg); 1622 USETW(req.wLength, len); 1623 1624 error = usbd_do_request(sc->sc_udev, &req, buf); 1625 if (error != 0) { 1626 printf("%s: could not write MAC register: %s\n", 1627 device_xname(sc->sc_dev), usbd_errstr(error)); 1628 } 1629} 1630 1631Static void 1632ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1633{ 1634 uint16_t tmp; 1635 int ntries; 1636 1637 for (ntries = 0; ntries < 5; ntries++) { 1638 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1639 break; 1640 } 1641 if (ntries == 5) { 1642 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1643 return; 1644 } 1645 1646 tmp = reg << 8 | val; 1647 ural_write(sc, RAL_PHY_CSR7, tmp); 1648} 1649 1650Static uint8_t 1651ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1652{ 1653 uint16_t val; 1654 int ntries; 1655 1656 val = RAL_BBP_WRITE | reg << 8; 1657 ural_write(sc, RAL_PHY_CSR7, val); 1658 1659 for (ntries = 0; ntries < 5; ntries++) { 1660 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1661 break; 1662 } 1663 if (ntries == 5) { 1664 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1665 return 0; 1666 } 1667 1668 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1669} 1670 1671Static void 1672ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1673{ 1674 uint32_t tmp; 1675 int ntries; 1676 1677 for (ntries = 0; ntries < 5; ntries++) { 1678 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1679 break; 1680 } 1681 if (ntries == 5) { 1682 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1683 return; 1684 } 1685 1686 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1687 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1688 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1689 1690 /* remember last written value in sc */ 1691 sc->rf_regs[reg] = val; 1692 1693 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1694} 1695 1696Static void 1697ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1698{ 1699 struct ieee80211com *ic = &sc->sc_ic; 1700 uint8_t power, tmp; 1701 u_int i, chan; 1702 1703 chan = ieee80211_chan2ieee(ic, c); 1704 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1705 return; 1706 1707 if (IEEE80211_IS_CHAN_2GHZ(c)) 1708 power = uimin(sc->txpow[chan - 1], 31); 1709 else 1710 power = 31; 1711 1712 /* adjust txpower using ifconfig settings */ 1713 power -= (100 - ic->ic_txpowlimit) / 8; 1714 1715 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1716 1717 switch (sc->rf_rev) { 1718 case RAL_RF_2522: 1719 ural_rf_write(sc, RAL_RF1, 0x00814); 1720 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1721 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1722 break; 1723 1724 case RAL_RF_2523: 1725 ural_rf_write(sc, RAL_RF1, 0x08804); 1726 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1727 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1728 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1729 break; 1730 1731 case RAL_RF_2524: 1732 ural_rf_write(sc, RAL_RF1, 0x0c808); 1733 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1734 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1735 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1736 break; 1737 1738 case RAL_RF_2525: 1739 ural_rf_write(sc, RAL_RF1, 0x08808); 1740 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1741 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1742 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1743 1744 ural_rf_write(sc, RAL_RF1, 0x08808); 1745 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1746 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1747 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1748 break; 1749 1750 case RAL_RF_2525E: 1751 ural_rf_write(sc, RAL_RF1, 0x08808); 1752 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1753 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1754 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1755 break; 1756 1757 case RAL_RF_2526: 1758 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1759 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1760 ural_rf_write(sc, RAL_RF1, 0x08804); 1761 1762 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1763 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1764 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1765 break; 1766 1767 /* dual-band RF */ 1768 case RAL_RF_5222: 1769 for (i = 0; ural_rf5222[i].chan != chan; i++); 1770 1771 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1772 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1773 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1774 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1775 break; 1776 } 1777 1778 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1779 ic->ic_state != IEEE80211_S_SCAN) { 1780 /* set Japan filter bit for channel 14 */ 1781 tmp = ural_bbp_read(sc, 70); 1782 1783 tmp &= ~RAL_JAPAN_FILTER; 1784 if (chan == 14) 1785 tmp |= RAL_JAPAN_FILTER; 1786 1787 ural_bbp_write(sc, 70, tmp); 1788 1789 /* clear CRC errors */ 1790 ural_read(sc, RAL_STA_CSR0); 1791 1792 DELAY(10000); 1793 ural_disable_rf_tune(sc); 1794 } 1795} 1796 1797/* 1798 * Disable RF auto-tuning. 1799 */ 1800Static void 1801ural_disable_rf_tune(struct ural_softc *sc) 1802{ 1803 uint32_t tmp; 1804 1805 if (sc->rf_rev != RAL_RF_2523) { 1806 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1807 ural_rf_write(sc, RAL_RF1, tmp); 1808 } 1809 1810 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1811 ural_rf_write(sc, RAL_RF3, tmp); 1812 1813 DPRINTFN(2, ("disabling RF autotune\n")); 1814} 1815 1816/* 1817 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1818 * synchronization. 1819 */ 1820Static void 1821ural_enable_tsf_sync(struct ural_softc *sc) 1822{ 1823 struct ieee80211com *ic = &sc->sc_ic; 1824 uint16_t logcwmin, preload, tmp; 1825 1826 /* first, disable TSF synchronization */ 1827 ural_write(sc, RAL_TXRX_CSR19, 0); 1828 1829 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1830 ural_write(sc, RAL_TXRX_CSR18, tmp); 1831 1832 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1833 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1834 tmp = logcwmin << 12 | preload; 1835 ural_write(sc, RAL_TXRX_CSR20, tmp); 1836 1837 /* finally, enable TSF synchronization */ 1838 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1839 if (ic->ic_opmode == IEEE80211_M_STA) 1840 tmp |= RAL_ENABLE_TSF_SYNC(1); 1841 else 1842 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1843 ural_write(sc, RAL_TXRX_CSR19, tmp); 1844 1845 DPRINTF(("enabling TSF synchronization\n")); 1846} 1847 1848Static void 1849ural_update_slot(struct ifnet *ifp) 1850{ 1851 struct ural_softc *sc = ifp->if_softc; 1852 struct ieee80211com *ic = &sc->sc_ic; 1853 uint16_t slottime, sifs, eifs; 1854 1855 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1856 1857 /* 1858 * These settings may sound a bit inconsistent but this is what the 1859 * reference driver does. 1860 */ 1861 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1862 sifs = 16 - RAL_RXTX_TURNAROUND; 1863 eifs = 364; 1864 } else { 1865 sifs = 10 - RAL_RXTX_TURNAROUND; 1866 eifs = 64; 1867 } 1868 1869 ural_write(sc, RAL_MAC_CSR10, slottime); 1870 ural_write(sc, RAL_MAC_CSR11, sifs); 1871 ural_write(sc, RAL_MAC_CSR12, eifs); 1872} 1873 1874Static void 1875ural_set_txpreamble(struct ural_softc *sc) 1876{ 1877 uint16_t tmp; 1878 1879 tmp = ural_read(sc, RAL_TXRX_CSR10); 1880 1881 tmp &= ~RAL_SHORT_PREAMBLE; 1882 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1883 tmp |= RAL_SHORT_PREAMBLE; 1884 1885 ural_write(sc, RAL_TXRX_CSR10, tmp); 1886} 1887 1888Static void 1889ural_set_basicrates(struct ural_softc *sc) 1890{ 1891 struct ieee80211com *ic = &sc->sc_ic; 1892 1893 /* update basic rate set */ 1894 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1895 /* 11b basic rates: 1, 2Mbps */ 1896 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1897 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1898 /* 11a basic rates: 6, 12, 24Mbps */ 1899 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1900 } else { 1901 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1902 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1903 } 1904} 1905 1906Static void 1907ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1908{ 1909 uint16_t tmp; 1910 1911 tmp = bssid[0] | bssid[1] << 8; 1912 ural_write(sc, RAL_MAC_CSR5, tmp); 1913 1914 tmp = bssid[2] | bssid[3] << 8; 1915 ural_write(sc, RAL_MAC_CSR6, tmp); 1916 1917 tmp = bssid[4] | bssid[5] << 8; 1918 ural_write(sc, RAL_MAC_CSR7, tmp); 1919 1920 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1921} 1922 1923Static void 1924ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1925{ 1926 uint16_t tmp; 1927 1928 tmp = addr[0] | addr[1] << 8; 1929 ural_write(sc, RAL_MAC_CSR2, tmp); 1930 1931 tmp = addr[2] | addr[3] << 8; 1932 ural_write(sc, RAL_MAC_CSR3, tmp); 1933 1934 tmp = addr[4] | addr[5] << 8; 1935 ural_write(sc, RAL_MAC_CSR4, tmp); 1936 1937 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1938} 1939 1940Static void 1941ural_update_promisc(struct ural_softc *sc) 1942{ 1943 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1944 uint32_t tmp; 1945 1946 tmp = ural_read(sc, RAL_TXRX_CSR2); 1947 1948 tmp &= ~RAL_DROP_NOT_TO_ME; 1949 if (!(ifp->if_flags & IFF_PROMISC)) 1950 tmp |= RAL_DROP_NOT_TO_ME; 1951 1952 ural_write(sc, RAL_TXRX_CSR2, tmp); 1953 1954 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1955 "entering" : "leaving")); 1956} 1957 1958Static const char * 1959ural_get_rf(int rev) 1960{ 1961 switch (rev) { 1962 case RAL_RF_2522: return "RT2522"; 1963 case RAL_RF_2523: return "RT2523"; 1964 case RAL_RF_2524: return "RT2524"; 1965 case RAL_RF_2525: return "RT2525"; 1966 case RAL_RF_2525E: return "RT2525e"; 1967 case RAL_RF_2526: return "RT2526"; 1968 case RAL_RF_5222: return "RT5222"; 1969 default: return "unknown"; 1970 } 1971} 1972 1973Static void 1974ural_read_eeprom(struct ural_softc *sc) 1975{ 1976 struct ieee80211com *ic = &sc->sc_ic; 1977 uint16_t val; 1978 1979 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1980 val = le16toh(val); 1981 sc->rf_rev = (val >> 11) & 0x7; 1982 sc->hw_radio = (val >> 10) & 0x1; 1983 sc->led_mode = (val >> 6) & 0x7; 1984 sc->rx_ant = (val >> 4) & 0x3; 1985 sc->tx_ant = (val >> 2) & 0x3; 1986 sc->nb_ant = val & 0x3; 1987 1988 /* read MAC address */ 1989 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1990 1991 /* read default values for BBP registers */ 1992 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1993 1994 /* read Tx power for all b/g channels */ 1995 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1996} 1997 1998Static int 1999ural_bbp_init(struct ural_softc *sc) 2000{ 2001 int i, ntries; 2002 2003 /* wait for BBP to be ready */ 2004 for (ntries = 0; ntries < 100; ntries++) { 2005 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2006 break; 2007 DELAY(1000); 2008 } 2009 if (ntries == 100) { 2010 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2011 return EIO; 2012 } 2013 2014 /* initialize BBP registers to default values */ 2015 for (i = 0; i < __arraycount(ural_def_bbp); i++) 2016 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2017 2018#if 0 2019 /* initialize BBP registers to values stored in EEPROM */ 2020 for (i = 0; i < 16; i++) { 2021 if (sc->bbp_prom[i].reg == 0xff) 2022 continue; 2023 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2024 } 2025#endif 2026 2027 return 0; 2028} 2029 2030Static void 2031ural_set_txantenna(struct ural_softc *sc, int antenna) 2032{ 2033 uint16_t tmp; 2034 uint8_t tx; 2035 2036 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2037 if (antenna == 1) 2038 tx |= RAL_BBP_ANTA; 2039 else if (antenna == 2) 2040 tx |= RAL_BBP_ANTB; 2041 else 2042 tx |= RAL_BBP_DIVERSITY; 2043 2044 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2045 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2046 sc->rf_rev == RAL_RF_5222) 2047 tx |= RAL_BBP_FLIPIQ; 2048 2049 ural_bbp_write(sc, RAL_BBP_TX, tx); 2050 2051 /* update values in PHY_CSR5 and PHY_CSR6 */ 2052 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2053 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2054 2055 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2056 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2057} 2058 2059Static void 2060ural_set_rxantenna(struct ural_softc *sc, int antenna) 2061{ 2062 uint8_t rx; 2063 2064 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2065 if (antenna == 1) 2066 rx |= RAL_BBP_ANTA; 2067 else if (antenna == 2) 2068 rx |= RAL_BBP_ANTB; 2069 else 2070 rx |= RAL_BBP_DIVERSITY; 2071 2072 /* need to force no I/Q flip for RF 2525e and 2526 */ 2073 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2074 rx &= ~RAL_BBP_FLIPIQ; 2075 2076 ural_bbp_write(sc, RAL_BBP_RX, rx); 2077} 2078 2079Static int 2080ural_init(struct ifnet *ifp) 2081{ 2082 struct ural_softc *sc = ifp->if_softc; 2083 struct ieee80211com *ic = &sc->sc_ic; 2084 struct ieee80211_key *wk; 2085 uint16_t tmp; 2086 usbd_status error; 2087 int i, ntries; 2088 2089 ural_set_testmode(sc); 2090 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2091 2092 ural_stop(ifp, 0); 2093 2094 /* initialize MAC registers to default values */ 2095 for (i = 0; i < __arraycount(ural_def_mac); i++) 2096 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2097 2098 /* wait for BBP and RF to wake up (this can take a long time!) */ 2099 for (ntries = 0; ntries < 100; ntries++) { 2100 tmp = ural_read(sc, RAL_MAC_CSR17); 2101 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2102 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2103 break; 2104 DELAY(1000); 2105 } 2106 if (ntries == 100) { 2107 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2108 device_xname(sc->sc_dev)); 2109 error = EIO; 2110 goto fail; 2111 } 2112 2113 /* we're ready! */ 2114 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2115 2116 /* set basic rate set (will be updated later) */ 2117 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2118 2119 error = ural_bbp_init(sc); 2120 if (error != 0) 2121 goto fail; 2122 2123 /* set default BSS channel */ 2124 ural_set_chan(sc, ic->ic_curchan); 2125 2126 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2127 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2128 2129 ural_set_txantenna(sc, sc->tx_ant); 2130 ural_set_rxantenna(sc, sc->rx_ant); 2131 2132 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2133 ural_set_macaddr(sc, ic->ic_myaddr); 2134 2135 /* 2136 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2137 */ 2138 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2139 wk = &ic->ic_crypto.cs_nw_keys[i]; 2140 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2141 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2142 } 2143 2144 /* 2145 * Allocate xfer for AMRR statistics requests. 2146 */ 2147 struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev); 2148 error = usbd_create_xfer(pipe0, sizeof(sc->sta), 0, 0, &sc->amrr_xfer); 2149 if (error) { 2150 printf("%s: could not allocate AMRR xfer\n", 2151 device_xname(sc->sc_dev)); 2152 goto fail; 2153 } 2154 2155 /* 2156 * Open Tx and Rx USB bulk pipes. 2157 */ 2158 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2159 &sc->sc_tx_pipeh); 2160 if (error != 0) { 2161 printf("%s: could not open Tx pipe: %s\n", 2162 device_xname(sc->sc_dev), usbd_errstr(error)); 2163 goto fail; 2164 } 2165 2166 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2167 &sc->sc_rx_pipeh); 2168 if (error != 0) { 2169 printf("%s: could not open Rx pipe: %s\n", 2170 device_xname(sc->sc_dev), usbd_errstr(error)); 2171 goto fail; 2172 } 2173 2174 /* 2175 * Allocate Tx and Rx xfer queues. 2176 */ 2177 error = ural_alloc_tx_list(sc); 2178 if (error != 0) { 2179 printf("%s: could not allocate Tx list\n", 2180 device_xname(sc->sc_dev)); 2181 goto fail; 2182 } 2183 2184 error = ural_alloc_rx_list(sc); 2185 if (error != 0) { 2186 printf("%s: could not allocate Rx list\n", 2187 device_xname(sc->sc_dev)); 2188 goto fail; 2189 } 2190 2191 /* 2192 * Start up the receive pipe. 2193 */ 2194 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2195 struct ural_rx_data *data = &sc->rx_data[i]; 2196 2197 usbd_setup_xfer(data->xfer, data, data->buf, MCLBYTES, 2198 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2199 usbd_transfer(data->xfer); 2200 } 2201 2202 /* kick Rx */ 2203 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2204 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2205 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2206 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2207 tmp |= RAL_DROP_TODS; 2208 if (!(ifp->if_flags & IFF_PROMISC)) 2209 tmp |= RAL_DROP_NOT_TO_ME; 2210 } 2211 ural_write(sc, RAL_TXRX_CSR2, tmp); 2212 2213 ifp->if_flags &= ~IFF_OACTIVE; 2214 ifp->if_flags |= IFF_RUNNING; 2215 2216 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2217 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2218 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2219 } else 2220 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2221 2222 return 0; 2223 2224fail: ural_stop(ifp, 1); 2225 return error; 2226} 2227 2228Static void 2229ural_stop(struct ifnet *ifp, int disable) 2230{ 2231 struct ural_softc *sc = ifp->if_softc; 2232 struct ieee80211com *ic = &sc->sc_ic; 2233 2234 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2235 2236 sc->sc_tx_timer = 0; 2237 ifp->if_timer = 0; 2238 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2239 2240 /* disable Rx */ 2241 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2242 2243 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2244 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2245 ural_write(sc, RAL_MAC_CSR1, 0); 2246 2247 if (sc->amrr_xfer != NULL) { 2248 usbd_destroy_xfer(sc->amrr_xfer); 2249 sc->amrr_xfer = NULL; 2250 } 2251 2252 if (sc->sc_rx_pipeh != NULL) { 2253 usbd_abort_pipe(sc->sc_rx_pipeh); 2254 } 2255 2256 if (sc->sc_tx_pipeh != NULL) { 2257 usbd_abort_pipe(sc->sc_tx_pipeh); 2258 } 2259 2260 ural_free_rx_list(sc); 2261 ural_free_tx_list(sc); 2262 2263 if (sc->sc_rx_pipeh != NULL) { 2264 usbd_close_pipe(sc->sc_rx_pipeh); 2265 sc->sc_rx_pipeh = NULL; 2266 } 2267 2268 if (sc->sc_tx_pipeh != NULL) { 2269 usbd_close_pipe(sc->sc_tx_pipeh); 2270 sc->sc_tx_pipeh = NULL; 2271 } 2272} 2273 2274static int 2275ural_activate(device_t self, enum devact act) 2276{ 2277 struct ural_softc *sc = device_private(self); 2278 2279 switch (act) { 2280 case DVACT_DEACTIVATE: 2281 if_deactivate(&sc->sc_if); 2282 return 0; 2283 default: 2284 return EOPNOTSUPP; 2285 } 2286} 2287 2288Static void 2289ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2290{ 2291 int i; 2292 2293 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2294 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2295 2296 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2297 2298 /* set rate to some reasonable initial value */ 2299 for (i = ni->ni_rates.rs_nrates - 1; 2300 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2301 i--); 2302 ni->ni_txrate = i; 2303 2304 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2305} 2306 2307Static void 2308ural_amrr_timeout(void *arg) 2309{ 2310 struct ural_softc *sc = (struct ural_softc *)arg; 2311 usb_device_request_t req; 2312 int s; 2313 2314 s = splusb(); 2315 2316 /* 2317 * Asynchronously read statistic registers (cleared by read). 2318 */ 2319 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2320 req.bRequest = RAL_READ_MULTI_MAC; 2321 USETW(req.wValue, 0); 2322 USETW(req.wIndex, RAL_STA_CSR0); 2323 USETW(req.wLength, sizeof(sc->sta)); 2324 2325 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2326 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof(sc->sta), 0, 2327 ural_amrr_update); 2328 (void)usbd_transfer(sc->amrr_xfer); 2329 2330 splx(s); 2331} 2332 2333Static void 2334ural_amrr_update(struct usbd_xfer *xfer, void * priv, 2335 usbd_status status) 2336{ 2337 struct ural_softc *sc = (struct ural_softc *)priv; 2338 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2339 2340 if (status != USBD_NORMAL_COMPLETION) { 2341 printf("%s: could not retrieve Tx statistics - " 2342 "cancelling automatic rate control\n", 2343 device_xname(sc->sc_dev)); 2344 return; 2345 } 2346 2347 /* count TX retry-fail as Tx errors */ 2348 if_statadd(ifp, if_oerrors, sc->sta[9]); 2349 2350 sc->amn.amn_retrycnt = 2351 sc->sta[7] + /* TX one-retry ok count */ 2352 sc->sta[8] + /* TX more-retry ok count */ 2353 sc->sta[9]; /* TX retry-fail count */ 2354 2355 sc->amn.amn_txcnt = 2356 sc->amn.amn_retrycnt + 2357 sc->sta[6]; /* TX no-retry ok count */ 2358 2359 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2360 2361 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2362} 2363