1/*	$NetBSD: qecvar.h,v 1.13 2009/09/18 14:09:42 tsutsui Exp $	*/
2
3/*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Paul Kranenburg.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32struct qec_softc {
33	device_t sc_dev;		/* us as a device */
34	bus_space_tag_t	sc_bustag;	/* bus & DMA tags */
35	bus_dma_tag_t	sc_dmatag;
36	struct	openprom_intr *sc_intr;	/* interrupt info */
37
38	bus_space_handle_t sc_regs;	/* QEC registers */
39	int	sc_nchannels;		/* # of channels on board */
40	int	sc_burst;		/* DVMA burst size in effect */
41	void *	sc_buffer;		/* VA of the buffer we provide */
42	int	sc_bufsiz;		/* Size of buffer */
43
44	u_int	sc_msize;		/* QEC buffer offset per channel */
45	u_int	sc_rsize;		/* QEC buffer size for receive */
46};
47
48struct qec_ring {
49	/* Ring Descriptors */
50	void *		rb_membase;	/* Packet buffer: CPU address */
51	bus_addr_t	rb_dmabase;	/* Packet buffer: DMA address */
52	struct	qec_xd	*rb_txd;	/* Transmit descriptors */
53	bus_addr_t	rb_txddma;	/* DMA address of same */
54	struct	qec_xd	*rb_rxd;	/* Receive descriptors */
55	bus_addr_t	rb_rxddma;	/* DMA address of same */
56	uint8_t		*rb_txbuf;	/* Transmit buffers */
57	uint8_t		*rb_rxbuf;	/* Receive buffers */
58	int		rb_ntbuf;	/* # of transmit buffers */
59	int		rb_nrbuf;	/* # of receive buffers */
60
61	/* Ring Descriptor state */
62	int	rb_tdhead, rb_tdtail;
63	int	rb_rdtail;
64	int	rb_td_nbusy;
65};
66
67void	qec_meminit(struct qec_ring *, unsigned int);
68